spi_hi35xx.c - OpenGrok cross reference for /device/soc/hisilicon/common/platform/spi/spi

Lines Matching refs:regBase
39     volatile unsigned char *regBase;
66         {"REG_SPI_CR0", PLATFORM_DUMPER_REGISTERL, (void *)(pl022->regBase + REG_SPI_CR0)},
67         {"REG_SPI_CR1", PLATFORM_DUMPER_REGISTERL, (void *)(pl022->regBase + REG_SPI_CR1)},
68         {"REG_SPI_DR", PLATFORM_DUMPER_REGISTERL, (void *)(pl022->regBase + REG_SPI_DR)},
69         {"REG_SPI_SR", PLATFORM_DUMPER_REGISTERL, (void *)(pl022->regBase + REG_SPI_SR)},
70         {"REG_SPI_CPSR", PLATFORM_DUMPER_REGISTERL, (void *)(pl022->regBase + REG_SPI_CPSR)},
71         {"REG_SPI_IMSC", PLATFORM_DUMPER_REGISTERL, (void *)(pl022->regBase + REG_SPI_IMSC)},
72         {"REG_SPI_RIS", PLATFORM_DUMPER_REGISTERL, (void *)(pl022->regBase + REG_SPI_RIS)},
73         {"REG_SPI_MIS", PLATFORM_DUMPER_REGISTERL, (void *)(pl022->regBase + REG_SPI_MIS)},
74         {"REG_SPI_ICR", PLATFORM_DUMPER_REGISTERL, (void *)(pl022->regBase + REG_SPI_ICR)},
167     value = OSAL_READL((uintptr_t)(pl022->regBase) + REG_SPI_CR1);
169     OSAL_WRITEL(value, (uintptr_t)(pl022->regBase) + REG_SPI_CR1);
176     value = OSAL_READL((uintptr_t)(pl022->regBase) + REG_SPI_CR1);
178     OSAL_WRITEL(value, (uintptr_t)(pl022->regBase) + REG_SPI_CR1);
185     value = OSAL_READL((uintptr_t)(pl022->regBase) + REG_SPI_CPSR);
188     OSAL_WRITEL(value, (uintptr_t)(pl022->regBase) + REG_SPI_CPSR);
196     value = OSAL_READL((uintptr_t)(pl022->regBase) + REG_SPI_CR0);
208     OSAL_WRITEL(value, (uintptr_t)(pl022->regBase) + REG_SPI_CR0);
216     value = OSAL_READL((uintptr_t)(pl022->regBase) + REG_SPI_CR1);
226     OSAL_WRITEL(value, (uintptr_t)(pl022->regBase) + REG_SPI_CR1);
234             (uintptr_t)(pl022->regBase) + SPI_DMA_CR);
236         value = OSAL_READL((uintptr_t)(pl022->regBase) + SPI_TX_FIFO_CR);
238         OSAL_WRITEL(value, (uintptr_t)(pl022->regBase) + SPI_TX_FIFO_CR);
240         value = OSAL_READL((uintptr_t)(pl022->regBase) + SPI_RX_FIFO_CR);
242         OSAL_WRITEL(value, (uintptr_t)(pl022->regBase) + SPI_RX_FIFO_CR);
244         OSAL_WRITEL(0, (uintptr_t)(pl022->regBase) + SPI_DMA_CR);
257         value = OSAL_READL((uintptr_t)(pl022->regBase) + SPI_RX_FIFO_CR);
260         OSAL_WRITEL(value, (uintptr_t)(pl022->regBase) + SPI_RX_FIFO_CR);
263     OSAL_WRITEL(SPI_ALL_IRQ_DISABLE, (uintptr_t)(pl022->regBase) + REG_SPI_IMSC);
264     OSAL_WRITEL(SPI_ALL_IRQ_CLEAR, (uintptr_t)(pl022->regBase) + REG_SPI_ICR);
312         value = OSAL_READL((uintptr_t)(pl022->regBase) + REG_SPI_SR);
335         value = OSAL_READL((uintptr_t)(pl022->regBase) + REG_SPI_SR);
343         OSAL_READL((uintptr_t)(pl022->regBase) + REG_SPI_DR);
370         OSAL_WRITEL(value, (uintptr_t)(pl022->regBase) + REG_SPI_DR);
380         value = OSAL_READL((uintptr_t)(pl022->regBase) + REG_SPI_DR);
414             OSAL_WRITEL(SPI_ALL_IRQ_ENABLE, (uintptr_t)(pl022->regBase) + REG_SPI_IMSC);
821     if (iface->GetUint32(node, "regBase", &tmp, 0) != HDF_SUCCESS) {
822         HDF_LOGE("%s: read regBase fail", __func__);
826     pl022->regBase = HDF_IO_DEVICE_ADDR(pl022->phyBase);
872     value = OSAL_READL((uintptr_t)(pl022->regBase) + REG_SPI_MIS);
874         OSAL_WRITEL(SPI_ALL_IRQ_DISABLE, (uintptr_t)(pl022->regBase) + REG_SPI_IMSC);
875         OSAL_WRITEL(SPI_ALL_IRQ_CLEAR, (uintptr_t)(pl022->regBase) + REG_SPI_ICR);
917         OSAL_WRITEL(SPI_ALL_IRQ_DISABLE, (uintptr_t)(pl022->regBase) + REG_SPI_IMSC);