| /device/soc/rockchip/common/vendor/drivers/phy/ |
| H A D | phy-rockchip-csi2-dphy-hw.c | 290 static void csi_mipidphy_wr_ths_settle(struct csi2_dphy_hw *hw, int hsfreq, enum csi2_dphy_lane lane)
in csi_mipidphy_wr_ths_settle() argument
319 val = (val & ~0x7f) | hsfreq;
in csi_mipidphy_wr_ths_settle()
581 int i, hsfreq = 0;
in csi2_dphy_hw_stream_on() local
673 hsfreq = hsfreq_ranges[i].cfg_bit;
in csi2_dphy_hw_stream_on()
682 hsfreq = hsfreq_ranges[i].cfg_bit;
in csi2_dphy_hw_stream_on()
686 csi_mipidphy_wr_ths_settle(hw, hsfreq, CSI2_DPHY_LANE_CLOCK);
in csi2_dphy_hw_stream_on()
688 csi_mipidphy_wr_ths_settle(hw, hsfreq, CSI2_DPHY_LANE_DATA0);
in csi2_dphy_hw_stream_on()
691 csi_mipidphy_wr_ths_settle(hw, hsfreq, CSI2_DPHY_LANE_DATA1);
in csi2_dphy_hw_stream_on()
694 csi_mipidphy_wr_ths_settle(hw, hsfreq, CSI2_DPHY_LANE_DATA2);
in csi2_dphy_hw_stream_on()
697 csi_mipidphy_wr_ths_settle(hw, hsfreq, CSI2_DPHY_LANE_DATA in csi2_dphy_hw_stream_on()
764 int i, hsfreq = 0; csi2_dcphy_hw_stream_on() local
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| H A D | phy-rockchip-mipi-rx.c | 631 static void csi_mipidphy_wr_ths_settle(struct mipidphy_priv *priv, int hsfreq, enum mipi_dphy_lane lane)
in csi_mipidphy_wr_ths_settle() argument
657 val = (val & ~0x7f) | hsfreq;
in csi_mipidphy_wr_ths_settle()
1088 int i, hsfreq = 0;
in mipidphy_rx_stream_on() local
1092 hsfreq = hsfreq_ranges[i].cfg_bit;
in mipidphy_rx_stream_on()
1101 hsfreq = hsfreq_ranges[i].cfg_bit;
in mipidphy_rx_stream_on()
1144 hsfreq <<= 1;
in mipidphy_rx_stream_on()
1146 mipidphy0_wr_reg(priv, LANE0_HS_RX_CONTROL, hsfreq);
in mipidphy_rx_stream_on()
1147 mipidphy0_wr_reg(priv, LANE1_HS_RX_CONTROL, hsfreq);
in mipidphy_rx_stream_on()
1148 mipidphy0_wr_reg(priv, LANE2_HS_RX_CONTROL, hsfreq);
in mipidphy_rx_stream_on()
1149 mipidphy0_wr_reg(priv, LANE3_HS_RX_CONTROL, hsfreq);
in mipidphy_rx_stream_on()
1178 int i, hsfreq = 0; mipidphy_txrx_stream_on() local
1295 int i, hsfreq = 0; csi_mipidphy_stream_on() local
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| /device/soc/rockchip/rk3588/kernel/drivers/phy/rockchip/ |
| H A D | phy-rockchip-csi2-dphy-hw.c | 294 int hsfreq, in csi_mipidphy_wr_ths_settle()
324 val = (val & ~0x7f) | hsfreq; in csi_mipidphy_wr_ths_settle()
600 int i, hsfreq = 0; in csi2_dphy_hw_stream_on() local
685 hsfreq = hsfreq_ranges[i].cfg_bit; in csi2_dphy_hw_stream_on()
694 hsfreq = hsfreq_ranges[i].cfg_bit; in csi2_dphy_hw_stream_on()
698 csi_mipidphy_wr_ths_settle(hw, hsfreq, CSI2_DPHY_LANE_CLOCK); in csi2_dphy_hw_stream_on()
700 csi_mipidphy_wr_ths_settle(hw, hsfreq, CSI2_DPHY_LANE_DATA0); in csi2_dphy_hw_stream_on()
702 csi_mipidphy_wr_ths_settle(hw, hsfreq, CSI2_DPHY_LANE_DATA1); in csi2_dphy_hw_stream_on()
704 csi_mipidphy_wr_ths_settle(hw, hsfreq, CSI2_DPHY_LANE_DATA2); in csi2_dphy_hw_stream_on()
706 csi_mipidphy_wr_ths_settle(hw, hsfreq, CSI2_DPHY_LANE_DATA in csi2_dphy_hw_stream_on()
293 csi_mipidphy_wr_ths_settle(struct csi2_dphy_hw *hw, int hsfreq, enum csi2_dphy_lane lane) csi_mipidphy_wr_ths_settle() argument
772 int i, hsfreq = 0; csi2_dcphy_hw_stream_on() local
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| H A D | phy-rockchip-mipi-rx.c | 655 static void csi_mipidphy_wr_ths_settle(struct mipidphy_priv *priv, int hsfreq, in csi_mipidphy_wr_ths_settle() argument
682 val = (val & ~0x7f) | hsfreq; in csi_mipidphy_wr_ths_settle()
1116 int i, hsfreq = 0; in mipidphy_rx_stream_on() local
1120 hsfreq = hsfreq_ranges[i].cfg_bit; in mipidphy_rx_stream_on()
1129 hsfreq = hsfreq_ranges[i].cfg_bit; in mipidphy_rx_stream_on()
1172 hsfreq <<= 1; in mipidphy_rx_stream_on()
1174 mipidphy0_wr_reg(priv, LANE0_HS_RX_CONTROL, hsfreq); in mipidphy_rx_stream_on()
1175 mipidphy0_wr_reg(priv, LANE1_HS_RX_CONTROL, hsfreq); in mipidphy_rx_stream_on()
1176 mipidphy0_wr_reg(priv, LANE2_HS_RX_CONTROL, hsfreq); in mipidphy_rx_stream_on()
1177 mipidphy0_wr_reg(priv, LANE3_HS_RX_CONTROL, hsfreq); in mipidphy_rx_stream_on()
1207 int i, hsfreq = 0; mipidphy_txrx_stream_on() local
1326 int i, hsfreq = 0; csi_mipidphy_stream_on() local
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