phy-rockchip-mipi-rx.c - OpenGrok cross reference for /device/soc/rockchip/common/vendor/drivers/phy/phy-rockchip-mipi-rx.c

Lines Matching refs:hsfreq

631 static void csi_mipidphy_wr_ths_settle(struct mipidphy_priv *priv, int hsfreq, enum mipi_dphy_lane lane)

657     val = (val & ~0x7f) | hsfreq;

1088     int i, hsfreq = 0;

1092             hsfreq = hsfreq_ranges[i].cfg_bit;

1101         hsfreq = hsfreq_ranges[i].cfg_bit;

1144     hsfreq <<= 1;

1146     mipidphy0_wr_reg(priv, LANE0_HS_RX_CONTROL, hsfreq);

1147     mipidphy0_wr_reg(priv, LANE1_HS_RX_CONTROL, hsfreq);

1148     mipidphy0_wr_reg(priv, LANE2_HS_RX_CONTROL, hsfreq);

1149     mipidphy0_wr_reg(priv, LANE3_HS_RX_CONTROL, hsfreq);

1178     int i, hsfreq = 0;

1182             hsfreq = hsfreq_ranges[i].cfg_bit;

1191         hsfreq = hsfreq_ranges[i].cfg_bit;

1251     hsfreq <<= 1;

1253     mipidphy1_wr_reg(priv, LANE0_HS_RX_CONTROL, hsfreq);

1295     int i, hsfreq = 0;

1366             hsfreq = hsfreq_ranges[i].cfg_bit;

1375         hsfreq = hsfreq_ranges[i].cfg_bit;

1378     csi_mipidphy_wr_ths_settle(priv, hsfreq, MIPI_DPHY_LANE_CLOCK);

1380         csi_mipidphy_wr_ths_settle(priv, hsfreq, MIPI_DPHY_LANE_DATA0);

1383         csi_mipidphy_wr_ths_settle(priv, hsfreq, MIPI_DPHY_LANE_DATA1);

1386         csi_mipidphy_wr_ths_settle(priv, hsfreq, MIPI_DPHY_LANE_DATA2);

1389         csi_mipidphy_wr_ths_settle(priv, hsfreq, MIPI_DPHY_LANE_DATA3);