| /device/soc/rockchip/common/sdk_linux/drivers/gpu/drm/panel/ |
| H A D | panel-simple.c | 320 dev_err(panel->base.dev, "failed to add mode %ux%u@%u\n", m->hdisplay, m->vdisplay, drm_mode_vrefresh(m)); in panel_simple_get_display_modes()
979 .hdisplay = 1280,
1006 .hdisplay = 480,
1031 .hdisplay = 800,
1081 .hdisplay = 1024,
1130 .hdisplay = 1366,
1154 .hdisplay = 1366,
1184 .hdisplay = 1366,
1215 .hdisplay = 1366,
1238 .hdisplay
[all...] |
| H A D | panel-ilitek-ili9881c.c | 366 .hdisplay = 720,
383 .hdisplay = 800,
404 dev_err(&ctx->dsi->dev, "failed to add mode %ux%ux@%u\n", ctx->desc->mode->hdisplay, ctx->desc->mode->vdisplay, in ili9881c_get_modes()
|
| /device/soc/rockchip/common/sdk_linux/drivers/gpu/drm/ |
| H A D | drm_modes.c | 120 * @hdisplay: hdisplay size
128 * according to the hdisplay, vdisplay, vrefresh.
141 struct drm_display_mode *drm_cvt_mode(struct drm_device *dev, int hdisplay, int vdisplay, int vrefresh, bool reduced, in drm_cvt_mode() argument
161 if (!hdisplay || !vdisplay) { in drm_cvt_mode()
186 hdisplay_rnd = hdisplay - (hdisplay % CVT_H_GRANULARITY); in drm_cvt_mode()
195 drm_mode->hdisplay = hdisplay_rnd + 0x2 * hmargin; in drm_cvt_mode()
220 if (!(vdisplay % 0x3) && ((vdisplay * 0x4 / 0x3) == hdisplay)) { in drm_cvt_mode()
222 } else if (!(vdisplay % 0x9) && ((vdisplay * 0x10 / 0x9) == hdisplay)) { in drm_cvt_mode()
366 drm_gtf_mode_complex(struct drm_device *dev, int hdisplay, int vdisplay, int vrefresh, bool interlaced, int margins, int GTF_M, int GTF_2C, int GTF_K, int GTF_2J) drm_gtf_mode_complex() argument
573 drm_gtf_mode(struct drm_device *dev, int hdisplay, int vdisplay, int vrefresh, bool interlaced, int margins) drm_gtf_mode() argument
804 drm_mode_get_hv_timing(const struct drm_display_mode *mode, int *hdisplay, int *vdisplay) drm_mode_get_hv_timing() argument
[all...] |
| H A D | drm_edid.c | 2142 #define MODE_SIZE(m) ((m)->hdisplay * (m)->vdisplay)
2199 return (mode->htotal - mode->hdisplay == 0xa0) && (mode->hsync_end - mode->hdisplay == 0x50) && in mode_is_rb()
2222 if (hsize != ptr->hdisplay) { in drm_mode_find_dmt()
2454 /* According to the EDID spec, the hdisplay = hsize * 8 + 248 */ in drm_mode_std()
2485 list_for_each_entry(m, &connector->probed_modes, head) if (m->hdisplay == hsize && m->vdisplay == vsize && in drm_mode_std()
2494 mode->hdisplay = 0x556; in drm_mode_std()
2566 if ((mode->hdisplay == cea_interlaced[i].w) && (mode->vdisplay == cea_interlaced[i].h / 0x2)) { in drm_mode_do_interlace_quirk()
2643 mode->hdisplay = hactive; in drm_mode_detailed()
2644 mode->hsync_start = mode->hdisplay in drm_mode_detailed()
5544 drm_add_modes_noedid(struct drm_connector *connector, int hdisplay, int vdisplay) drm_add_modes_noedid() argument
[all...] |
| /device/soc/rockchip/rk3588/kernel/drivers/gpu/drm/rockchip/ |
| H A D | rockchip_drm_logo.c | 367 if (!of_property_read_u32(route, "video,hdisplay", &val)) in of_parse_display_resource()
368 set->hdisplay = val; in of_parse_display_resource()
586 int hdisplay, vdisplay; in setup_initial_state() local
593 if (!set->hdisplay || !set->vdisplay || !set->vrefresh) in setup_initial_state()
619 mode->hdisplay == set->hdisplay && in setup_initial_state()
645 set->hdisplay, set->vdisplay, set->crtc_hsync_end, set->crtc_vsync_end, in setup_initial_state()
691 hdisplay = mode->hdisplay; in setup_initial_state()
702 if (set->fb->width >= hdisplay) { in setup_initial_state()
[all...] |
| H A D | rockchip_drm_logo.h | 17 int hdisplay; member
|
| H A D | rockchip_drm_vop2.c | 334 * hdisplay > 4096
2579 mode->hdisplay = 1920 >> i; in vop2_wb_connector_get_modes()
2608 w = mode->hdisplay; in vop2_wb_connector_mode_valid()
2645 if ((fb->width > cstate->mode.hdisplay) || in vop2_wb_encoder_atomic_check()
2654 cstate->mode.hdisplay, fb->width); in vop2_wb_encoder_atomic_check()
2655 wb_state->scale_x_en = (fb->width < cstate->mode.hdisplay) ? 1 : 0; in vop2_wb_encoder_atomic_check()
3491 u16 hdisplay) in vop2_cluter_splice_scale_check()
3495 u16 half_hdisplay = hdisplay >> 1; in vop2_cluter_splice_scale_check()
3508 if ((dst.x2 + dst.x1) != hdisplay) { in vop2_cluter_splice_scale_check()
3550 ret = vop2_cluter_splice_scale_check(win, pstate, mode->hdisplay); in vop2_plane_splice_check()
3490 vop2_cluter_splice_scale_check(struct vop2_win *win, struct drm_plane_state *pstate, u16 hdisplay) vop2_cluter_splice_scale_check() argument
5200 u16 hdisplay = mode->crtc_hdisplay; vop2_post_config() local
5251 u16 hdisplay = adjusted_mode->crtc_hdisplay; vop2_crtc_mode_update() local
5639 u16 hdisplay = adjusted_mode->crtc_hdisplay; vop2_crtc_enable_dsc() local
5864 u16 hdisplay = adjusted_mode->crtc_hdisplay; vop2_crtc_atomic_enable() local
6897 u16 hdisplay = adjusted_mode->crtc_hdisplay; vop2_setup_dly_for_vp() local
[all...] |
| /device/soc/rockchip/common/sdk_linux/drivers/gpu/drm/rockchip/ |
| H A D | rockchip_drm_logo.c | 383 if (!of_property_read_u32(route, "video,hdisplay", &val)) { in of_parse_display_resource()
384 set->hdisplay = val; in of_parse_display_resource()
615 int hdisplay, vdisplay; in setup_initial_state() local
622 if (!set->hdisplay || !set->vdisplay || !set->vrefresh) { in setup_initial_state()
651 if (mode->clock == set->clock && mode->hdisplay == set->hdisplay && mode->vdisplay == set->vdisplay && in setup_initial_state()
675 set->hdisplay, set->vdisplay, set->crtc_hsync_end, set->crtc_vsync_end, set->vrefresh, set->flags, in setup_initial_state()
723 hdisplay = mode->hdisplay; in setup_initial_state()
734 if (set->fb->width >= hdisplay) { in setup_initial_state()
[all...] |
| H A D | rockchip_drm_logo.h | 17 int hdisplay; member
|
| H A D | rockchip_drm_drv.c | 54 hactive = mode->hdisplay; in drm_mode_convert_to_split_mode()
55 hfp = mode->hsync_start - mode->hdisplay; in drm_mode_convert_to_split_mode()
60 mode->hdisplay = hactive * 0x2; in drm_mode_convert_to_split_mode()
61 mode->hsync_start = mode->hdisplay + hfp * 0x2; in drm_mode_convert_to_split_mode()
72 hactive = mode->hdisplay; in drm_mode_convert_to_origin_mode()
73 hfp = mode->hsync_start - mode->hdisplay; in drm_mode_convert_to_origin_mode()
78 mode->hdisplay = hactive / 0x2; in drm_mode_convert_to_origin_mode()
79 mode->hsync_start = mode->hdisplay + hfp / 0x2; in drm_mode_convert_to_origin_mode()
|
| H A D | rockchip_drm_vop.c | 1845 if (dest->x1 + dsp_w > adjusted_mode->hdisplay) { in vop_plane_atomic_update()
1846 DRM_ERROR("%s win%d dest->x1[%d] + dsp_w[%d] exceed mode hdisplay[%d]\n", crtc->name, win->win_id, dest->x1, in vop_plane_atomic_update()
1847 dsp_w, adjusted_mode->hdisplay); in vop_plane_atomic_update()
1848 dsp_w = adjusted_mode->hdisplay - dest->x1; in vop_plane_atomic_update()
2441 DEBUG_PRINT_S(s, " Display mode: %dx%d%s%d\n", mode->hdisplay, mode->vdisplay, interlaced ? "i" : "p", in vop_crtc_debugfs_dump()
2445 DEBUG_PRINT_S(s, "\tH: %d %d %d %d\n", mode->hdisplay, mode->hsync_start, mode->hsync_end, mode->htotal); in vop_crtc_debugfs_dump()
2546 if (mode->hdisplay > vop_data->max_output.width) { in vop_crtc_mode_valid()
2828 if (mode->hdisplay > vop_data->max_output.width) { in vop_crtc_mode_fixup()
2941 u16 hdisplay = adjusted_mode->crtc_hdisplay; in vop_crtc_mode_update() local
2944 u16 hact_end = hact_st + hdisplay; in vop_crtc_mode_update()
2986 u16 hdisplay = adjusted_mode->crtc_hdisplay; vop_crtc_atomic_enable() local
3425 u16 hdisplay = mode->crtc_hdisplay; vop_post_config() local
[all...] |
| H A D | rockchip_drm_vop2.c | 318 * hdisplay > 4096
2592 mode->hdisplay = 0x780 >> i; in vop2_wb_connector_get_modes()
2618 w = mode->hdisplay; in vop2_wb_connector_mode_valid()
2654 if ((fb->width > cstate->mode.hdisplay) || in vop2_wb_encoder_atomic_check()
2661 wb_state->scale_x_factor = vop2_scale_factor(SCALE_DOWN, VOP2_SCALE_DOWN_BIL, cstate->mode.hdisplay, fb->width); in vop2_wb_encoder_atomic_check()
2662 wb_state->scale_x_en = (fb->width < cstate->mode.hdisplay) ? 1 : 0; in vop2_wb_encoder_atomic_check()
3487 static int vop2_cluter_splice_scale_check(struct vop2_win *win, struct drm_plane_state *pstate, u16 hdisplay) in vop2_cluter_splice_scale_check() argument
3491 u16 half_hdisplay = hdisplay >> 1; in vop2_cluter_splice_scale_check()
3503 if ((dst.x2 + dst.x1) != hdisplay) { in vop2_cluter_splice_scale_check()
3542 ret = vop2_cluter_splice_scale_check(win, pstate, mode->hdisplay); in vop2_plane_splice_check()
5183 u16 hdisplay = mode->crtc_hdisplay; vop2_post_config() local
5231 u16 hdisplay = adjusted_mode->crtc_hdisplay; vop2_crtc_mode_update() local
5593 u16 hdisplay = adjusted_mode->crtc_hdisplay; vop2_crtc_enable_dsc() local
5803 u16 hdisplay = adjusted_mode->crtc_hdisplay; vop2_crtc_atomic_enable() local
6841 u16 hdisplay = adjusted_mode->crtc_hdisplay; vop2_setup_dly_for_vp() local
[all...] |
| /device/soc/rockchip/rk3588/kernel/include/drm/ |
| H A D | rockchip_drm_logo.h | 17 int hdisplay; member
|
| /device/soc/hisilicon/hi3516dv300/sdk_linux/drv/mpp/cbb/vo/vo_dev/drm_hal/ |
| H A D | drm_hal_common.h | 153 int hdisplay; member
|
| /device/soc/hisilicon/common/hal/display/source/display_device/src/drm/ |
| H A D | drm_connector.cpp | 27 hdiMode.width = mModeInfo.hdisplay;
in ConvertToHdiMode()
61 DISPLAY_LOGD("mode: hdisplay %{public}d, vdisplay %{public}d vrefresh %{public}d type %{public}d",
in InitModes()
62 mode->hdisplay, mode->vdisplay, mode->vrefresh, mode->type);
in InitModes()
|
| H A D | drm_display.cpp | 201 .width = mode.GetModeInfoPtr()->hdisplay,
in PushFirstFrame()
|
| /device/soc/rockchip/common/hardware/display/src/display_device/ |
| H A D | drm_connector.cpp | 30 hdiMode.width = mModeInfo.hdisplay; in ConvertToHdiMode()
61 "mode: hdisplay %{public}d, vdisplay %{public}d vrefresh %{public}d type %{public}d", in InitModes()
62 mode->hdisplay, mode->vdisplay, mode->vrefresh, mode->type); in InitModes()
|
| H A D | drm_display.cpp | 231 AllocInfo info = {.width = mode.GetModeInfoPtr()->hdisplay, in PushFirstFrame()
|
| /device/soc/rockchip/rk3399/hardware/display/src/display_device/ |
| H A D | drm_connector.cpp | 30 hdiMode.width = mModeInfo.hdisplay; in ConvertToHdiMode()
64 DISPLAY_DEBUGLOG("mode: hdisplay %{public}d, vdisplay %{public}d vrefresh %{public}d type %{public}d", in InitModes()
65 mode->hdisplay, mode->vdisplay, mode->vrefresh, mode->type); in InitModes()
|
| H A D | drm_display.cpp | 227 .width = mode.GetModeInfoPtr()->hdisplay, in PushFirstFrame()
|
| /device/soc/rockchip/rk3566/hardware/display/src/display_device/ |
| H A D | drm_connector.cpp | 31 hdiMode.width = mModeInfo.hdisplay; in ConvertToHdiMode()
65 DISPLAY_LOGD("mode: hdisplay %{public}d, vdisplay %{public}d vrefresh %{public}d type %{public}d", in InitModes()
66 mode->hdisplay, mode->vdisplay, mode->vrefresh, mode->type); in InitModes()
|
| H A D | drm_display.cpp | 229 .width = mode.GetModeInfoPtr()->hdisplay, in PushFirstFrame()
|
| /device/soc/rockchip/rk3568/hardware/display/src/display_device/ |
| H A D | drm_connector.cpp | 31 hdiMode.width = mModeInfo.hdisplay; in ConvertToHdiMode()
65 DISPLAY_LOGD("mode: hdisplay %{public}d, vdisplay %{public}d vrefresh %{public}d type %{public}d", in InitModes()
66 mode->hdisplay, mode->vdisplay, mode->vrefresh, mode->type); in InitModes()
|
| H A D | drm_display.cpp | 229 .width = mode.GetModeInfoPtr()->hdisplay, in PushFirstFrame()
|
| /device/soc/rockchip/rk3588/hardware/display/src/display_device/ |
| H A D | drm_connector.cpp | 31 hdiMode.width = mModeInfo.hdisplay;
in ConvertToHdiMode()
65 DISPLAY_LOGD("mode: hdisplay %{public}d, vdisplay %{public}d vrefresh %{public}d type %{public}d",
in InitModes()
66 mode->hdisplay, mode->vdisplay, mode->vrefresh, mode->type);
in InitModes()
|