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Searched refs:GFLAGS (Results 1 - 15 of 15) sorted by relevance

/device/soc/rockchip/rk3588/kernel/drivers/clk/rockchip/
H A Dclk-rk3588.c516 #define GFLAGS (CLK_GATE_HIWORD_MASK | CLK_GATE_SET_TO_DISABLE) macro
682 RK3588_CLKGATE_CON(0), 0, GFLAGS),
685 RK3588_CLKGATE_CON(0), 1, GFLAGS),
688 RK3588_CLKGATE_CON(0), 2, GFLAGS),
691 RK3588_CLKGATE_CON(0), 3, GFLAGS),
694 RK3588_CLKGATE_CON(0), 4, GFLAGS),
697 RK3588_CLKGATE_CON(0), 5, GFLAGS),
700 RK3588_CLKGATE_CON(0), 6, GFLAGS),
703 RK3588_CLKGATE_CON(0), 7, GFLAGS),
706 RK3588_CLKGATE_CON(0), 8, GFLAGS),
[all...]
H A Dclk-link.c38 #define GFLAGS (CLK_GATE_HIWORD_MASK | CLK_GATE_SET_TO_DISABLE) macro
66 gate->flags = GFLAGS; in register_clocks()
/device/soc/rockchip/common/sdk_linux/drivers/clk/rockchip/
H A Dclk-rk3368.c167 #define GFLAGS (CLK_GATE_HIWORD_MASK | CLK_GATE_SET_TO_DISABLE) macro
277 GATE(0, "apllb_core", "apllb", CLK_IGNORE_UNUSED, RK3368_CLKGATE_CON(0), 0, GFLAGS),
278 GATE(0, "gpllb_core", "gpll", CLK_IGNORE_UNUSED, RK3368_CLKGATE_CON(0), 1, GFLAGS),
280 GATE(0, "aplll_core", "aplll", CLK_IGNORE_UNUSED, RK3368_CLKGATE_CON(0), 4, GFLAGS),
281 GATE(0, "gplll_core", "gpll", CLK_IGNORE_UNUSED, RK3368_CLKGATE_CON(0), 5, GFLAGS),
291 GATE(0, "apllb_cs", "apllb", CLK_IGNORE_UNUSED, RK3368_CLKGATE_CON(0), 9, GFLAGS),
292 GATE(0, "aplll_cs", "aplll", CLK_IGNORE_UNUSED, RK3368_CLKGATE_CON(0), 10, GFLAGS),
293 GATE(0, "gpll_cs", "gpll", CLK_IGNORE_UNUSED, RK3368_CLKGATE_CON(0), 8, GFLAGS),
297 RK3368_CLKGATE_CON(0), 13, GFLAGS),
300 6, 2, MFLAGS, 0, 5, DFLAGS, RK3368_CLKGATE_CON(0), 12, GFLAGS),
[all...]
H A Dclk-rk3328.c187 #define GFLAGS (CLK_GATE_HIWORD_MASK | CLK_GATE_SET_TO_DISABLE) macro
217 RK3328_CLKGATE_CON(0), 11, GFLAGS),
228 GATE(0, "apll_core", "apll", CLK_IGNORE_UNUSED, RK3328_CLKGATE_CON(0), 0, GFLAGS),
229 GATE(0, "gpll_core", "gpll", CLK_IGNORE_UNUSED, RK3328_CLKGATE_CON(0), 2, GFLAGS),
230 GATE(0, "dpll_core", "dpll", CLK_IGNORE_UNUSED, RK3328_CLKGATE_CON(0), 1, GFLAGS),
231 GATE(0, "npll_core", "npll", CLK_IGNORE_UNUSED, RK3328_CLKGATE_CON(0), 12, GFLAGS),
233 DFLAGS | CLK_DIVIDER_READ_ONLY, RK3328_CLKGATE_CON(7), 0, GFLAGS),
235 DFLAGS | CLK_DIVIDER_READ_ONLY, RK3328_CLKGATE_CON(7), 1, GFLAGS),
236 GATE(0, "aclk_core_niu", "aclk_core", CLK_IS_CRITICAL, RK3328_CLKGATE_CON(13), 0, GFLAGS),
237 GATE(0, "aclk_gic400", "aclk_core", CLK_IS_CRITICAL, RK3328_CLKGATE_CON(13), 1, GFLAGS),
[all...]
H A Dclk-rv1108.c154 #define GFLAGS (CLK_GATE_HIWORD_MASK | CLK_GATE_SET_TO_DISABLE) macro
183 GATE(0, "dpll_core", "dpll", CLK_IGNORE_UNUSED, RV1108_CLKGATE_CON(0), 1, GFLAGS),
184 GATE(0, "apll_core", "apll", CLK_IGNORE_UNUSED, RV1108_CLKGATE_CON(0), 0, GFLAGS),
185 GATE(0, "gpll_core", "gpll", CLK_IGNORE_UNUSED, RV1108_CLKGATE_CON(0), 2, GFLAGS),
187 DFLAGS | CLK_DIVIDER_READ_ONLY, RV1108_CLKGATE_CON(0), 5, GFLAGS),
189 DFLAGS | CLK_DIVIDER_READ_ONLY, RV1108_CLKGATE_CON(0), 4, GFLAGS),
190 GATE(ACLK_CORE, "aclk_core", "aclkenm_core", CLK_IS_CRITICAL, RV1108_CLKGATE_CON(11), 0, GFLAGS),
191 GATE(0, "pclk_dbg", "pclken_dbg", CLK_IGNORE_UNUSED, RV1108_CLKGATE_CON(11), 1, GFLAGS),
195 RV1108_CLKGATE_CON(8), 8, GFLAGS),
196 FACTOR_GATE(0, "hclk_rkvenc_pre", "aclk_rkvenc_pre", 0, 1, 4, RV1108_CLKGATE_CON(8), 10, GFLAGS),
[all...]
H A Dclk-rk3128.c164 #define GFLAGS (CLK_GATE_HIWORD_MASK | CLK_GATE_SET_TO_DISABLE) macro
195 GATE(0, "dpll_ddr", "dpll", CLK_IGNORE_UNUSED, RK2928_CLKGATE_CON(0), 2, GFLAGS),
196 GATE(0, "gpll_div2_ddr", "gpll_div2", CLK_IGNORE_UNUSED, RK2928_CLKGATE_CON(0), 2, GFLAGS),
203 GATE(0, "apll_core", "apll", CLK_IGNORE_UNUSED, RK2928_CLKGATE_CON(0), 6, GFLAGS),
204 GATE(0, "gpll_div2_core", "gpll_div2", CLK_IGNORE_UNUSED, RK2928_CLKGATE_CON(0), 6, GFLAGS),
206 DFLAGS | CLK_DIVIDER_READ_ONLY, RK2928_CLKGATE_CON(0), 0, GFLAGS),
208 DFLAGS | CLK_DIVIDER_READ_ONLY, RK2928_CLKGATE_CON(0), 7, GFLAGS),
215 RK2928_CLKGATE_CON(0), 1, GFLAGS),
216 GATE(ACLK_CPU, "aclk_cpu", "aclk_cpu_src", CLK_IS_CRITICAL, RK2928_CLKGATE_CON(0), 3, GFLAGS),
218 RK2928_CLKGATE_CON(0), 4, GFLAGS),
[all...]
H A Dclk-rk3399.c241 #define GFLAGS (CLK_GATE_HIWORD_MASK | CLK_GATE_SET_TO_DISABLE) macro
373 GATE(SCLK_USB2PHY0_REF, "clk_usb2phy0_ref", "xin24m", CLK_IGNORE_UNUSED, RK3399_CLKGATE_CON(6), 5, GFLAGS),
374 GATE(SCLK_USB2PHY1_REF, "clk_usb2phy1_ref", "xin24m", CLK_IGNORE_UNUSED, RK3399_CLKGATE_CON(6), 6, GFLAGS),
377 12, GFLAGS),
379 12, GFLAGS),
385 2, MFLAGS, RK3399_CLKGATE_CON(6), 4, GFLAGS),
388 DFLAGS, RK3399_CLKGATE_CON(12), 0, GFLAGS),
389 GATE(ACLK_USB3_NOC, "aclk_usb3_noc", "aclk_usb3", CLK_IS_CRITICAL, RK3399_CLKGATE_CON(30), 0, GFLAGS),
390 GATE(ACLK_USB3OTG0, "aclk_usb3otg0", "aclk_usb3", 0, RK3399_CLKGATE_CON(30), 1, GFLAGS),
391 GATE(ACLK_USB3OTG1, "aclk_usb3otg1", "aclk_usb3", 0, RK3399_CLKGATE_CON(30), 2, GFLAGS),
[all...]
H A Dclk-px30.c170 #define GFLAGS (CLK_GATE_HIWORD_MASK | CLK_GATE_SET_TO_DISABLE) macro
227 GATE(0, "apll_core", "apll", CLK_IGNORE_UNUSED, PX30_CLKGATE_CON(0), 0, GFLAGS),
228 GATE(0, "gpll_core", "gpll", CLK_IGNORE_UNUSED, PX30_CLKGATE_CON(0), 0, GFLAGS),
230 DFLAGS | CLK_DIVIDER_READ_ONLY, PX30_CLKGATE_CON(0), 2, GFLAGS),
232 DFLAGS | CLK_DIVIDER_READ_ONLY, PX30_CLKGATE_CON(0), 1, GFLAGS),
233 GATE(0, "aclk_core_niu", "aclk_core", CLK_IGNORE_UNUSED, PX30_CLKGATE_CON(0), 4, GFLAGS),
234 GATE(0, "aclk_core_prf", "aclk_core", CLK_IGNORE_UNUSED, PX30_CLKGATE_CON(17), 5, GFLAGS),
235 GATE(0, "pclk_dbg_niu", "pclk_dbg", CLK_IGNORE_UNUSED, PX30_CLKGATE_CON(0), 5, GFLAGS),
236 GATE(0, "pclk_core_dbg", "pclk_dbg", CLK_IGNORE_UNUSED, PX30_CLKGATE_CON(0), 6, GFLAGS),
237 GATE(0, "pclk_core_grf", "pclk_dbg", CLK_IGNORE_UNUSED, PX30_CLKGATE_CON(17), 6, GFLAGS),
[all...]
H A Dclk-rk3228.c172 #define GFLAGS (CLK_GATE_HIWORD_MASK | CLK_GATE_SET_TO_DISABLE) macro
203 GATE(0, "apll_ddr", "apll", CLK_IGNORE_UNUSED, RK2928_CLKGATE_CON(0), 2, GFLAGS),
204 GATE(0, "dpll_ddr", "dpll", CLK_IGNORE_UNUSED, RK2928_CLKGATE_CON(0), 2, GFLAGS),
205 GATE(0, "gpll_ddr", "gpll", CLK_IGNORE_UNUSED, RK2928_CLKGATE_CON(0), 2, GFLAGS),
207 DFLAGS | CLK_DIVIDER_POWER_OF_TWO, RK2928_CLKGATE_CON(7), 1, GFLAGS),
208 GATE(0, "ddrc", "ddrphy_pre", CLK_IGNORE_UNUSED, RK2928_CLKGATE_CON(8), 5, GFLAGS),
209 FACTOR_GATE(0, "ddrphy", "ddrphy4x", CLK_IGNORE_UNUSED, 1, 4, RK2928_CLKGATE_CON(7), 0, GFLAGS),
212 GATE(0, "apll_core", "apll", CLK_IGNORE_UNUSED, RK2928_CLKGATE_CON(0), 6, GFLAGS),
213 GATE(0, "gpll_core", "gpll", CLK_IGNORE_UNUSED, RK2928_CLKGATE_CON(0), 6, GFLAGS),
214 GATE(0, "dpll_core", "dpll", CLK_IGNORE_UNUSED, RK2928_CLKGATE_CON(0), 6, GFLAGS),
[all...]
H A Dclk-rk3308.c170 #define GFLAGS (CLK_GATE_HIWORD_MASK | CLK_GATE_SET_TO_DISABLE) macro
252 GATE(0, "apll_core", "apll", CLK_IGNORE_UNUSED, RK3308_CLKGATE_CON(0), 0, GFLAGS),
253 GATE(0, "vpll0_core", "vpll0", CLK_IGNORE_UNUSED, RK3308_CLKGATE_CON(0), 0, GFLAGS),
254 GATE(0, "vpll1_core", "vpll1", CLK_IGNORE_UNUSED, RK3308_CLKGATE_CON(0), 0, GFLAGS),
256 DFLAGS | CLK_DIVIDER_READ_ONLY, RK3308_CLKGATE_CON(0), 2, GFLAGS),
258 DFLAGS | CLK_DIVIDER_READ_ONLY, RK3308_CLKGATE_CON(0), 1, GFLAGS),
260 GATE(0, "clk_jtag", "jtag_clkin", CLK_IGNORE_UNUSED, RK3308_CLKGATE_CON(0), 3, GFLAGS),
262 GATE(SCLK_PVTM_CORE, "clk_pvtm_core", "xin24m", 0, RK3308_CLKGATE_CON(0), 4, GFLAGS),
269 MFLAGS, RK3308_CLKGATE_CON(1), 0, GFLAGS),
271 RK3308_CLKGATE_CON(1), 3, GFLAGS),
[all...]
H A Dclk-rk3188.c231 #define GFLAGS (CLK_GATE_HIWORD_MASK | CLK_GATE_SET_TO_DISABLE) macro
262 GATE(0, "gpll_armclk", "gpll", 0, RK2928_CLKGATE_CON(0), 1, GFLAGS),
266 DFLAGS | CLK_DIVIDER_READ_ONLY, div_core_peri_t, RK2928_CLKGATE_CON(0), 0, GFLAGS),
269 RK2928_CLKGATE_CON(3), 9, GFLAGS),
270 GATE(HCLK_VEPU, "hclk_vepu", "aclk_vepu", 0, RK2928_CLKGATE_CON(3), 10, GFLAGS),
272 RK2928_CLKGATE_CON(3), 11, GFLAGS),
273 GATE(HCLK_VDPU, "hclk_vdpu", "aclk_vdpu", 0, RK2928_CLKGATE_CON(3), 12, GFLAGS),
275 GATE(0, "gpll_ddr", "gpll", CLK_IGNORE_UNUSED, RK2928_CLKGATE_CON(1), 7, GFLAGS),
277 DFLAGS | CLK_DIVIDER_POWER_OF_TWO, RK2928_CLKGATE_CON(0), 2, GFLAGS),
279 GATE(ACLK_CPU, "aclk_cpu", "aclk_cpu_pre", CLK_IS_CRITICAL, RK2928_CLKGATE_CON(0), 3, GFLAGS),
[all...]
H A Dclk-rk3288.c195 #define GFLAGS (CLK_GATE_HIWORD_MASK | CLK_GATE_SET_TO_DISABLE) macro
227 GATE(0, "apll_core", "apll", CLK_IGNORE_UNUSED, RK3288_CLKGATE_CON(0), 1, GFLAGS),
228 GATE(0, "gpll_core", "gpll", CLK_IGNORE_UNUSED, RK3288_CLKGATE_CON(0), 2, GFLAGS),
231 DFLAGS | CLK_DIVIDER_READ_ONLY, RK3288_CLKGATE_CON(12), 0, GFLAGS),
233 DFLAGS | CLK_DIVIDER_READ_ONLY, RK3288_CLKGATE_CON(12), 1, GFLAGS),
235 DFLAGS | CLK_DIVIDER_READ_ONLY, RK3288_CLKGATE_CON(12), 2, GFLAGS),
237 DFLAGS | CLK_DIVIDER_READ_ONLY, RK3288_CLKGATE_CON(12), 3, GFLAGS),
239 DFLAGS | CLK_DIVIDER_READ_ONLY, RK3288_CLKGATE_CON(12), 4, GFLAGS),
241 DFLAGS | CLK_DIVIDER_READ_ONLY, RK3288_CLKGATE_CON(12), 5, GFLAGS),
243 DFLAGS | CLK_DIVIDER_READ_ONLY, RK3288_CLKGATE_CON(12), 6, GFLAGS),
[all...]
H A Dclk-rk3036.c150 #define GFLAGS (CLK_GATE_HIWORD_MASK | CLK_GATE_SET_TO_DISABLE) macro
172 GATE(0, "gpll_armclk", "gpll", CLK_IGNORE_UNUSED, RK2928_CLKGATE_CON(0), 6, GFLAGS),
180 GATE(0, "dpll_ddr", "dpll", CLK_IGNORE_UNUSED, RK2928_CLKGATE_CON(0), 2, GFLAGS),
181 GATE(0, "gpll_ddr", "gpll", CLK_IGNORE_UNUSED, RK2928_CLKGATE_CON(0), 8, GFLAGS),
187 DFLAGS | CLK_DIVIDER_READ_ONLY, RK2928_CLKGATE_CON(0), 7, GFLAGS),
189 DFLAGS | CLK_DIVIDER_READ_ONLY, RK2928_CLKGATE_CON(0), 7, GFLAGS),
191 GATE(0, "dpll_cpu", "dpll", CLK_IS_CRITICAL, RK2928_CLKGATE_CON(10), 8, GFLAGS),
192 GATE(0, "gpll_cpu", "gpll", CLK_IS_CRITICAL, RK2928_CLKGATE_CON(0), 1, GFLAGS),
195 GATE(ACLK_CPU, "aclk_cpu", "aclk_cpu_src", CLK_IS_CRITICAL, RK2928_CLKGATE_CON(0), 3, GFLAGS),
197 DFLAGS | CLK_DIVIDER_READ_ONLY, RK2928_CLKGATE_CON(0), 5, GFLAGS),
[all...]
/device/soc/rockchip/common/vendor/drivers/clk/
H A Dclk-rk1808.c192 #define GFLAGS (CLK_GATE_HIWORD_MASK | CLK_GATE_SET_TO_DISABLE) macro
253 GATE(0, "apll_core", "apll", CLK_IGNORE_UNUSED, RK1808_CLKGATE_CON(0), 0, GFLAGS),
254 GATE(0, "cpll_core", "cpll", CLK_IGNORE_UNUSED, RK1808_CLKGATE_CON(0), 0, GFLAGS),
255 GATE(0, "gpll_core", "gpll", CLK_IGNORE_UNUSED, RK1808_CLKGATE_CON(0), 0, GFLAGS),
257 DFLAGS | CLK_DIVIDER_READ_ONLY, RK1808_CLKGATE_CON(0), 3, GFLAGS),
259 DFLAGS | CLK_DIVIDER_READ_ONLY, RK1808_CLKGATE_CON(0), 2, GFLAGS),
261 GATE(0, "clk_jtag", "jtag_clkin", CLK_IGNORE_UNUSED, RK1808_CLKGATE_CON(0), 4, GFLAGS),
263 GATE(SCLK_PVTM_CORE, "clk_pvtm_core", "xin24m", 0, RK1808_CLKGATE_CON(0), 5, GFLAGS),
266 RK1808_CLKGATE_CON(0), 1, GFLAGS),
273 4, DFLAGS, RK1808_CLKGATE_CON(1), 0, GFLAGS),
[all...]
/device/soc/rockchip/rk3566/vendor/drivers/clk/
H A Dclk-rk3568.c321 #define GFLAGS (CLK_GATE_HIWORD_MASK | CLK_GATE_SET_TO_DISABLE) macro
386 RK3568_CLKGATE_CON(3), 1, GFLAGS);
394 RK3568_CLKGATE_CON(35), 0, GFLAGS),
396 RK3568_CLKGATE_CON(35), 1, GFLAGS),
398 RK3568_CLKGATE_CON(35), 2, GFLAGS),
400 RK3568_CLKGATE_CON(35), 3, GFLAGS),
402 RK3568_CLKGATE_CON(35), 4, GFLAGS),
404 RK3568_CLKGATE_CON(35), 5, GFLAGS),
406 RK3568_CLKGATE_CON(35), 6, GFLAGS),
408 RK3568_CLKGATE_CON(35), 7, GFLAGS),
[all...]

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