/third_party/icu/icu4c/source/test/cintltst/ |
H A D | crestst.c | 47 0x004F /*'O'*/, 0x0052/*'R'*/, 0x0000 /*'\0'*/}; 382 *base = 0x0000; in testTag()
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H A D | cnormtst.c | 266 log_data_err("unorm_normalize(%s) with 0x0000 failed: %s - (Are you missing data?)\n", name, u_errorName(status)); in TestNull_check() 268 log_err("unorm_normalize(%s) with 0x0000 failed: Expected len %d, got %d\n", name, expLen, len); in TestNull_check() 285 log_verbose("unorm_normalize(%s) with 0x0000: OK\n", name); in TestNull_check() 291 UChar source_comp[] = { 0x0061, 0x0000, 0x0044, 0x0307 }; in TestNull() 293 UChar expect_comp[] = { 0x0061, 0x0000, 0x1e0a }; in TestNull() 296 UChar source_dcmp[] = { 0x1e0A, 0x0000, 0x0929 }; in TestNull() 298 UChar expect_dcmp[] = { 0x0044, 0x0307, 0x0000, 0x0928, 0x093C }; in TestNull()
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H A D | ncnvtst.c | 305 static const int32_t fromOffsets[] = { 0x0000, 0x0003, 0x0005, 0x0006, 0x0009, 0x0009, 0x000D }; in TestSurrogateBehaviour() 931 { 0x0031, 0x0032, 0x0033, 0x0000, 0x4e00, 0x4e8c, 0x4e09, 0x002E }; in TestWithBufferSize() 937 { 0x0000, 0x0001, 0x0002, 0x0003, 0x0004, 0x0007, 0x000a, 0x000d };*/ in TestWithBufferSize() 968 int32_t offsets1[] = { 0x0000, 0x0001, 0x0004, 0x0005, 0x0006}; in TestWithBufferSize() 982 UChar IBM_943toUnicode[] = { 0x0000, 0x6D63, in TestWithBufferSize() 1743 static const int32_t fromOffsets[] = { 0x0000, 0x0003, 0x0005, 0x0006, 0x0009, 0x0009, 0x000D }; in TestResetBehaviour()
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/third_party/node/deps/openssl/openssl/include/openssl/ |
H A D | ec.h | 951 # define EC_FLAG_NON_FIPS_ALLOW 0x0000 952 # define EC_FLAG_FIPS_CHECKED 0x0000
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/third_party/vk-gl-cts/external/vulkancts/modules/vulkan/spirv_assembly/ |
H A D | vktSpvAsmUtils.cpp | 416 data.push_back(deInt16(0x0000)); // 0 in getInt16s() 668 // 0 000 00 00 0000 0000 (0x0000: +0) 703 float16.push_back(deUint16(0x0000)); in getFloat16s()
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/third_party/skia/src/gpu/gl/ |
H A D | GrGLDefines.h | 30 #define GR_GL_POINTS 0x0000 151 #define GR_GL_TEXTURE_NONE 0x0000
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/third_party/skia/third_party/externals/swiftshader/src/Renderer/ |
H A D | Context.cpp | 1441 return pixelShader ? pixelShader->getShaderModel() : 0x0000; in pixelShaderModel() 1446 return vertexShader ? vertexShader->getShaderModel() : 0x0000; in vertexShaderModel()
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/third_party/openssl/include/openssl/ |
H A D | ec.h | 951 # define EC_FLAG_NON_FIPS_ALLOW 0x0000 952 # define EC_FLAG_FIPS_CHECKED 0x0000
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/third_party/skia/third_party/externals/swiftshader/third_party/astc-encoder/Source/ |
H A D | astc_color_unquantize.cpp | 930 output0->y = 0x0000; in unpack_color_endpoints() 934 output1->y = 0x0000; in unpack_color_endpoints()
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/third_party/python/Modules/ |
H A D | unicodename_db.h | [all...] |
/third_party/vk-gl-cts/external/vulkancts/modules_no_buildgn/vulkan/spirv_assembly/ |
H A D | vktSpvAsmUtils.cpp | 416 data.push_back(deInt16(0x0000)); // 0 in getInt16s() 644 // 0 000 00 00 0000 0000 (0x0000: +0) 662 float16.push_back(deUint16(0x0000)); in getFloat16s()
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/device/soc/rockchip/common/kernel/drivers/net/wireless/rockchip_wlan/rkwifi/bcmdhd_wifi6/include/ |
H A D | 802.11.h | 202 #define DOT11_BA_CTL_POLICY_NORMAL 0x0000 /* normal ack */ 893 #define EDCF_AC_BE_TXOP_STA 0x0000 /* STA TXOP value for best effort AC */ 896 #define EDCF_AC_BK_TXOP_STA 0x0000 /* STA TXOP value for background AC */ 907 #define EDCF_AC_BE_TXOP_AP 0x0000 /* AP TXOP value for best effort AC */ 910 #define EDCF_AC_BK_TXOP_AP 0x0000 /* AP TXOP value for background AC */ 3986 #define HT_CAP_MIMO_PS_ON 0x0000 /* Mimo PS, MIMO disallowed */ 4119 #define HT_OPMODE_PURE 0x0000 /* protection mode PURE */
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/device/soc/rockchip/common/sdk_linux/drivers/gpu/drm/rockchip/ |
H A D | rockchip_vop_reg.h | 11 #define RK3288_REG_CFG_DONE 0x0000 124 #define RK3368_REG_CFG_DONE 0x0000 311 #define RK3366_REG_CFG_DONE 0x0000 474 #define RK3399_REG_CFG_DONE 0x0000
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/third_party/mesa3d/src/gallium/drivers/radeonsi/ |
H A D | si_clear.c | 405 if (value.us[0] == 0x0000 && value.us[1] == 0x0000 && in gfx11_get_dcc_clear_parameters() 406 value.us[2] == 0x0000 && value.us[3] == 0xffff) { in gfx11_get_dcc_clear_parameters() 410 value.us[2] == 0xffff && value.us[3] == 0x0000) { in gfx11_get_dcc_clear_parameters()
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/third_party/rust/crates/libc/src/unix/bsd/netbsdlike/openbsd/ |
H A D | mod.rs | 1115 pub const MAP_RENAME: ::c_int = 0x0000; 1116 pub const MAP_NORESERVE: ::c_int = 0x0000; 1117 pub const MAP_HASSEMAPHORE: ::c_int = 0x0000; 1138 pub const MAP_NOEXTEND: ::c_int = 0x0000;
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/third_party/ffmpeg/libavcodec/ |
H A D | on2avcdata.c | 860 0x0000, 0x0F10, 0x01F0, 0x0011, 0xFF00, 0x00FF, 0x1111, 0xFFFF, 0x1FF1, 870 0x0000, 0xF100, 0x1F00, 0x00F1, 0x001F, 872 0x0000, 0xE000, 0x0F10, 0x000E, 0x01F2, 0x0F1E, 0xEE00, 0x1021, 0x22E0, 928 0xEE11, 0xE12F, 0x0FF2, 0xF2E1, 0x1F2E, 0x0000, 0x1111, 0x1EF0, 0x2E11, 944 0x0000, 0x1100, 0x3F00, 0xF1FF, 0x010D, 0x0F30, 0xFE30, 0x10FE, 0xD021, 1119 0xDFEE, 0xF0D2, 0x0EF3, 0x3F22, 0x3122, 0x322F, 0x0000, 0x1F3F, 0xED2F, 1214 0x0000, 0x00FF, 0x3F00, 0xCC00, 0x1C10, 0x1140, 0xFCEF, 0x4220, 0x43C1, 1736 0xEFCF, 0xE1FC, 0xFE1E, 0xF4F2, 0x0000, 0x1EDC, 0x1F04, 0x1412, 0x2F1C, 1946 0x0000, 0xFF00, 0x05FF, 0x02FB, 0xFE02, 0xFDFE, 0x03FE, 0x05FE, 0x0301, 1970 0x0402, 0xFBFB, 0xFCFE, 0x00FB, 0xFC05, 0x0100, 0x0000, [all...] |
/device/soc/hisilicon/common/platform/wifi/hi3881v100/driver/wal/ |
H A D | hi_wifi_driver_wpa_if.h | 74 #define NOTIFY_DONE 0x0000
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/device/board/hisilicon/hispark_taurus/audio_drivers/soc/src/ |
H A D | hi3516_aiao_impl.c | 42 #define AIAO_INT_ENA 0x0000
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/device/soc/hisilicon/hi3861v100/sdk_liteos/components/wifi/include/ |
H A D | hi_wifi_driver_wpa_if.h | 70 #define NOTIFY_DONE 0x0000
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/device/soc/rockchip/common/vendor/drivers/mmc/host/ |
H A D | rk_sdmmc.h | 96 static const struct sdmmc_reg dw_mci_regs[] = {{0x0000, "CTRL"},
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/device/soc/rockchip/common/vendor/drivers/gpu/arm/midgard/ |
H A D | mali_midg_regmap.h | 23 #define GPU_CONTROL_BASE 0x0000
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/device/soc/rockchip/common/kernel/drivers/net/wireless/rockchip_wlan/rkwifi/bcmdhd_wifi6/ |
H A D | bcmwifi_channels.h | 87 #define WL_CHANSPEC_CTL_SB_LLL 0x0000
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/device/soc/rockchip/common/sdk_linux/drivers/mmc/host/ |
H A D | rk_sdmmc.h | 96 static const struct sdmmc_reg dw_mci_regs[] = {{0x0000, "CTRL"},
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/device/soc/rockchip/common/kernel/drivers/gpu/arm/midgard/ |
H A D | mali_midg_regmap.h | 28 #define GPU_CONTROL_BASE 0x0000
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/device/soc/rockchip/rk3588/kernel/drivers/mmc/host/ |
H A D | rk_sdmmc.h | 112 { 0x0000, "CTRL" },
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