/third_party/node/deps/openssl/config/archs/solaris64-x86_64-gcc/asm/crypto/modes/ |
H A D | aesni-gcm-x86_64.s | 41 vpclmulqdq $0x00,%xmm3,%xmm7,%xmm1 51 vpclmulqdq $0x00,%xmm3,%xmm0,%xmm5 79 vpclmulqdq $0x00,%xmm5,%xmm0,%xmm1 97 vpclmulqdq $0x00,%xmm1,%xmm0,%xmm2 119 vpclmulqdq $0x00,%xmm2,%xmm0,%xmm3 148 vpclmulqdq $0x00,%xmm3,%xmm8,%xmm2 604 vpclmulqdq $0x00,%xmm3,%xmm7,%xmm5 607 vpclmulqdq $0x00,%xmm15,%xmm1,%xmm1 610 vpclmulqdq $0x00,%xmm0,%xmm6,%xmm4 622 vpclmulqdq $0x00, [all...] |
/third_party/node/deps/openssl/config/archs/linux-x86_64/asm/crypto/modes/ |
H A D | aesni-gcm-x86_64.s | 41 vpclmulqdq $0x00,%xmm3,%xmm7,%xmm1 51 vpclmulqdq $0x00,%xmm3,%xmm0,%xmm5 79 vpclmulqdq $0x00,%xmm5,%xmm0,%xmm1 97 vpclmulqdq $0x00,%xmm1,%xmm0,%xmm2 119 vpclmulqdq $0x00,%xmm2,%xmm0,%xmm3 148 vpclmulqdq $0x00,%xmm3,%xmm8,%xmm2 604 vpclmulqdq $0x00,%xmm3,%xmm7,%xmm5 607 vpclmulqdq $0x00,%xmm15,%xmm1,%xmm1 610 vpclmulqdq $0x00,%xmm0,%xmm6,%xmm4 622 vpclmulqdq $0x00, [all...] |
/third_party/node/deps/openssl/config/archs/solaris64-x86_64-gcc/asm_avx2/crypto/modes/ |
H A D | aesni-gcm-x86_64.s | 41 vpclmulqdq $0x00,%xmm3,%xmm7,%xmm1 51 vpclmulqdq $0x00,%xmm3,%xmm0,%xmm5 79 vpclmulqdq $0x00,%xmm5,%xmm0,%xmm1 97 vpclmulqdq $0x00,%xmm1,%xmm0,%xmm2 119 vpclmulqdq $0x00,%xmm2,%xmm0,%xmm3 148 vpclmulqdq $0x00,%xmm3,%xmm8,%xmm2 604 vpclmulqdq $0x00,%xmm3,%xmm7,%xmm5 607 vpclmulqdq $0x00,%xmm15,%xmm1,%xmm1 610 vpclmulqdq $0x00,%xmm0,%xmm6,%xmm4 622 vpclmulqdq $0x00, [all...] |
/third_party/skia/third_party/externals/swiftshader/src/Pipeline/ |
H A D | SetupRoutine.cpp | 108 *Pointer<Byte8>(primitive + OFFSET(Primitive, invClockwiseMask)) = Byte8(0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00); in generate() 112 *Pointer<Byte8>(primitive + OFFSET(Primitive, clockwiseMask)) = Byte8(0x00, 0x00, in generate() [all...] |
/third_party/skia/third_party/externals/swiftshader/src/Shader/ |
H A D | SetupRoutine.cpp | 118 *Pointer<Byte8>(primitive + OFFSET(Primitive,invClockwiseMask)) = Byte8(0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00); in generate() 122 *Pointer<Byte8>(primitive + OFFSET(Primitive,clockwiseMask)) = Byte8(0x00, 0x00, in generate() [all...] |
/kernel/linux/linux-5.10/drivers/video/fbdev/ |
H A D | s3fb.c | 85 #define CHIP_UNKNOWN 0x00 119 static const struct vga_regset s3_h_total_regs[] = {{0x00, 0, 7}, {0x5D, 0, 0}, VGA_REGSET_END}; 277 svga_wseq_mask(par->state.vgabase, 0x0d, 0x00, 0x03); in s3fb_setup_ddc_bus() 645 svga_wcrt_mask(par->state.vgabase, 0x11, 0x00, 0x80); in s3fb_set_par() 649 svga_wcrt_mask(par->state.vgabase, 0x17, 0x00, 0x80); in s3fb_set_par() 665 svga_wcrt_mask(par->state.vgabase, 0x33, 0x00, 0x08); /* no DDR ? */ in s3fb_set_par() 666 svga_wcrt_mask(par->state.vgabase, 0x43, 0x00, 0x01); /* no DDR ? */ in s3fb_set_par() 668 svga_wcrt_mask(par->state.vgabase, 0x5D, 0x00, 0x28); /* Clear strange HSlen bits */ in s3fb_set_par() 693 svga_wattr(par->state.vgabase, 0x33, 0x00); in s3fb_set_par() 698 svga_wcrt_mask(par->state.vgabase, 0x09, 0x00, in s3fb_set_par() [all...] |
/kernel/linux/linux-5.10/sound/isa/wss/ |
H A D | wss_lib.c | 42 /* 5510 */ 0x00 | CS4231_XTAL2, 44 /* 8000 */ 0x00 | CS4231_XTAL1, 77 0x00, /* 00/00 - lic */ 78 0x00, /* 01/01 - ric */ 87 0x00, /* 0a/10 - pc */ 88 0x00, /* 0b/11 - ti */ 91 0x00, /* 0e/14 - pbru */ 92 0x00, /* 0f/15 - pbrl */ 97 0x00, /* 14/20 - tlb */ 98 0x00, /* 1 [all...] |
/kernel/linux/linux-5.10/drivers/gpu/drm/mgag200/ |
H A D | mgag200_mode.c | 947 RREG_ECRT(0x00, crtcext0); in mgag200_set_startadd() 957 WREG_ECRT(0x00, crtcext0); in mgag200_set_startadd() 964 /* 0x00: */ 0, 0, 0, 0, 0, 0, 0x00, 0, in mgag200_set_dac_regs() 967 /* 0x18: */ 0x00, 0, 0xC9, 0xFF, 0xBF, 0x20, 0x1F, 0x20, in mgag200_set_dac_regs() 968 /* 0x20: */ 0x00, 0x00, 0x00, 0x00, 0x00, in mgag200_set_dac_regs() [all...] |
/kernel/linux/linux-6.6/drivers/video/fbdev/ |
H A D | s3fb.c | 86 #define CHIP_UNKNOWN 0x00 120 static const struct vga_regset s3_h_total_regs[] = {{0x00, 0, 7}, {0x5D, 0, 0}, VGA_REGSET_END}; 278 svga_wseq_mask(par->state.vgabase, 0x0d, 0x00, 0x03); in s3fb_setup_ddc_bus() 649 svga_wcrt_mask(par->state.vgabase, 0x11, 0x00, 0x80); in s3fb_set_par() 653 svga_wcrt_mask(par->state.vgabase, 0x17, 0x00, 0x80); in s3fb_set_par() 669 svga_wcrt_mask(par->state.vgabase, 0x33, 0x00, 0x08); /* no DDR ? */ in s3fb_set_par() 670 svga_wcrt_mask(par->state.vgabase, 0x43, 0x00, 0x01); /* no DDR ? */ in s3fb_set_par() 672 svga_wcrt_mask(par->state.vgabase, 0x5D, 0x00, 0x28); /* Clear strange HSlen bits */ in s3fb_set_par() 697 svga_wattr(par->state.vgabase, 0x33, 0x00); in s3fb_set_par() 702 svga_wcrt_mask(par->state.vgabase, 0x09, 0x00, in s3fb_set_par() [all...] |
/kernel/linux/linux-6.6/sound/isa/wss/ |
H A D | wss_lib.c | 42 /* 5510 */ 0x00 | CS4231_XTAL2, 44 /* 8000 */ 0x00 | CS4231_XTAL1, 77 0x00, /* 00/00 - lic */ 78 0x00, /* 01/01 - ric */ 87 0x00, /* 0a/10 - pc */ 88 0x00, /* 0b/11 - ti */ 91 0x00, /* 0e/14 - pbru */ 92 0x00, /* 0f/15 - pbrl */ 97 0x00, /* 14/20 - tlb */ 98 0x00, /* 1 [all...] |
/third_party/libwebsockets/minimal-examples/http-server/minimal-http-server-tls-mem/ |
H A D | minimal-http-server-tls-mem.c | 139 0x30, 0x82, 0x05, 0xe6, 0x30, 0x82, 0x03, 0xce, 0xa0, 0x03, 0x02, 0x01, 0x02, 0x02, 0x09, 0x00, 141 0xf7, 0x0d, 0x01, 0x01, 0x0b, 0x05, 0x00, 0x30, 0x81, 0x86, 0x31, 0x0b, 0x30, 0x09, 0x06, 0x03, 161 0x0d, 0x06, 0x09, 0x2a, 0x86, 0x48, 0x86, 0xf7, 0x0d, 0x01, 0x01, 0x01, 0x05, 0x00, 0x03, 0x82, 162 0x02, 0x0f, 0x00, 0x30, 0x82, 0x02, 0x0a, 0x02, 0x82, 0x02, 0x01, 0x00, 0xa3, 0x62, 0xdb, 0x96, 176 0xe6, 0x00, 0x8a, 0xe6, 0x58, 0x00, 0x1e, 0xa7, 0xe5, 0xb8, 0x54, 0xa7, 0x8a, 0x05, 0xb8, 0x1e, 183 0x00, 0x28, 0xa0, 0xbd, 0x51, 0xee, 0x84, 0x7f, 0x6d, 0x7b, 0x2c, 0x54, 0x02, 0x14, 0x80, 0x4a, 194 0x8d, 0xbb, 0xb3, 0x17, 0x44, 0x9c, 0xd5, 0x2d, 0x87, 0x89, 0x08, 0xfb, 0x02, 0x03, 0x01, 0x00, 201 0x01, 0x01, 0x0b, 0x05, 0x00, [all...] |
/third_party/skia/third_party/externals/angle2/src/libANGLE/renderer/d3d/d3d11/ |
H A D | texture_format_table_autogen.cpp | 294 Initialize4ComponentData<GLubyte, 0x00, 0x00, 0x00, 0xFF>); in Get() 322 Initialize4ComponentData<GLubyte, 0x00, 0x00, 0x00, 0xFF>); in Get() 1260 Initialize4ComponentData<GLubyte, 0x00, 0x00, 0x00, 0xFF>); in Get() 1608 Initialize4ComponentData<GLubyte, 0x00, in Get() [all...] |
/kernel/linux/linux-5.10/drivers/gpu/drm/amd/pm/powerplay/smumgr/ |
H A D | fiji_smumgr.c | 89 { 0x3c0fd047, 0x30750000, 0x00, 0x03, 0x1e00, 0x00200410, 0x87020000, 0x21680000, 0x0c000000, 0, 0, 0x16, 0x00, 0x01, 0x01, 0x00, 0x00, 0x00, 0x00 }, 90 { 0xa00fd047, 0x409c0000, 0x01, 0x04, 0x1e00, 0x00800510, 0x87020000, 0x21680000, 0x11000000, 0, 0, 0x16, 0x00, 0x01, 0x01, 0x00, 0x00, 0x00, [all...] |
/kernel/linux/linux-6.6/drivers/gpu/drm/amd/pm/powerplay/smumgr/ |
H A D | fiji_smumgr.c | 89 { 0x3c0fd047, 0x30750000, 0x00, 0x03, 0x1e00, 0x00200410, 0x87020000, 0x21680000, 0x0c000000, 0, 0, 0x16, 0x00, 0x01, 0x01, 0x00, 0x00, 0x00, 0x00 }, 90 { 0xa00fd047, 0x409c0000, 0x01, 0x04, 0x1e00, 0x00800510, 0x87020000, 0x21680000, 0x11000000, 0, 0, 0x16, 0x00, 0x01, 0x01, 0x00, 0x00, 0x00, [all...] |
/third_party/vixl/test/aarch32/traces/ |
H A D | assembler-cond-rd-rn-operand-rm-shift-amount-1to31-eors-a32.h | 38 0x80, 0xd2, 0x3d, 0x00 // eors eq r13 r13 r0 LSL 5 107 0x00, 0x8d, 0x3e, 0x00 // eors eq r8 r14 r0 LSL 26 116 0xe9, 0xe2, 0x3a, 0x00 // eors eq r14 r10 r9 ROR 5 206 0x00, 0x9a, 0x3d, 0xd0 // eors le r9 r13 r0 LSL 20 272 0x08, 0x26, 0x3a, 0x00 // eors eq r2 r10 r8 LSL 12 314 0x67, 0x35, 0x37, 0x00 // eors eq r3 r7 r7 ROR 10 332 0x02, 0x32, 0x30, 0x00 // eors eq r3 r0 r2 LSL 4 344 0x0c, 0x91, 0x3d, 0x00 // eors eq r9 r13 r12 LSL 2 356 0x00, [all...] |
H A D | assembler-cond-rd-rn-operand-rm-shift-amount-1to31-rsb-a32.h | 38 0x80, 0xd2, 0x6d, 0x00 // rsb eq r13 r13 r0 LSL 5 107 0x00, 0x8d, 0x6e, 0x00 // rsb eq r8 r14 r0 LSL 26 116 0xe9, 0xe2, 0x6a, 0x00 // rsb eq r14 r10 r9 ROR 5 206 0x00, 0x9a, 0x6d, 0xd0 // rsb le r9 r13 r0 LSL 20 272 0x08, 0x26, 0x6a, 0x00 // rsb eq r2 r10 r8 LSL 12 314 0x67, 0x35, 0x67, 0x00 // rsb eq r3 r7 r7 ROR 10 332 0x02, 0x32, 0x60, 0x00 // rsb eq r3 r0 r2 LSL 4 344 0x0c, 0x91, 0x6d, 0x00 // rsb eq r9 r13 r12 LSL 2 356 0x00, [all...] |
H A D | assembler-cond-rd-rn-operand-rm-shift-amount-1to31-rsbs-a32.h | 38 0x80, 0xd2, 0x7d, 0x00 // rsbs eq r13 r13 r0 LSL 5 107 0x00, 0x8d, 0x7e, 0x00 // rsbs eq r8 r14 r0 LSL 26 116 0xe9, 0xe2, 0x7a, 0x00 // rsbs eq r14 r10 r9 ROR 5 206 0x00, 0x9a, 0x7d, 0xd0 // rsbs le r9 r13 r0 LSL 20 272 0x08, 0x26, 0x7a, 0x00 // rsbs eq r2 r10 r8 LSL 12 314 0x67, 0x35, 0x77, 0x00 // rsbs eq r3 r7 r7 ROR 10 332 0x02, 0x32, 0x70, 0x00 // rsbs eq r3 r0 r2 LSL 4 344 0x0c, 0x91, 0x7d, 0x00 // rsbs eq r9 r13 r12 LSL 2 356 0x00, [all...] |
H A D | assembler-cond-rd-rn-operand-rm-shift-amount-1to31-rsc-a32.h | 38 0x80, 0xd2, 0xed, 0x00 // rsc eq r13 r13 r0 LSL 5 107 0x00, 0x8d, 0xee, 0x00 // rsc eq r8 r14 r0 LSL 26 116 0xe9, 0xe2, 0xea, 0x00 // rsc eq r14 r10 r9 ROR 5 206 0x00, 0x9a, 0xed, 0xd0 // rsc le r9 r13 r0 LSL 20 272 0x08, 0x26, 0xea, 0x00 // rsc eq r2 r10 r8 LSL 12 314 0x67, 0x35, 0xe7, 0x00 // rsc eq r3 r7 r7 ROR 10 332 0x02, 0x32, 0xe0, 0x00 // rsc eq r3 r0 r2 LSL 4 344 0x0c, 0x91, 0xed, 0x00 // rsc eq r9 r13 r12 LSL 2 356 0x00, [all...] |
H A D | assembler-cond-rd-rn-operand-rm-shift-amount-1to31-rscs-a32.h | 38 0x80, 0xd2, 0xfd, 0x00 // rscs eq r13 r13 r0 LSL 5 107 0x00, 0x8d, 0xfe, 0x00 // rscs eq r8 r14 r0 LSL 26 116 0xe9, 0xe2, 0xfa, 0x00 // rscs eq r14 r10 r9 ROR 5 206 0x00, 0x9a, 0xfd, 0xd0 // rscs le r9 r13 r0 LSL 20 272 0x08, 0x26, 0xfa, 0x00 // rscs eq r2 r10 r8 LSL 12 314 0x67, 0x35, 0xf7, 0x00 // rscs eq r3 r7 r7 ROR 10 332 0x02, 0x32, 0xf0, 0x00 // rscs eq r3 r0 r2 LSL 4 344 0x0c, 0x91, 0xfd, 0x00 // rscs eq r9 r13 r12 LSL 2 356 0x00, [all...] |
H A D | assembler-cond-rd-rn-operand-rm-shift-amount-1to31-sbc-a32.h | 38 0x80, 0xd2, 0xcd, 0x00 // sbc eq r13 r13 r0 LSL 5 107 0x00, 0x8d, 0xce, 0x00 // sbc eq r8 r14 r0 LSL 26 116 0xe9, 0xe2, 0xca, 0x00 // sbc eq r14 r10 r9 ROR 5 206 0x00, 0x9a, 0xcd, 0xd0 // sbc le r9 r13 r0 LSL 20 272 0x08, 0x26, 0xca, 0x00 // sbc eq r2 r10 r8 LSL 12 314 0x67, 0x35, 0xc7, 0x00 // sbc eq r3 r7 r7 ROR 10 332 0x02, 0x32, 0xc0, 0x00 // sbc eq r3 r0 r2 LSL 4 344 0x0c, 0x91, 0xcd, 0x00 // sbc eq r9 r13 r12 LSL 2 356 0x00, [all...] |
H A D | assembler-cond-rd-rn-operand-rm-shift-amount-1to31-sbcs-a32.h | 38 0x80, 0xd2, 0xdd, 0x00 // sbcs eq r13 r13 r0 LSL 5 107 0x00, 0x8d, 0xde, 0x00 // sbcs eq r8 r14 r0 LSL 26 116 0xe9, 0xe2, 0xda, 0x00 // sbcs eq r14 r10 r9 ROR 5 206 0x00, 0x9a, 0xdd, 0xd0 // sbcs le r9 r13 r0 LSL 20 272 0x08, 0x26, 0xda, 0x00 // sbcs eq r2 r10 r8 LSL 12 314 0x67, 0x35, 0xd7, 0x00 // sbcs eq r3 r7 r7 ROR 10 332 0x02, 0x32, 0xd0, 0x00 // sbcs eq r3 r0 r2 LSL 4 344 0x0c, 0x91, 0xdd, 0x00 // sbcs eq r9 r13 r12 LSL 2 356 0x00, [all...] |
H A D | assembler-cond-rd-rn-operand-rm-shift-amount-1to31-sub-a32.h | 38 0x80, 0xd2, 0x4d, 0x00 // sub eq r13 r13 r0 LSL 5 107 0x00, 0x8d, 0x4e, 0x00 // sub eq r8 r14 r0 LSL 26 116 0xe9, 0xe2, 0x4a, 0x00 // sub eq r14 r10 r9 ROR 5 206 0x00, 0x9a, 0x4d, 0xd0 // sub le r9 r13 r0 LSL 20 272 0x08, 0x26, 0x4a, 0x00 // sub eq r2 r10 r8 LSL 12 314 0x67, 0x35, 0x47, 0x00 // sub eq r3 r7 r7 ROR 10 332 0x02, 0x32, 0x40, 0x00 // sub eq r3 r0 r2 LSL 4 344 0x0c, 0x91, 0x4d, 0x00 // sub eq r9 r13 r12 LSL 2 356 0x00, [all...] |
H A D | assembler-cond-rd-rn-operand-rm-shift-amount-1to31-subs-a32.h | 38 0x80, 0xd2, 0x5d, 0x00 // subs eq r13 r13 r0 LSL 5 107 0x00, 0x8d, 0x5e, 0x00 // subs eq r8 r14 r0 LSL 26 116 0xe9, 0xe2, 0x5a, 0x00 // subs eq r14 r10 r9 ROR 5 206 0x00, 0x9a, 0x5d, 0xd0 // subs le r9 r13 r0 LSL 20 272 0x08, 0x26, 0x5a, 0x00 // subs eq r2 r10 r8 LSL 12 314 0x67, 0x35, 0x57, 0x00 // subs eq r3 r7 r7 ROR 10 332 0x02, 0x32, 0x50, 0x00 // subs eq r3 r0 r2 LSL 4 344 0x0c, 0x91, 0x5d, 0x00 // subs eq r9 r13 r12 LSL 2 356 0x00, [all...] |
H A D | assembler-cond-rd-rn-operand-rm-shift-amount-1to31-adc-a32.h | 38 0x80, 0xd2, 0xad, 0x00 // adc eq r13 r13 r0 LSL 5 107 0x00, 0x8d, 0xae, 0x00 // adc eq r8 r14 r0 LSL 26 116 0xe9, 0xe2, 0xaa, 0x00 // adc eq r14 r10 r9 ROR 5 206 0x00, 0x9a, 0xad, 0xd0 // adc le r9 r13 r0 LSL 20 272 0x08, 0x26, 0xaa, 0x00 // adc eq r2 r10 r8 LSL 12 314 0x67, 0x35, 0xa7, 0x00 // adc eq r3 r7 r7 ROR 10 332 0x02, 0x32, 0xa0, 0x00 // adc eq r3 r0 r2 LSL 4 344 0x0c, 0x91, 0xad, 0x00 // adc eq r9 r13 r12 LSL 2 356 0x00, [all...] |
H A D | assembler-cond-rd-rn-operand-rm-shift-amount-1to31-adcs-a32.h | 38 0x80, 0xd2, 0xbd, 0x00 // adcs eq r13 r13 r0 LSL 5 107 0x00, 0x8d, 0xbe, 0x00 // adcs eq r8 r14 r0 LSL 26 116 0xe9, 0xe2, 0xba, 0x00 // adcs eq r14 r10 r9 ROR 5 206 0x00, 0x9a, 0xbd, 0xd0 // adcs le r9 r13 r0 LSL 20 272 0x08, 0x26, 0xba, 0x00 // adcs eq r2 r10 r8 LSL 12 314 0x67, 0x35, 0xb7, 0x00 // adcs eq r3 r7 r7 ROR 10 332 0x02, 0x32, 0xb0, 0x00 // adcs eq r3 r0 r2 LSL 4 344 0x0c, 0x91, 0xbd, 0x00 // adcs eq r9 r13 r12 LSL 2 356 0x00, [all...] |