Lines Matching refs:x00
86 #define CHIP_UNKNOWN 0x00
120 static const struct vga_regset s3_h_total_regs[] = {{0x00, 0, 7}, {0x5D, 0, 0}, VGA_REGSET_END};
278 svga_wseq_mask(par->state.vgabase, 0x0d, 0x00, 0x03);
649 svga_wcrt_mask(par->state.vgabase, 0x11, 0x00, 0x80);
653 svga_wcrt_mask(par->state.vgabase, 0x17, 0x00, 0x80);
669 svga_wcrt_mask(par->state.vgabase, 0x33, 0x00, 0x08); /* no DDR ? */
670 svga_wcrt_mask(par->state.vgabase, 0x43, 0x00, 0x01); /* no DDR ? */
672 svga_wcrt_mask(par->state.vgabase, 0x5D, 0x00, 0x28); /* Clear strange HSlen bits */
697 svga_wattr(par->state.vgabase, 0x33, 0x00);
702 svga_wcrt_mask(par->state.vgabase, 0x09, 0x00, 0x80);
707 svga_wcrt_mask(par->state.vgabase, 0x42, 0x00, 0x20);
710 svga_wcrt_mask(par->state.vgabase, 0x45, 0x00, 0x01);
712 svga_wcrt_mask(par->state.vgabase, 0x67, 0x00, 0x0C);
719 vga_wcrt(par->state.vgabase, 0x90, 0x00);
724 vga_wcrt(par->state.vgabase, 0x50, 0x00);
753 vga_wcrt(par->state.vgabase, 0x34, 0x00);
757 svga_wcrt_mask(par->state.vgabase, 0x31, 0x00, 0x40);
768 svga_wcrt_mask(par->state.vgabase, 0x50, 0x00, 0x30);
769 svga_wcrt_mask(par->state.vgabase, 0x67, 0x00, 0xF0);
772 svga_wcrt_mask(par->state.vgabase, 0x3A, 0x00, 0x30);
784 svga_wcrt_mask(par->state.vgabase, 0x50, 0x00, 0x30);
785 svga_wcrt_mask(par->state.vgabase, 0x67, 0x00, 0xF0);
788 svga_wcrt_mask(par->state.vgabase, 0x3A, 0x00, 0x30);
794 svga_wcrt_mask(par->state.vgabase, 0x50, 0x00, 0x30);
795 svga_wcrt_mask(par->state.vgabase, 0x67, 0x00, 0xF0);
798 svga_wcrt_mask(par->state.vgabase, 0x3A, 0x00, 0x30);
802 svga_wcrt_mask(par->state.vgabase, 0x50, 0x00, 0x30);
810 svga_wcrt_mask(par->state.vgabase, 0x67, 0x00, 0xF0);
888 svga_wseq_mask(par->state.vgabase, 0x15, multiplex ? 0x10 : 0x00, 0x10);
889 svga_wseq_mask(par->state.vgabase, 0x18, multiplex ? 0x80 : 0x00, 0x80);
911 memset_io(info->screen_base, 0x00, screen_size);
914 svga_wseq_mask(par->state.vgabase, 0x01, 0x00, 0x20);
989 svga_wcrt_mask(par->state.vgabase, 0x56, 0x00, 0x06);
990 svga_wseq_mask(par->state.vgabase, 0x01, 0x00, 0x20);
994 svga_wcrt_mask(par->state.vgabase, 0x56, 0x00, 0x06);
1104 case 0x00: