Lines Matching refs:x00
85 #define CHIP_UNKNOWN 0x00
119 static const struct vga_regset s3_h_total_regs[] = {{0x00, 0, 7}, {0x5D, 0, 0}, VGA_REGSET_END};
277 svga_wseq_mask(par->state.vgabase, 0x0d, 0x00, 0x03);
645 svga_wcrt_mask(par->state.vgabase, 0x11, 0x00, 0x80);
649 svga_wcrt_mask(par->state.vgabase, 0x17, 0x00, 0x80);
665 svga_wcrt_mask(par->state.vgabase, 0x33, 0x00, 0x08); /* no DDR ? */
666 svga_wcrt_mask(par->state.vgabase, 0x43, 0x00, 0x01); /* no DDR ? */
668 svga_wcrt_mask(par->state.vgabase, 0x5D, 0x00, 0x28); /* Clear strange HSlen bits */
693 svga_wattr(par->state.vgabase, 0x33, 0x00);
698 svga_wcrt_mask(par->state.vgabase, 0x09, 0x00, 0x80);
703 svga_wcrt_mask(par->state.vgabase, 0x42, 0x00, 0x20);
706 svga_wcrt_mask(par->state.vgabase, 0x45, 0x00, 0x01);
708 svga_wcrt_mask(par->state.vgabase, 0x67, 0x00, 0x0C);
715 vga_wcrt(par->state.vgabase, 0x90, 0x00);
720 vga_wcrt(par->state.vgabase, 0x50, 0x00);
749 vga_wcrt(par->state.vgabase, 0x34, 0x00);
753 svga_wcrt_mask(par->state.vgabase, 0x31, 0x00, 0x40);
764 svga_wcrt_mask(par->state.vgabase, 0x50, 0x00, 0x30);
765 svga_wcrt_mask(par->state.vgabase, 0x67, 0x00, 0xF0);
768 svga_wcrt_mask(par->state.vgabase, 0x3A, 0x00, 0x30);
780 svga_wcrt_mask(par->state.vgabase, 0x50, 0x00, 0x30);
781 svga_wcrt_mask(par->state.vgabase, 0x67, 0x00, 0xF0);
784 svga_wcrt_mask(par->state.vgabase, 0x3A, 0x00, 0x30);
790 svga_wcrt_mask(par->state.vgabase, 0x50, 0x00, 0x30);
791 svga_wcrt_mask(par->state.vgabase, 0x67, 0x00, 0xF0);
794 svga_wcrt_mask(par->state.vgabase, 0x3A, 0x00, 0x30);
798 svga_wcrt_mask(par->state.vgabase, 0x50, 0x00, 0x30);
806 svga_wcrt_mask(par->state.vgabase, 0x67, 0x00, 0xF0);
884 svga_wseq_mask(par->state.vgabase, 0x15, multiplex ? 0x10 : 0x00, 0x10);
885 svga_wseq_mask(par->state.vgabase, 0x18, multiplex ? 0x80 : 0x00, 0x80);
907 memset_io(info->screen_base, 0x00, screen_size);
910 svga_wseq_mask(par->state.vgabase, 0x01, 0x00, 0x20);
985 svga_wcrt_mask(par->state.vgabase, 0x56, 0x00, 0x06);
986 svga_wseq_mask(par->state.vgabase, 0x01, 0x00, 0x20);
990 svga_wcrt_mask(par->state.vgabase, 0x56, 0x00, 0x06);
1100 case 0x00: