| /third_party/backends/backend/ |
| H A D | qcam.c | 368 qc_waithand (QC_Device * q, int val) in qc_waithand() argument
372 while (((status = read_lpstatus (q)) & CamRdy1) != val); in qc_waithand()
381 qc_waithand2 (QC_Device * q, int val) in qc_waithand2() argument
389 while ((status & CamRdy2) != (unsigned int) val); in qc_waithand2()
461 switch (s->val[OPT_XFER_SCALE].w) in qc_setscanmode()
473 switch (s->val[OPT_DEPTH].w) in qc_setscanmode()
484 switch (s->val[OPT_XFER_SCALE].w) in qc_setscanmode()
501 if (s->val[OPT_TEST].w) in qc_setscanmode()
551 switch (s->val[OPT_DEPTH].w) in qc_readbytes()
593 switch (s->val[OPT_DEPT in qc_readbytes()
916 u_char val; reader_process() local
1678 sane_control_option(SANE_Handle handle, SANE_Int option, SANE_Action action, void *val, SANE_Int * info) sane_control_option() argument
2023 int val, val2; sane_start() local
[all...] |
| /base/inputmethod/imf/common/include/ |
| H A D | itypes_util.h | 111 static bool Marshalling(const std::vector<T> &val, MessageParcel &parcel);
113 static bool Unmarshalling(std::vector<T> &val, MessageParcel &parcel);
116 static bool Marshalling(const std::map<K, V> &val, MessageParcel &parcel);
118 static bool Unmarshalling(std::map<K, V> &val, MessageParcel &parcel);
121 static bool Marshalling(const std::unordered_map<K, V> &val, MessageParcel &parcel);
123 static bool Unmarshalling(std::unordered_map<K, V> &val, MessageParcel &parcel);
132 bool ITypesUtil::Marshalling(const std::vector<T> &val, MessageParcel &parcel) in Marshalling() argument
134 if (val.size() > INT_MAX) { in Marshalling()
138 if (!parcel.WriteInt32(static_cast<int32_t>(val.size()))) { in Marshalling()
142 for (auto &v : val) { in Marshalling()
151 Unmarshalling(std::vector<T> &val, MessageParcel &parcel) Unmarshalling() argument
214 Unmarshalling(std::map<K, V> &val, MessageParcel &parcel) Unmarshalling() argument
262 Unmarshalling(std::unordered_map<K, V> &val, MessageParcel &parcel) Unmarshalling() argument
[all...] |
| /kernel/linux/linux-5.10/arch/arm64/mm/ |
| H A D | ptdump.c | 93 u64 val; member
101 .val = PTE_VALID,
106 .val = PTE_USER,
111 .val = PTE_RDONLY,
116 .val = PTE_PXN,
121 .val = PTE_SHARED,
126 .val = PTE_AF,
131 .val = PTE_NG,
136 .val = PTE_CONT,
141 .val
259 note_page(struct ptdump_state *pt_st, unsigned long addr, int level, u64 val) note_page() argument
[all...] |
| /kernel/linux/linux-5.10/arch/arm/mach-s3c/ |
| H A D | iotiming-s3c2410.c | 105 unsigned long val; in calc_0124() local
112 val = 0; in calc_0124()
115 val = 1; in calc_0124()
118 val = 2; in calc_0124()
122 val = 3; in calc_0124()
128 *v |= val << shift; in calc_0124()
153 unsigned long val; in calc_tacc() local
164 val = 0; in calc_tacc()
171 val = div - 1; in calc_tacc()
176 val in calc_tacc()
264 get_tacc(unsigned long hclk_tns, unsigned long val) get_tacc() argument
276 get_0124(unsigned long hclk_tns, unsigned long val) get_0124() argument
[all...] |
| /kernel/linux/linux-5.10/drivers/clk/tegra/ |
| H A D | clk-sdmmc-mux.c | 26 #define get_div_field(val) ((val) & DIV_MASK)
27 #define get_mux_field(val) (((val) & MUX_MASK) >> MUX_SHIFT)
45 u32 src, val; in clk_sdmmc_mux_get_parent() local
50 val = readl_relaxed(sdmmc_mux->reg); in clk_sdmmc_mux_get_parent()
51 src = get_mux_field(val); in clk_sdmmc_mux_get_parent()
52 if (get_div_field(val)) in clk_sdmmc_mux_get_parent()
70 u32 val; in clk_sdmmc_mux_set_parent() local
73 val in clk_sdmmc_mux_set_parent()
91 u32 val; clk_sdmmc_mux_recalc_rate() local
139 u32 val; clk_sdmmc_mux_set_rate() local
[all...] |
| /kernel/linux/linux-5.10/drivers/hwmon/ |
| H A D | ltc4245.c | 132 s32 val; in ltc4245_update_device() local
141 val = i2c_smbus_read_byte_data(client, i); in ltc4245_update_device()
142 if (unlikely(val < 0)) in ltc4245_update_device()
145 data->cregs[i] = val; in ltc4245_update_device()
150 val = i2c_smbus_read_byte_data(client, i+0x10); in ltc4245_update_device()
151 if (unlikely(val < 0)) in ltc4245_update_device()
154 data->vregs[i] = val; in ltc4245_update_device()
269 long *val) in ltc4245_read_curr()
275 *val = ltc4245_get_current(dev, ltc4245_curr_regs[channel]); in ltc4245_read_curr()
278 *val in ltc4245_read_curr()
268 ltc4245_read_curr(struct device *dev, u32 attr, int channel, long *val) ltc4245_read_curr() argument
285 ltc4245_read_in(struct device *dev, u32 attr, int channel, long *val) ltc4245_read_in() argument
314 ltc4245_read_power(struct device *dev, u32 attr, int channel, long *val) ltc4245_read_power() argument
332 ltc4245_read(struct device *dev, enum hwmon_sensor_types type, u32 attr, int channel, long *val) ltc4245_read() argument
[all...] |
| /kernel/linux/linux-5.10/drivers/media/i2c/ |
| H A D | ths7303.c | 67 static int ths7303_write(struct v4l2_subdev *sd, u8 reg, u8 val) in ths7303_write() argument
74 ret = i2c_smbus_write_byte_data(client, reg, val); in ths7303_write()
88 u8 val, sel = 0; in ths7303_setval() local
112 val = (sel << 6) | (sel << 3); in ths7303_setval()
114 val |= (pdata->ch_1 & 0x27); in ths7303_setval()
115 err = ths7303_write(sd, THS7303_CHANNEL_1, val); in ths7303_setval()
119 val = (sel << 6) | (sel << 3); in ths7303_setval()
121 val |= (pdata->ch_2 & 0x27); in ths7303_setval()
122 err = ths7303_write(sd, THS7303_CHANNEL_2, val); in ths7303_setval()
126 val in ths7303_setval()
266 u8 val = ths7303_read(sd, reg); ths7303_log_channel_status() local
[all...] |
| /kernel/linux/linux-5.10/drivers/net/wireless/mediatek/mt7601u/ |
| H A D | tx.c | 265 u32 val; in mt7601u_conf_tx() local
281 val = FIELD_PREP(MT_EDCA_CFG_AIFSN, params->aifs) | in mt7601u_conf_tx()
289 val |= 0x60; in mt7601u_conf_tx()
291 val |= FIELD_PREP(MT_EDCA_CFG_TXOP, params->txop); in mt7601u_conf_tx()
292 mt76_wr(dev, MT_EDCA_CFG_AC(hw_q), val); in mt7601u_conf_tx()
294 val = mt76_rr(dev, MT_WMM_TXOP(hw_q)); in mt7601u_conf_tx()
295 val &= ~(MT_WMM_TXOP_MASK << MT_WMM_TXOP_SHIFT(hw_q)); in mt7601u_conf_tx()
296 val |= params->txop << MT_WMM_TXOP_SHIFT(hw_q); in mt7601u_conf_tx()
297 mt76_wr(dev, MT_WMM_TXOP(hw_q), val); in mt7601u_conf_tx()
299 val in mt7601u_conf_tx()
[all...] |
| /kernel/linux/linux-5.10/sound/soc/xilinx/ |
| H A D | xlnx_spdif.c | 57 u32 val; in xlnx_spdifrx_irq_handler() local
60 val = readl(ctx->base + XSPDIF_IRQ_STS_REG); in xlnx_spdifrx_irq_handler()
61 if (val & XSPDIF_CH_STS_MASK) { in xlnx_spdifrx_irq_handler()
62 writel(val & XSPDIF_CH_STS_MASK, in xlnx_spdifrx_irq_handler()
64 val = readl(ctx->base + in xlnx_spdifrx_irq_handler()
66 writel(val & ~XSPDIF_CH_STS_MASK, in xlnx_spdifrx_irq_handler()
80 u32 val; in xlnx_spdif_startup() local
83 val = readl(ctx->base + XSPDIF_CONTROL_REG); in xlnx_spdif_startup()
84 val |= XSPDIF_FIFO_FLUSH_MASK; in xlnx_spdif_startup()
85 writel(val, ct in xlnx_spdif_startup()
109 u32 val, clk_div, clk_cfg; xlnx_spdif_hw_params() local
171 u32 val; xlnx_spdif_trigger() local
[all...] |
| /kernel/linux/linux-5.10/drivers/xen/xen-pciback/ |
| H A D | conf_space_header.c | 17 u16 val; member
21 u32 val; member
42 err = pci_read_config_word(dev, PCI_COMMAND, &cmd->val); in command_init()
57 *value |= cmd->val & ~PCI_COMMAND_GUEST; in command_read()
66 u16 val; in command_write() local
92 if (!(cmd->val & PCI_COMMAND_INVALIDATE) && in command_write()
101 } else if ((cmd->val & PCI_COMMAND_INVALIDATE) && in command_write()
108 ((cmd->val ^ value) & PCI_COMMAND_INTX_DISABLE)) in command_write()
111 cmd->val = value; in command_write()
117 err = pci_read_config_word(dev, offset, &val); in command_write()
[all...] |
| /kernel/linux/linux-5.10/drivers/pinctrl/visconti/ |
| H A D | pinctrl-common.c | 46 unsigned int val, set_val, pude_val; in visconti_pin_config_set() local
64 val = readl(priv->base + pin->pudsel_offset); in visconti_pin_config_set()
65 val &= ~BIT(pin->pud_shift); in visconti_pin_config_set()
66 val |= set_val << pin->pud_shift; in visconti_pin_config_set()
67 writel(val, priv->base + pin->pudsel_offset); in visconti_pin_config_set()
72 val = readl(priv->base + pin->pude_offset); in visconti_pin_config_set()
73 val &= ~BIT(pin->pud_shift); in visconti_pin_config_set()
74 val |= pude_val << pin->pud_shift; in visconti_pin_config_set()
75 writel(val, priv->base + pin->pude_offset); in visconti_pin_config_set()
76 dev_dbg(priv->dev, "BIAS(%d): off = 0x%x val in visconti_pin_config_set()
227 unsigned int val; visconti_set_mux() local
[all...] |
| /kernel/linux/linux-6.6/drivers/media/i2c/ |
| H A D | ths7303.c | 67 static int ths7303_write(struct v4l2_subdev *sd, u8 reg, u8 val) in ths7303_write() argument
74 ret = i2c_smbus_write_byte_data(client, reg, val); in ths7303_write()
88 u8 val, sel = 0; in ths7303_setval() local
112 val = (sel << 6) | (sel << 3); in ths7303_setval()
114 val |= (pdata->ch_1 & 0x27); in ths7303_setval()
115 err = ths7303_write(sd, THS7303_CHANNEL_1, val); in ths7303_setval()
119 val = (sel << 6) | (sel << 3); in ths7303_setval()
121 val |= (pdata->ch_2 & 0x27); in ths7303_setval()
122 err = ths7303_write(sd, THS7303_CHANNEL_2, val); in ths7303_setval()
126 val in ths7303_setval()
266 u8 val = ths7303_read(sd, reg); ths7303_log_channel_status() local
[all...] |
| /kernel/linux/linux-6.6/drivers/xen/xen-pciback/ |
| H A D | conf_space_header.c | 17 u16 val; member
21 u32 val; member
42 err = pci_read_config_word(dev, PCI_COMMAND, &cmd->val); in command_init()
57 *value |= cmd->val & ~PCI_COMMAND_GUEST; in command_read()
66 u16 val; in command_write() local
92 if (!(cmd->val & PCI_COMMAND_INVALIDATE) && in command_write()
101 } else if ((cmd->val & PCI_COMMAND_INVALIDATE) && in command_write()
108 ((cmd->val ^ value) & PCI_COMMAND_INTX_DISABLE)) in command_write()
111 cmd->val = value; in command_write()
117 err = pci_read_config_word(dev, offset, &val); in command_write()
[all...] |
| /kernel/linux/linux-6.6/drivers/gpio/ |
| H A D | gpio-mlxbf3.c | 60 u32 val; in mlxbf3_gpio_irq_enable() local
67 val = readl(gs->gpio_cause_io + MLXBF_GPIO_CAUSE_OR_EVTEN0); in mlxbf3_gpio_irq_enable()
68 val |= BIT(offset); in mlxbf3_gpio_irq_enable()
69 writel(val, gs->gpio_cause_io + MLXBF_GPIO_CAUSE_OR_EVTEN0); in mlxbf3_gpio_irq_enable()
79 u32 val; in mlxbf3_gpio_irq_disable() local
82 val = readl(gs->gpio_cause_io + MLXBF_GPIO_CAUSE_OR_EVTEN0); in mlxbf3_gpio_irq_disable()
83 val &= ~BIT(offset); in mlxbf3_gpio_irq_disable()
84 writel(val, gs->gpio_cause_io + MLXBF_GPIO_CAUSE_OR_EVTEN0); in mlxbf3_gpio_irq_disable()
113 u32 val; in mlxbf3_gpio_irq_set_type() local
119 val in mlxbf3_gpio_irq_set_type()
[all...] |
| /kernel/linux/linux-6.6/drivers/clk/tegra/ |
| H A D | clk-sdmmc-mux.c | 26 #define get_div_field(val) ((val) & DIV_MASK)
27 #define get_mux_field(val) (((val) & MUX_MASK) >> MUX_SHIFT)
45 u32 src, val; in clk_sdmmc_mux_get_parent() local
50 val = readl_relaxed(sdmmc_mux->reg); in clk_sdmmc_mux_get_parent()
51 src = get_mux_field(val); in clk_sdmmc_mux_get_parent()
52 if (get_div_field(val)) in clk_sdmmc_mux_get_parent()
70 u32 val; in clk_sdmmc_mux_set_parent() local
73 val in clk_sdmmc_mux_set_parent()
91 u32 val; clk_sdmmc_mux_recalc_rate() local
139 u32 val; clk_sdmmc_mux_set_rate() local
[all...] |
| /kernel/linux/linux-6.6/drivers/net/wireless/mediatek/mt7601u/ |
| H A D | tx.c | 266 u32 val; in mt7601u_conf_tx() local
282 val = FIELD_PREP(MT_EDCA_CFG_AIFSN, params->aifs) | in mt7601u_conf_tx()
290 val |= 0x60; in mt7601u_conf_tx()
292 val |= FIELD_PREP(MT_EDCA_CFG_TXOP, params->txop); in mt7601u_conf_tx()
293 mt76_wr(dev, MT_EDCA_CFG_AC(hw_q), val); in mt7601u_conf_tx()
295 val = mt76_rr(dev, MT_WMM_TXOP(hw_q)); in mt7601u_conf_tx()
296 val &= ~(MT_WMM_TXOP_MASK << MT_WMM_TXOP_SHIFT(hw_q)); in mt7601u_conf_tx()
297 val |= params->txop << MT_WMM_TXOP_SHIFT(hw_q); in mt7601u_conf_tx()
298 mt76_wr(dev, MT_WMM_TXOP(hw_q), val); in mt7601u_conf_tx()
300 val in mt7601u_conf_tx()
[all...] |
| /kernel/linux/linux-6.6/drivers/hwmon/ |
| H A D | ltc4245.c | 132 s32 val; in ltc4245_update_device() local
141 val = i2c_smbus_read_byte_data(client, i); in ltc4245_update_device()
142 if (unlikely(val < 0)) in ltc4245_update_device()
145 data->cregs[i] = val; in ltc4245_update_device()
150 val = i2c_smbus_read_byte_data(client, i+0x10); in ltc4245_update_device()
151 if (unlikely(val < 0)) in ltc4245_update_device()
154 data->vregs[i] = val; in ltc4245_update_device()
269 long *val) in ltc4245_read_curr()
275 *val = ltc4245_get_current(dev, ltc4245_curr_regs[channel]); in ltc4245_read_curr()
278 *val in ltc4245_read_curr()
268 ltc4245_read_curr(struct device *dev, u32 attr, int channel, long *val) ltc4245_read_curr() argument
285 ltc4245_read_in(struct device *dev, u32 attr, int channel, long *val) ltc4245_read_in() argument
314 ltc4245_read_power(struct device *dev, u32 attr, int channel, long *val) ltc4245_read_power() argument
332 ltc4245_read(struct device *dev, enum hwmon_sensor_types type, u32 attr, int channel, long *val) ltc4245_read() argument
[all...] |
| H A D | lm83.c | 109 static int lm83_regmap_reg_read(void *context, unsigned int reg, unsigned int *val) in lm83_regmap_reg_read() argument
118 *val = ret; in lm83_regmap_reg_read()
128 static int lm83_regmap_reg_write(void *context, unsigned int reg, unsigned int val) in lm83_regmap_reg_write() argument
147 return i2c_smbus_write_byte_data(client, reg, val); in lm83_regmap_reg_write()
176 static int lm83_temp_read(struct device *dev, u32 attr, int channel, long *val) in lm83_temp_read() argument
187 *val = (s8)regval * 1000; in lm83_temp_read()
193 *val = (s8)regval * 1000; in lm83_temp_read()
199 *val = (s8)regval * 1000; in lm83_temp_read()
205 *val = !!(regval & LM83_MAX_ALARM_BIT[channel]); in lm83_temp_read()
211 *val in lm83_temp_read()
225 lm83_temp_write(struct device *dev, u32 attr, int channel, long val) lm83_temp_write() argument
250 lm83_chip_read(struct device *dev, u32 attr, int channel, long *val) lm83_chip_read() argument
274 lm83_read(struct device *dev, enum hwmon_sensor_types type, u32 attr, int channel, long *val) lm83_read() argument
287 lm83_write(struct device *dev, enum hwmon_sensor_types type, u32 attr, int channel, long val) lm83_write() argument
[all...] |
| /kernel/linux/linux-6.6/sound/soc/mediatek/mt8195/ |
| H A D | mt8195-dai-pcm.c | 131 unsigned int val = 0; in mtk_dai_pcm_configure() local
149 val |= PCM_INTF_CON2_SYNC_FREQ_MODE(fs); in mtk_dai_pcm_configure()
154 val |= PCM_INTF_CON2_CLK_DOMAIN_SEL(MTK_DAI_PCM_CLK_26M_441K); in mtk_dai_pcm_configure()
156 val |= PCM_INTF_CON2_CLK_DOMAIN_SEL(MTK_DAI_PCM_CLK_26M_48K); in mtk_dai_pcm_configure()
159 regmap_update_bits(afe->regmap, PCM_INTF_CON2, mask, val); in mtk_dai_pcm_configure()
161 val = 0; in mtk_dai_pcm_configure()
168 val |= PCM_INTF_CON1_PCM_MODE(mode); in mtk_dai_pcm_configure()
172 val |= PCM_INTF_CON1_PCM_FMT(fmt); in mtk_dai_pcm_configure()
178 val |= PCM_INTF_CON1_SYNC_LENGTH(1); in mtk_dai_pcm_configure()
180 val | in mtk_dai_pcm_configure()
[all...] |
| /kernel/linux/linux-6.6/sound/soc/xilinx/ |
| H A D | xlnx_spdif.c | 57 u32 val; in xlnx_spdifrx_irq_handler() local
60 val = readl(ctx->base + XSPDIF_IRQ_STS_REG); in xlnx_spdifrx_irq_handler()
61 if (val & XSPDIF_CH_STS_MASK) { in xlnx_spdifrx_irq_handler()
62 writel(val & XSPDIF_CH_STS_MASK, in xlnx_spdifrx_irq_handler()
64 val = readl(ctx->base + in xlnx_spdifrx_irq_handler()
66 writel(val & ~XSPDIF_CH_STS_MASK, in xlnx_spdifrx_irq_handler()
80 u32 val; in xlnx_spdif_startup() local
83 val = readl(ctx->base + XSPDIF_CONTROL_REG); in xlnx_spdif_startup()
84 val |= XSPDIF_FIFO_FLUSH_MASK; in xlnx_spdif_startup()
85 writel(val, ct in xlnx_spdif_startup()
109 u32 val, clk_div, clk_cfg; xlnx_spdif_hw_params() local
171 u32 val; xlnx_spdif_trigger() local
[all...] |
| /third_party/libunwind/libunwind/include/tdep-s390x/ |
| H A D | libunwind_i.h | 80 #define DWARF_GET_LOC(l) ((l).val)
91 # define DWARF_LOC(r, t) ((dwarf_loc_t) { .val = (r), .type = (t) })
107 ({ dwarf_loc_t _l = (l); _l.val == 0 && _l.type == 0; })
115 dwarf_getfp (struct dwarf_cursor *c, dwarf_loc_t loc, unw_fpreg_t *val) in dwarf_getfp() argument
123 return (*c->as->acc.access_fpreg) (c->as, DWARF_GET_LOC (loc), val, in dwarf_getfp()
127 return (*c->as->acc.access_reg) (c->as, DWARF_GET_LOC (loc), (unw_word_t*)val, in dwarf_getfp()
130 return (*c->as->acc.access_mem) (c->as, DWARF_GET_LOC (loc), (unw_word_t*)val, in dwarf_getfp()
133 *val = *(unw_fpreg_t*) DWARF_GET_LOC (loc); in dwarf_getfp()
138 dwarf_putfp (struct dwarf_cursor *c, dwarf_loc_t loc, unw_fpreg_t val) in dwarf_putfp() argument
147 return (*c->as->acc.access_fpreg) (c->as, DWARF_GET_LOC (loc), &val, in dwarf_putfp()
160 dwarf_get(struct dwarf_cursor *c, dwarf_loc_t loc, unw_word_t *val) dwarf_get() argument
183 dwarf_put(struct dwarf_cursor *c, dwarf_loc_t loc, unw_word_t val) dwarf_put() argument
[all...] |
| /third_party/mbedtls/library/ |
| H A D | asn1write.c | 200 static int asn1_write_tagged_int(unsigned char **p, const unsigned char *start, int val, int tag) in asn1_write_tagged_int() argument
209 *--(*p) = val & 0xff; in asn1_write_tagged_int()
210 val >>= 8; in asn1_write_tagged_int()
211 } while (val > 0); in asn1_write_tagged_int()
224 int mbedtls_asn1_write_int(unsigned char **p, const unsigned char *start, int val) in mbedtls_asn1_write_int() argument
226 return asn1_write_tagged_int(p, start, val, MBEDTLS_ASN1_INTEGER); in mbedtls_asn1_write_int()
229 int mbedtls_asn1_write_enum(unsigned char **p, const unsigned char *start, int val) in mbedtls_asn1_write_enum() argument
231 return asn1_write_tagged_int(p, start, val, MBEDTLS_ASN1_ENUMERATED); in mbedtls_asn1_write_enum()
377 const unsigned char *val, in mbedtls_asn1_store_named_data()
400 cur->val in mbedtls_asn1_store_named_data()
374 mbedtls_asn1_store_named_data( mbedtls_asn1_named_data **head, const char *oid, size_t oid_len, const unsigned char *val, size_t val_len) mbedtls_asn1_store_named_data() argument
[all...] |
| /kernel/linux/linux-5.10/drivers/media/tuners/ |
| H A D | mxl5005s.c | 238 u16 val[25]; /* Binary representation of Value */ member
731 state->Init_Ctrl[0].val[0] = 0; in MXL5005_ControlInit()
737 state->Init_Ctrl[1].val[0] = 1; in MXL5005_ControlInit()
743 state->Init_Ctrl[2].val[0] = 0; in MXL5005_ControlInit()
746 state->Init_Ctrl[2].val[1] = 1; in MXL5005_ControlInit()
752 state->Init_Ctrl[3].val[0] = 0; in MXL5005_ControlInit()
758 state->Init_Ctrl[4].val[0] = 0; in MXL5005_ControlInit()
761 state->Init_Ctrl[4].val[1] = 0; in MXL5005_ControlInit()
764 state->Init_Ctrl[4].val[2] = 1; in MXL5005_ControlInit()
770 state->Init_Ctrl[5].val[ in MXL5005_ControlInit()
3875 mxl5005s_writereg(struct dvb_frontend *fe, u8 reg, u8 val, int latch) mxl5005s_writereg() argument
[all...] |
| /kernel/linux/linux-6.6/drivers/clk/qcom/ |
| H A D | clk-alpha-pll.c | 295 u32 val; in wait_for_pll() local
300 ret = regmap_read(pll->clkr.regmap, PLL_MODE(pll), &val); in wait_for_pll()
305 ret = regmap_read(pll->clkr.regmap, PLL_MODE(pll), &val); in wait_for_pll()
308 if (inverse && !(val & mask)) in wait_for_pll()
310 else if ((val & mask) == mask) in wait_for_pll()
345 unsigned int val) in clk_alpha_pll_write_config()
347 if (val) in clk_alpha_pll_write_config()
348 regmap_write(regmap, reg, val); in clk_alpha_pll_write_config()
354 u32 val, mask; in clk_alpha_pll_configure() local
367 val in clk_alpha_pll_configure()
344 clk_alpha_pll_write_config(struct regmap *regmap, unsigned int reg, unsigned int val) clk_alpha_pll_write_config() argument
412 u32 val; clk_alpha_pll_hwfsm_enable() local
437 u32 val; clk_alpha_pll_hwfsm_disable() local
467 u32 val; pll_is_enabled() local
490 u32 val, mask; clk_alpha_pll_enable() local
542 u32 val, mask; clk_alpha_pll_disable() local
942 u32 val; clk_trion_pll_enable() local
979 u32 val; clk_trion_pll_disable() local
1162 u32 val, mask; clk_fabia_pll_configure() local
1200 u32 val, opmode_val; alpha_pll_fabia_enable() local
1257 u32 val; alpha_pll_fabia_disable() local
1340 u32 cal_l, val, alpha_width = pll_alpha_width(pll); alpha_pll_fabia_prepare() local
1413 u32 i, div = 1, val; clk_alpha_pll_postdiv_fabia_recalc_rate() local
1438 u32 i, div = 1, val; clk_trion_pll_postdiv_recalc_rate() local
1471 int i, val = 0, div; clk_trion_pll_postdiv_set_rate() local
1506 int i, val = 0, div, ret; clk_alpha_pll_postdiv_fabia_set_rate() local
1601 u32 val; __alpha_pll_trion_prepare() local
1632 u32 val, l, alpha_width = pll_alpha_width(pll); __alpha_pll_trion_set_rate() local
1764 u32 val; alpha_pll_lucid_5lpe_enable() local
1806 u32 val; alpha_pll_lucid_5lpe_disable() local
1841 u32 val = 0; alpha_pll_lucid_5lpe_prepare() local
1876 int i, val, div, ret; __clk_lucid_pll_postdiv_set_rate() local
1974 u32 val; clk_zonda_pll_enable() local
2024 u32 val; clk_zonda_pll_disable() local
2126 u32 val; alpha_pll_lucid_evo_enable() local
2180 u32 val; _alpha_pll_lucid_evo_disable() local
2214 u32 val = 0; _alpha_pll_lucid_evo_prepare() local
2374 u32 val, val_u, mask, mask_u; clk_stromer_pll_configure() local
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| /kernel/linux/linux-6.6/drivers/media/tuners/ |
| H A D | mxl5005s.c | 238 u16 val[25]; /* Binary representation of Value */ member
731 state->Init_Ctrl[0].val[0] = 0; in MXL5005_ControlInit()
737 state->Init_Ctrl[1].val[0] = 1; in MXL5005_ControlInit()
743 state->Init_Ctrl[2].val[0] = 0; in MXL5005_ControlInit()
746 state->Init_Ctrl[2].val[1] = 1; in MXL5005_ControlInit()
752 state->Init_Ctrl[3].val[0] = 0; in MXL5005_ControlInit()
758 state->Init_Ctrl[4].val[0] = 0; in MXL5005_ControlInit()
761 state->Init_Ctrl[4].val[1] = 0; in MXL5005_ControlInit()
764 state->Init_Ctrl[4].val[2] = 1; in MXL5005_ControlInit()
770 state->Init_Ctrl[5].val[ in MXL5005_ControlInit()
3867 mxl5005s_writereg(struct dvb_frontend *fe, u8 reg, u8 val, int latch) mxl5005s_writereg() argument
[all...] |