Lines Matching refs:val
295 u32 val;
300 ret = regmap_read(pll->clkr.regmap, PLL_MODE(pll), &val);
305 ret = regmap_read(pll->clkr.regmap, PLL_MODE(pll), &val);
308 if (inverse && !(val & mask))
310 else if ((val & mask) == mask)
345 unsigned int val)
347 if (val)
348 regmap_write(regmap, reg, val);
354 u32 val, mask;
367 val = config->main_output_mask;
368 val |= config->aux_output_mask;
369 val |= config->aux2_output_mask;
370 val |= config->early_output_mask;
371 val |= config->pre_div_val;
372 val |= config->post_div_val;
373 val |= config->vco_val;
374 val |= config->alpha_en_mask;
375 val |= config->alpha_mode_mask;
385 regmap_update_bits(regmap, PLL_USER_CTL(pll), mask, val);
412 u32 val;
414 ret = regmap_read(pll->clkr.regmap, PLL_MODE(pll), &val);
418 val |= PLL_FSM_ENA;
421 val &= ~PLL_OFFLINE_REQ;
423 ret = regmap_write(pll->clkr.regmap, PLL_MODE(pll), val);
437 u32 val;
439 ret = regmap_read(pll->clkr.regmap, PLL_MODE(pll), &val);
467 u32 val;
469 ret = regmap_read(pll->clkr.regmap, PLL_MODE(pll), &val);
473 return !!(val & mask);
490 u32 val, mask;
493 ret = regmap_read(pll->clkr.regmap, PLL_MODE(pll), &val);
498 if (val & PLL_VOTE_FSM_ENA) {
506 if ((val & mask) == mask)
542 u32 val, mask;
544 ret = regmap_read(pll->clkr.regmap, PLL_MODE(pll), &val);
549 if (val & PLL_VOTE_FSM_ENA) {
724 vco->val << PLL_VCO_SHIFT);
891 /* Ensure that the write above goes to detect L val change. */
942 u32 val;
945 ret = regmap_read(regmap, PLL_MODE(pll), &val);
950 if (val & PLL_VOTE_FSM_ENA) {
979 u32 val;
982 ret = regmap_read(regmap, PLL_MODE(pll), &val);
987 if (val & PLL_VOTE_FSM_ENA) {
1162 u32 val, mask;
1181 val = config->post_div_val;
1182 regmap_update_bits(regmap, PLL_USER_CTL(pll), mask, val);
1200 u32 val, opmode_val;
1203 ret = regmap_read(regmap, PLL_MODE(pll), &val);
1208 if (val & PLL_VOTE_FSM_ENA) {
1220 if ((opmode_val & PLL_RUN) && (val & PLL_OUTCTRL))
1257 u32 val;
1260 ret = regmap_read(regmap, PLL_MODE(pll), &val);
1265 if (val & PLL_FSM_ENA) {
1340 u32 cal_l, val, alpha_width = pll_alpha_width(pll);
1346 ret = regmap_read(pll->clkr.regmap, PLL_MODE(pll), &val);
1351 if (val & PLL_RESET_N)
1413 u32 i, div = 1, val;
1416 ret = regmap_read(pll->clkr.regmap, PLL_USER_CTL(pll), &val);
1420 val >>= pll->post_div_shift;
1421 val &= BIT(pll->width) - 1;
1424 if (pll->post_div_table[i].val == val) {
1438 u32 i, div = 1, val;
1440 regmap_read(regmap, PLL_USER_CTL(pll), &val);
1442 val >>= pll->post_div_shift;
1443 val &= PLL_POST_DIV_MASK(pll);
1446 if (pll->post_div_table[i].val == val) {
1471 int i, val = 0, div;
1476 val = pll->post_div_table[i].val;
1483 val << PLL_POST_DIV_SHIFT);
1506 int i, val = 0, div, ret;
1512 ret = regmap_read(pll->clkr.regmap, PLL_MODE(pll), &val);
1516 if (val & PLL_VOTE_FSM_ENA)
1522 val = pll->post_div_table[i].val;
1529 val << pll->post_div_shift);
1601 u32 val;
1605 regmap_read(pll->clkr.regmap, PLL_STATUS(pll), &val);
1606 if (val & pcal_done)
1632 u32 val, l, alpha_width = pll_alpha_width(pll);
1652 regmap_read(pll->clkr.regmap, PLL_MODE(pll), &val);
1653 if (!(val & latch_ack)) {
1764 u32 val;
1767 ret = regmap_read(pll->clkr.regmap, PLL_USER_CTL(pll), &val);
1772 if (val & LUCID_5LPE_ENABLE_VOTE_RUN) {
1806 u32 val;
1809 ret = regmap_read(pll->clkr.regmap, PLL_USER_CTL(pll), &val);
1814 if (val & LUCID_5LPE_ENABLE_VOTE_RUN) {
1841 u32 val = 0;
1845 regmap_read(pll->clkr.regmap, PLL_MODE(pll), &val);
1846 if (val & LUCID_5LPE_PCAL_DONE)
1876 int i, val, div, ret;
1883 ret = regmap_read(regmap, PLL_USER_CTL(pll), &val);
1887 if (val & enable_vote_run)
1899 val = pll->post_div_table[i].val;
1906 mask, val << pll->post_div_shift);
1974 u32 val;
1977 regmap_read(regmap, PLL_MODE(pll), &val);
1980 if (val & PLL_VOTE_FSM_ENA) {
2001 regmap_read(regmap, PLL_TEST_CTL(pll), &val);
2004 if (val & ZONDA_STAY_IN_CFA)
2024 u32 val;
2026 regmap_read(regmap, PLL_MODE(pll), &val);
2029 if (val & PLL_VOTE_FSM_ENA) {
2126 u32 val;
2129 ret = regmap_read(regmap, PLL_USER_CTL(pll), &val);
2134 if (val & LUCID_EVO_ENABLE_VOTE_RUN) {
2180 u32 val;
2183 ret = regmap_read(regmap, PLL_USER_CTL(pll), &val);
2188 if (val & LUCID_EVO_ENABLE_VOTE_RUN) {
2214 u32 val = 0;
2218 regmap_read(pll->clkr.regmap, PLL_MODE(pll), &val);
2219 if (!(val & LUCID_EVO_PCAL_NOT_DONE))
2374 u32 val, val_u, mask, mask_u;
2387 val = config->main_output_mask;
2388 val |= config->aux_output_mask;
2389 val |= config->aux2_output_mask;
2390 val |= config->early_output_mask;
2391 val |= config->pre_div_val;
2392 val |= config->post_div_val;
2393 val |= config->vco_val;
2394 val |= config->alpha_en_mask;
2395 val |= config->alpha_mode_mask;
2407 regmap_update_bits(regmap, PLL_USER_CTL(pll), mask, val);