/kernel/linux/linux-5.10/drivers/net/wireless/ti/wl1251/ |
H A D | spi.c | 51 wl1251_error("could not allocate cmd for spi reset"); in wl1251_spi_reset() 66 wl1251_dump(DEBUG_SPI, "spi reset -> ", cmd, WSPI_INIT_CMD_LEN); in wl1251_spi_reset() 221 .reset = wl1251_spi_reset_wake,
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/kernel/linux/linux-5.10/drivers/phy/cadence/ |
H A D | cdns-dphy.c | 13 #include <linux/reset.h>
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/kernel/linux/linux-5.10/drivers/phy/ |
H A D | phy-lgm-usb.c | 15 #include <linux/reset.h> 223 dev_err(dev, "%s reset not found\n", CTL_RESETS[i]); in phy_probe() 231 dev_err(dev, "%s reset not found\n", PHY_RESETS[i]); in phy_probe() 242 * Out-of-band reset of the controller after PHY reset will cause in phy_probe() 244 * reset only and leave the controller de-asserted here. in phy_probe()
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/kernel/linux/linux-5.10/drivers/phy/qualcomm/ |
H A D | phy-qcom-snps-femto-v2.c | 18 #include <linux/reset.h> 78 * @phy_reset: phy reset control 335 dev_err(dev, "failed to get phy core reset\n"); in qcom_snps_hsphy_probe()
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H A D | phy-qcom-usb-hs-28nm.c | 17 #include <linux/reset.h> 228 * The Femto PHY is POR reset in the following scenarios. in qcom_snps_hsphy_por_reset() 234 * out of reset. in qcom_snps_hsphy_por_reset() 249 * after the reset. in qcom_snps_hsphy_por_reset()
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/kernel/linux/linux-5.10/drivers/net/wireless/ti/wlcore/ |
H A D | wlcore_i.h | 135 /* Cumulative counter of total released mem blocks since FW-reset */ 188 void (*reset)(struct device *child); member
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/kernel/linux/linux-5.10/drivers/soc/amlogic/ |
H A D | meson-gx-pwrc-vpu.c | 15 #include <linux/reset.h> 309 dev_err(&pdev->dev, "failed to get reset lines\n"); in meson_gx_pwrc_vpu_probe()
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/kernel/linux/linux-5.10/drivers/tty/serial/8250/ |
H A D | 8250_of.c | 17 #include <linux/reset.h>
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/kernel/linux/linux-5.10/drivers/usb/dwc3/ |
H A D | dwc3-st.c | 29 #include <linux/reset.h> 85 * @rstc_rst: reset controller for softreset signal 246 dev_err(&pdev->dev, "could not get reset controller\n"); in st_dwc3_probe()
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/kernel/linux/linux-5.10/drivers/usb/host/ |
H A D | ohci-platform.c | 27 #include <linux/reset.h>
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H A D | ohci-st.c | 21 #include <linux/reset.h>
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H A D | ehci-pci.c | 89 /* called during probe() after chip reset completes */ 106 * init and reset; they are located here too. in ehci_pci_setup() 372 .reset = ehci_pci_setup,
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H A D | ehci-orion.c | 128 * Stop and reset controller in orion_usb_phy_v1_setup() 136 * TBD: This need to be done after each reset! in orion_usb_phy_v1_setup() 176 * sbuscfg reg has to be set after usb controller reset, otherwise in ehci_orion_drv_reset() 204 .reset = ehci_orion_drv_reset,
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H A D | ehci-mv.c | 99 .reset = mv_ehci_reset,
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/kernel/linux/linux-5.10/drivers/usb/gadget/legacy/ |
H A D | dbgp.c | 415 .reset = dbgp_disconnect,
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/kernel/linux/linux-5.10/drivers/usb/renesas_usbhs/ |
H A D | common.h | 15 #include <linux/reset.h>
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/kernel/linux/linux-5.10/drivers/video/fbdev/ |
H A D | sticore.h | 102 u32 reset : 1; /* hard reset the device? */ member 115 u32 retain_ie : 1; /* don't allow reset to clear int enables */
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/kernel/linux/linux-5.10/net/netfilter/ |
H A D | nft_connlimit.c | 135 struct nft_object *obj, bool reset) in nft_connlimit_obj_dump() 134 nft_connlimit_obj_dump(struct sk_buff *skb, struct nft_object *obj, bool reset) nft_connlimit_obj_dump() argument
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/kernel/linux/linux-5.10/net/sched/ |
H A D | sch_skbprio.c | 296 .reset = skbprio_reset,
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H A D | sch_codel.c | 287 .reset = codel_reset,
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/kernel/linux/linux-5.10/include/linux/ |
H A D | scmi_protocol.h | 196 * @num_domains_get: get the count of reset domains provided by SCMI 197 * @name_get: gets the name of a reset domain 198 * @latency_get: gets the reset latency for the specified reset domain 199 * @reset: resets the specified reset domain 200 * @assert: explicitly assert reset signal of the specified reset domain 201 * @deassert: explicitly deassert reset signal of the specified reset domai 207 int (*reset)(const struct scmi_handle *handle, u32 domain); global() member [all...] |
/kernel/linux/linux-5.10/sound/soc/au1x/ |
H A D | ac97c.c | 179 printk(KERN_ERR "ac97c: codec not ready after cold reset\n"); in au1xac97c_ac97_cold_reset() 186 .reset = au1xac97c_ac97_cold_reset,
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/kernel/linux/linux-5.10/sound/soc/cirrus/ |
H A D | ep93xx-ac97.c | 188 dev_warn(info->dev, "codec warm reset timeout\n"); in ep93xx_ac97_warm_reset() 200 * For doing cold reset, we disable the AC97 controller interface, clear in ep93xx_ac97_cold_reset() 208 * Now, assert the reset and wait for the codec to become ready. in ep93xx_ac97_cold_reset() 213 dev_warn(info->dev, "codec cold reset timeout\n"); in ep93xx_ac97_cold_reset() 216 * Give the codec some time to come fully out from the reset. This way in ep93xx_ac97_cold_reset() 246 .reset = ep93xx_ac97_cold_reset,
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/kernel/linux/linux-5.10/sound/arm/ |
H A D | pxa2xx-ac97.c | 58 .reset = pxa2xx_ac97_legacy_reset,
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/kernel/linux/linux-5.10/sound/soc/img/ |
H A D | img-parallel-out.c | 17 #include <linux/reset.h> 235 dev_err(&pdev->dev, "No top level reset found\n"); in img_prl_out_probe()
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