18c2ecf20Sopenharmony_ci// SPDX-License-Identifier: GPL-2.0+ 28c2ecf20Sopenharmony_ci/* 38c2ecf20Sopenharmony_ci * Serial Port driver for Open Firmware platform devices 48c2ecf20Sopenharmony_ci * 58c2ecf20Sopenharmony_ci * Copyright (C) 2006 Arnd Bergmann <arnd@arndb.de>, IBM Corp. 68c2ecf20Sopenharmony_ci */ 78c2ecf20Sopenharmony_ci#include <linux/console.h> 88c2ecf20Sopenharmony_ci#include <linux/module.h> 98c2ecf20Sopenharmony_ci#include <linux/slab.h> 108c2ecf20Sopenharmony_ci#include <linux/serial_core.h> 118c2ecf20Sopenharmony_ci#include <linux/serial_reg.h> 128c2ecf20Sopenharmony_ci#include <linux/of_address.h> 138c2ecf20Sopenharmony_ci#include <linux/of_irq.h> 148c2ecf20Sopenharmony_ci#include <linux/of_platform.h> 158c2ecf20Sopenharmony_ci#include <linux/pm_runtime.h> 168c2ecf20Sopenharmony_ci#include <linux/clk.h> 178c2ecf20Sopenharmony_ci#include <linux/reset.h> 188c2ecf20Sopenharmony_ci 198c2ecf20Sopenharmony_ci#include "8250.h" 208c2ecf20Sopenharmony_ci 218c2ecf20Sopenharmony_cistruct of_serial_info { 228c2ecf20Sopenharmony_ci struct clk *clk; 238c2ecf20Sopenharmony_ci struct reset_control *rst; 248c2ecf20Sopenharmony_ci int type; 258c2ecf20Sopenharmony_ci int line; 268c2ecf20Sopenharmony_ci}; 278c2ecf20Sopenharmony_ci 288c2ecf20Sopenharmony_ci/* 298c2ecf20Sopenharmony_ci * Fill a struct uart_port for a given device node 308c2ecf20Sopenharmony_ci */ 318c2ecf20Sopenharmony_cistatic int of_platform_serial_setup(struct platform_device *ofdev, 328c2ecf20Sopenharmony_ci int type, struct uart_8250_port *up, 338c2ecf20Sopenharmony_ci struct of_serial_info *info) 348c2ecf20Sopenharmony_ci{ 358c2ecf20Sopenharmony_ci struct resource resource; 368c2ecf20Sopenharmony_ci struct device_node *np = ofdev->dev.of_node; 378c2ecf20Sopenharmony_ci struct uart_port *port = &up->port; 388c2ecf20Sopenharmony_ci u32 clk, spd, prop; 398c2ecf20Sopenharmony_ci int ret, irq; 408c2ecf20Sopenharmony_ci 418c2ecf20Sopenharmony_ci memset(port, 0, sizeof *port); 428c2ecf20Sopenharmony_ci 438c2ecf20Sopenharmony_ci pm_runtime_enable(&ofdev->dev); 448c2ecf20Sopenharmony_ci pm_runtime_get_sync(&ofdev->dev); 458c2ecf20Sopenharmony_ci 468c2ecf20Sopenharmony_ci if (of_property_read_u32(np, "clock-frequency", &clk)) { 478c2ecf20Sopenharmony_ci 488c2ecf20Sopenharmony_ci /* Get clk rate through clk driver if present */ 498c2ecf20Sopenharmony_ci info->clk = devm_clk_get(&ofdev->dev, NULL); 508c2ecf20Sopenharmony_ci if (IS_ERR(info->clk)) { 518c2ecf20Sopenharmony_ci ret = PTR_ERR(info->clk); 528c2ecf20Sopenharmony_ci if (ret != -EPROBE_DEFER) 538c2ecf20Sopenharmony_ci dev_warn(&ofdev->dev, 548c2ecf20Sopenharmony_ci "failed to get clock: %d\n", ret); 558c2ecf20Sopenharmony_ci goto err_pmruntime; 568c2ecf20Sopenharmony_ci } 578c2ecf20Sopenharmony_ci 588c2ecf20Sopenharmony_ci ret = clk_prepare_enable(info->clk); 598c2ecf20Sopenharmony_ci if (ret < 0) 608c2ecf20Sopenharmony_ci goto err_pmruntime; 618c2ecf20Sopenharmony_ci 628c2ecf20Sopenharmony_ci clk = clk_get_rate(info->clk); 638c2ecf20Sopenharmony_ci } 648c2ecf20Sopenharmony_ci /* If current-speed was set, then try not to change it. */ 658c2ecf20Sopenharmony_ci if (of_property_read_u32(np, "current-speed", &spd) == 0) 668c2ecf20Sopenharmony_ci port->custom_divisor = clk / (16 * spd); 678c2ecf20Sopenharmony_ci 688c2ecf20Sopenharmony_ci ret = of_address_to_resource(np, 0, &resource); 698c2ecf20Sopenharmony_ci if (ret) { 708c2ecf20Sopenharmony_ci dev_warn(&ofdev->dev, "invalid address\n"); 718c2ecf20Sopenharmony_ci goto err_unprepare; 728c2ecf20Sopenharmony_ci } 738c2ecf20Sopenharmony_ci 748c2ecf20Sopenharmony_ci port->flags = UPF_SHARE_IRQ | UPF_BOOT_AUTOCONF | UPF_FIXED_PORT | 758c2ecf20Sopenharmony_ci UPF_FIXED_TYPE; 768c2ecf20Sopenharmony_ci spin_lock_init(&port->lock); 778c2ecf20Sopenharmony_ci 788c2ecf20Sopenharmony_ci if (resource_type(&resource) == IORESOURCE_IO) { 798c2ecf20Sopenharmony_ci port->iotype = UPIO_PORT; 808c2ecf20Sopenharmony_ci port->iobase = resource.start; 818c2ecf20Sopenharmony_ci } else { 828c2ecf20Sopenharmony_ci port->mapbase = resource.start; 838c2ecf20Sopenharmony_ci port->mapsize = resource_size(&resource); 848c2ecf20Sopenharmony_ci 858c2ecf20Sopenharmony_ci /* Check for shifted address mapping */ 868c2ecf20Sopenharmony_ci if (of_property_read_u32(np, "reg-offset", &prop) == 0) { 878c2ecf20Sopenharmony_ci if (prop >= port->mapsize) { 888c2ecf20Sopenharmony_ci dev_warn(&ofdev->dev, "reg-offset %u exceeds region size %pa\n", 898c2ecf20Sopenharmony_ci prop, &port->mapsize); 908c2ecf20Sopenharmony_ci ret = -EINVAL; 918c2ecf20Sopenharmony_ci goto err_unprepare; 928c2ecf20Sopenharmony_ci } 938c2ecf20Sopenharmony_ci 948c2ecf20Sopenharmony_ci port->mapbase += prop; 958c2ecf20Sopenharmony_ci port->mapsize -= prop; 968c2ecf20Sopenharmony_ci } 978c2ecf20Sopenharmony_ci 988c2ecf20Sopenharmony_ci port->iotype = UPIO_MEM; 998c2ecf20Sopenharmony_ci if (of_property_read_u32(np, "reg-io-width", &prop) == 0) { 1008c2ecf20Sopenharmony_ci switch (prop) { 1018c2ecf20Sopenharmony_ci case 1: 1028c2ecf20Sopenharmony_ci port->iotype = UPIO_MEM; 1038c2ecf20Sopenharmony_ci break; 1048c2ecf20Sopenharmony_ci case 2: 1058c2ecf20Sopenharmony_ci port->iotype = UPIO_MEM16; 1068c2ecf20Sopenharmony_ci break; 1078c2ecf20Sopenharmony_ci case 4: 1088c2ecf20Sopenharmony_ci port->iotype = of_device_is_big_endian(np) ? 1098c2ecf20Sopenharmony_ci UPIO_MEM32BE : UPIO_MEM32; 1108c2ecf20Sopenharmony_ci break; 1118c2ecf20Sopenharmony_ci default: 1128c2ecf20Sopenharmony_ci dev_warn(&ofdev->dev, "unsupported reg-io-width (%d)\n", 1138c2ecf20Sopenharmony_ci prop); 1148c2ecf20Sopenharmony_ci ret = -EINVAL; 1158c2ecf20Sopenharmony_ci goto err_unprepare; 1168c2ecf20Sopenharmony_ci } 1178c2ecf20Sopenharmony_ci } 1188c2ecf20Sopenharmony_ci port->flags |= UPF_IOREMAP; 1198c2ecf20Sopenharmony_ci } 1208c2ecf20Sopenharmony_ci 1218c2ecf20Sopenharmony_ci /* Compatibility with the deprecated pxa driver and 8250_pxa drivers. */ 1228c2ecf20Sopenharmony_ci if (of_device_is_compatible(np, "mrvl,mmp-uart")) 1238c2ecf20Sopenharmony_ci port->regshift = 2; 1248c2ecf20Sopenharmony_ci 1258c2ecf20Sopenharmony_ci /* Check for registers offset within the devices address range */ 1268c2ecf20Sopenharmony_ci if (of_property_read_u32(np, "reg-shift", &prop) == 0) 1278c2ecf20Sopenharmony_ci port->regshift = prop; 1288c2ecf20Sopenharmony_ci 1298c2ecf20Sopenharmony_ci /* Check for fifo size */ 1308c2ecf20Sopenharmony_ci if (of_property_read_u32(np, "fifo-size", &prop) == 0) 1318c2ecf20Sopenharmony_ci port->fifosize = prop; 1328c2ecf20Sopenharmony_ci 1338c2ecf20Sopenharmony_ci /* Check for a fixed line number */ 1348c2ecf20Sopenharmony_ci ret = of_alias_get_id(np, "serial"); 1358c2ecf20Sopenharmony_ci if (ret >= 0) 1368c2ecf20Sopenharmony_ci port->line = ret; 1378c2ecf20Sopenharmony_ci 1388c2ecf20Sopenharmony_ci irq = of_irq_get(np, 0); 1398c2ecf20Sopenharmony_ci if (irq < 0) { 1408c2ecf20Sopenharmony_ci if (irq == -EPROBE_DEFER) { 1418c2ecf20Sopenharmony_ci ret = -EPROBE_DEFER; 1428c2ecf20Sopenharmony_ci goto err_unprepare; 1438c2ecf20Sopenharmony_ci } 1448c2ecf20Sopenharmony_ci /* IRQ support not mandatory */ 1458c2ecf20Sopenharmony_ci irq = 0; 1468c2ecf20Sopenharmony_ci } 1478c2ecf20Sopenharmony_ci 1488c2ecf20Sopenharmony_ci port->irq = irq; 1498c2ecf20Sopenharmony_ci 1508c2ecf20Sopenharmony_ci info->rst = devm_reset_control_get_optional_shared(&ofdev->dev, NULL); 1518c2ecf20Sopenharmony_ci if (IS_ERR(info->rst)) { 1528c2ecf20Sopenharmony_ci ret = PTR_ERR(info->rst); 1538c2ecf20Sopenharmony_ci goto err_unprepare; 1548c2ecf20Sopenharmony_ci } 1558c2ecf20Sopenharmony_ci 1568c2ecf20Sopenharmony_ci ret = reset_control_deassert(info->rst); 1578c2ecf20Sopenharmony_ci if (ret) 1588c2ecf20Sopenharmony_ci goto err_unprepare; 1598c2ecf20Sopenharmony_ci 1608c2ecf20Sopenharmony_ci port->type = type; 1618c2ecf20Sopenharmony_ci port->uartclk = clk; 1628c2ecf20Sopenharmony_ci 1638c2ecf20Sopenharmony_ci if (of_property_read_bool(np, "no-loopback-test")) 1648c2ecf20Sopenharmony_ci port->flags |= UPF_SKIP_TEST; 1658c2ecf20Sopenharmony_ci 1668c2ecf20Sopenharmony_ci port->dev = &ofdev->dev; 1678c2ecf20Sopenharmony_ci port->rs485_config = serial8250_em485_config; 1688c2ecf20Sopenharmony_ci up->rs485_start_tx = serial8250_em485_start_tx; 1698c2ecf20Sopenharmony_ci up->rs485_stop_tx = serial8250_em485_stop_tx; 1708c2ecf20Sopenharmony_ci 1718c2ecf20Sopenharmony_ci switch (type) { 1728c2ecf20Sopenharmony_ci case PORT_RT2880: 1738c2ecf20Sopenharmony_ci port->iotype = UPIO_AU; 1748c2ecf20Sopenharmony_ci break; 1758c2ecf20Sopenharmony_ci } 1768c2ecf20Sopenharmony_ci 1778c2ecf20Sopenharmony_ci if (IS_ENABLED(CONFIG_SERIAL_8250_FSL) && 1788c2ecf20Sopenharmony_ci (of_device_is_compatible(np, "fsl,ns16550") || 1798c2ecf20Sopenharmony_ci of_device_is_compatible(np, "fsl,16550-FIFO64"))) { 1808c2ecf20Sopenharmony_ci port->handle_irq = fsl8250_handle_irq; 1818c2ecf20Sopenharmony_ci port->has_sysrq = IS_ENABLED(CONFIG_SERIAL_8250_CONSOLE); 1828c2ecf20Sopenharmony_ci } 1838c2ecf20Sopenharmony_ci 1848c2ecf20Sopenharmony_ci return 0; 1858c2ecf20Sopenharmony_cierr_unprepare: 1868c2ecf20Sopenharmony_ci clk_disable_unprepare(info->clk); 1878c2ecf20Sopenharmony_cierr_pmruntime: 1888c2ecf20Sopenharmony_ci pm_runtime_put_sync(&ofdev->dev); 1898c2ecf20Sopenharmony_ci pm_runtime_disable(&ofdev->dev); 1908c2ecf20Sopenharmony_ci return ret; 1918c2ecf20Sopenharmony_ci} 1928c2ecf20Sopenharmony_ci 1938c2ecf20Sopenharmony_ci/* 1948c2ecf20Sopenharmony_ci * Try to register a serial port 1958c2ecf20Sopenharmony_ci */ 1968c2ecf20Sopenharmony_cistatic int of_platform_serial_probe(struct platform_device *ofdev) 1978c2ecf20Sopenharmony_ci{ 1988c2ecf20Sopenharmony_ci struct of_serial_info *info; 1998c2ecf20Sopenharmony_ci struct uart_8250_port port8250; 2008c2ecf20Sopenharmony_ci unsigned int port_type; 2018c2ecf20Sopenharmony_ci u32 tx_threshold; 2028c2ecf20Sopenharmony_ci int ret; 2038c2ecf20Sopenharmony_ci 2048c2ecf20Sopenharmony_ci port_type = (unsigned long)of_device_get_match_data(&ofdev->dev); 2058c2ecf20Sopenharmony_ci if (port_type == PORT_UNKNOWN) 2068c2ecf20Sopenharmony_ci return -EINVAL; 2078c2ecf20Sopenharmony_ci 2088c2ecf20Sopenharmony_ci if (of_property_read_bool(ofdev->dev.of_node, "used-by-rtas")) 2098c2ecf20Sopenharmony_ci return -EBUSY; 2108c2ecf20Sopenharmony_ci 2118c2ecf20Sopenharmony_ci info = kzalloc(sizeof(*info), GFP_KERNEL); 2128c2ecf20Sopenharmony_ci if (info == NULL) 2138c2ecf20Sopenharmony_ci return -ENOMEM; 2148c2ecf20Sopenharmony_ci 2158c2ecf20Sopenharmony_ci memset(&port8250, 0, sizeof(port8250)); 2168c2ecf20Sopenharmony_ci ret = of_platform_serial_setup(ofdev, port_type, &port8250, info); 2178c2ecf20Sopenharmony_ci if (ret) 2188c2ecf20Sopenharmony_ci goto err_free; 2198c2ecf20Sopenharmony_ci 2208c2ecf20Sopenharmony_ci if (port8250.port.fifosize) 2218c2ecf20Sopenharmony_ci port8250.capabilities = UART_CAP_FIFO; 2228c2ecf20Sopenharmony_ci 2238c2ecf20Sopenharmony_ci /* Check for TX FIFO threshold & set tx_loadsz */ 2248c2ecf20Sopenharmony_ci if ((of_property_read_u32(ofdev->dev.of_node, "tx-threshold", 2258c2ecf20Sopenharmony_ci &tx_threshold) == 0) && 2268c2ecf20Sopenharmony_ci (tx_threshold < port8250.port.fifosize)) 2278c2ecf20Sopenharmony_ci port8250.tx_loadsz = port8250.port.fifosize - tx_threshold; 2288c2ecf20Sopenharmony_ci 2298c2ecf20Sopenharmony_ci if (of_property_read_bool(ofdev->dev.of_node, "auto-flow-control")) 2308c2ecf20Sopenharmony_ci port8250.capabilities |= UART_CAP_AFE; 2318c2ecf20Sopenharmony_ci 2328c2ecf20Sopenharmony_ci if (of_property_read_u32(ofdev->dev.of_node, 2338c2ecf20Sopenharmony_ci "overrun-throttle-ms", 2348c2ecf20Sopenharmony_ci &port8250.overrun_backoff_time_ms) != 0) 2358c2ecf20Sopenharmony_ci port8250.overrun_backoff_time_ms = 0; 2368c2ecf20Sopenharmony_ci 2378c2ecf20Sopenharmony_ci ret = serial8250_register_8250_port(&port8250); 2388c2ecf20Sopenharmony_ci if (ret < 0) 2398c2ecf20Sopenharmony_ci goto err_dispose; 2408c2ecf20Sopenharmony_ci 2418c2ecf20Sopenharmony_ci info->type = port_type; 2428c2ecf20Sopenharmony_ci info->line = ret; 2438c2ecf20Sopenharmony_ci platform_set_drvdata(ofdev, info); 2448c2ecf20Sopenharmony_ci return 0; 2458c2ecf20Sopenharmony_cierr_dispose: 2468c2ecf20Sopenharmony_ci irq_dispose_mapping(port8250.port.irq); 2478c2ecf20Sopenharmony_ci pm_runtime_put_sync(&ofdev->dev); 2488c2ecf20Sopenharmony_ci pm_runtime_disable(&ofdev->dev); 2498c2ecf20Sopenharmony_ci clk_disable_unprepare(info->clk); 2508c2ecf20Sopenharmony_cierr_free: 2518c2ecf20Sopenharmony_ci kfree(info); 2528c2ecf20Sopenharmony_ci return ret; 2538c2ecf20Sopenharmony_ci} 2548c2ecf20Sopenharmony_ci 2558c2ecf20Sopenharmony_ci/* 2568c2ecf20Sopenharmony_ci * Release a line 2578c2ecf20Sopenharmony_ci */ 2588c2ecf20Sopenharmony_cistatic int of_platform_serial_remove(struct platform_device *ofdev) 2598c2ecf20Sopenharmony_ci{ 2608c2ecf20Sopenharmony_ci struct of_serial_info *info = platform_get_drvdata(ofdev); 2618c2ecf20Sopenharmony_ci 2628c2ecf20Sopenharmony_ci serial8250_unregister_port(info->line); 2638c2ecf20Sopenharmony_ci 2648c2ecf20Sopenharmony_ci reset_control_assert(info->rst); 2658c2ecf20Sopenharmony_ci pm_runtime_put_sync(&ofdev->dev); 2668c2ecf20Sopenharmony_ci pm_runtime_disable(&ofdev->dev); 2678c2ecf20Sopenharmony_ci clk_disable_unprepare(info->clk); 2688c2ecf20Sopenharmony_ci kfree(info); 2698c2ecf20Sopenharmony_ci return 0; 2708c2ecf20Sopenharmony_ci} 2718c2ecf20Sopenharmony_ci 2728c2ecf20Sopenharmony_ci#ifdef CONFIG_PM_SLEEP 2738c2ecf20Sopenharmony_cistatic int of_serial_suspend(struct device *dev) 2748c2ecf20Sopenharmony_ci{ 2758c2ecf20Sopenharmony_ci struct of_serial_info *info = dev_get_drvdata(dev); 2768c2ecf20Sopenharmony_ci struct uart_8250_port *port8250 = serial8250_get_port(info->line); 2778c2ecf20Sopenharmony_ci struct uart_port *port = &port8250->port; 2788c2ecf20Sopenharmony_ci 2798c2ecf20Sopenharmony_ci serial8250_suspend_port(info->line); 2808c2ecf20Sopenharmony_ci 2818c2ecf20Sopenharmony_ci if (!uart_console(port) || console_suspend_enabled) { 2828c2ecf20Sopenharmony_ci pm_runtime_put_sync(dev); 2838c2ecf20Sopenharmony_ci clk_disable_unprepare(info->clk); 2848c2ecf20Sopenharmony_ci } 2858c2ecf20Sopenharmony_ci return 0; 2868c2ecf20Sopenharmony_ci} 2878c2ecf20Sopenharmony_ci 2888c2ecf20Sopenharmony_cistatic int of_serial_resume(struct device *dev) 2898c2ecf20Sopenharmony_ci{ 2908c2ecf20Sopenharmony_ci struct of_serial_info *info = dev_get_drvdata(dev); 2918c2ecf20Sopenharmony_ci struct uart_8250_port *port8250 = serial8250_get_port(info->line); 2928c2ecf20Sopenharmony_ci struct uart_port *port = &port8250->port; 2938c2ecf20Sopenharmony_ci 2948c2ecf20Sopenharmony_ci if (!uart_console(port) || console_suspend_enabled) { 2958c2ecf20Sopenharmony_ci pm_runtime_get_sync(dev); 2968c2ecf20Sopenharmony_ci clk_prepare_enable(info->clk); 2978c2ecf20Sopenharmony_ci } 2988c2ecf20Sopenharmony_ci 2998c2ecf20Sopenharmony_ci serial8250_resume_port(info->line); 3008c2ecf20Sopenharmony_ci 3018c2ecf20Sopenharmony_ci return 0; 3028c2ecf20Sopenharmony_ci} 3038c2ecf20Sopenharmony_ci#endif 3048c2ecf20Sopenharmony_cistatic SIMPLE_DEV_PM_OPS(of_serial_pm_ops, of_serial_suspend, of_serial_resume); 3058c2ecf20Sopenharmony_ci 3068c2ecf20Sopenharmony_ci/* 3078c2ecf20Sopenharmony_ci * A few common types, add more as needed. 3088c2ecf20Sopenharmony_ci */ 3098c2ecf20Sopenharmony_cistatic const struct of_device_id of_platform_serial_table[] = { 3108c2ecf20Sopenharmony_ci { .compatible = "ns8250", .data = (void *)PORT_8250, }, 3118c2ecf20Sopenharmony_ci { .compatible = "ns16450", .data = (void *)PORT_16450, }, 3128c2ecf20Sopenharmony_ci { .compatible = "ns16550a", .data = (void *)PORT_16550A, }, 3138c2ecf20Sopenharmony_ci { .compatible = "ns16550", .data = (void *)PORT_16550, }, 3148c2ecf20Sopenharmony_ci { .compatible = "ns16750", .data = (void *)PORT_16750, }, 3158c2ecf20Sopenharmony_ci { .compatible = "ns16850", .data = (void *)PORT_16850, }, 3168c2ecf20Sopenharmony_ci { .compatible = "nxp,lpc3220-uart", .data = (void *)PORT_LPC3220, }, 3178c2ecf20Sopenharmony_ci { .compatible = "ralink,rt2880-uart", .data = (void *)PORT_RT2880, }, 3188c2ecf20Sopenharmony_ci { .compatible = "intel,xscale-uart", .data = (void *)PORT_XSCALE, }, 3198c2ecf20Sopenharmony_ci { .compatible = "altr,16550-FIFO32", 3208c2ecf20Sopenharmony_ci .data = (void *)PORT_ALTR_16550_F32, }, 3218c2ecf20Sopenharmony_ci { .compatible = "altr,16550-FIFO64", 3228c2ecf20Sopenharmony_ci .data = (void *)PORT_ALTR_16550_F64, }, 3238c2ecf20Sopenharmony_ci { .compatible = "altr,16550-FIFO128", 3248c2ecf20Sopenharmony_ci .data = (void *)PORT_ALTR_16550_F128, }, 3258c2ecf20Sopenharmony_ci { .compatible = "mediatek,mtk-btif", 3268c2ecf20Sopenharmony_ci .data = (void *)PORT_MTK_BTIF, }, 3278c2ecf20Sopenharmony_ci { .compatible = "mrvl,mmp-uart", 3288c2ecf20Sopenharmony_ci .data = (void *)PORT_XSCALE, }, 3298c2ecf20Sopenharmony_ci { .compatible = "ti,da830-uart", .data = (void *)PORT_DA830, }, 3308c2ecf20Sopenharmony_ci { .compatible = "nuvoton,npcm750-uart", .data = (void *)PORT_NPCM, }, 3318c2ecf20Sopenharmony_ci { /* end of list */ }, 3328c2ecf20Sopenharmony_ci}; 3338c2ecf20Sopenharmony_ciMODULE_DEVICE_TABLE(of, of_platform_serial_table); 3348c2ecf20Sopenharmony_ci 3358c2ecf20Sopenharmony_cistatic struct platform_driver of_platform_serial_driver = { 3368c2ecf20Sopenharmony_ci .driver = { 3378c2ecf20Sopenharmony_ci .name = "of_serial", 3388c2ecf20Sopenharmony_ci .of_match_table = of_platform_serial_table, 3398c2ecf20Sopenharmony_ci .pm = &of_serial_pm_ops, 3408c2ecf20Sopenharmony_ci }, 3418c2ecf20Sopenharmony_ci .probe = of_platform_serial_probe, 3428c2ecf20Sopenharmony_ci .remove = of_platform_serial_remove, 3438c2ecf20Sopenharmony_ci}; 3448c2ecf20Sopenharmony_ci 3458c2ecf20Sopenharmony_cimodule_platform_driver(of_platform_serial_driver); 3468c2ecf20Sopenharmony_ci 3478c2ecf20Sopenharmony_ciMODULE_AUTHOR("Arnd Bergmann <arnd@arndb.de>"); 3488c2ecf20Sopenharmony_ciMODULE_LICENSE("GPL"); 3498c2ecf20Sopenharmony_ciMODULE_DESCRIPTION("Serial Port driver for Open Firmware platform devices"); 350