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/third_party/node/deps/v8/src/codegen/x64/
H A Dmacro-assembler-x64.cc445 for (Register reg : registers) { in MaybeSaveRegisters()
446 pushq(reg); in MaybeSaveRegisters()
451 for (Register reg : base::Reversed(registers)) { in MaybeRestoreRegisters()
452 popq(reg); in MaybeRestoreRegisters()
798 Register reg = saved_regs[i]; in CallRecordWriteStub() local
799 if (reg != exclusion1 && reg != exclusion2 && reg != exclusion3) { in CallRecordWriteStub()
820 Register reg = saved_regs[i]; in CallRecordWriteStub() local
821 if (reg ! in CallRecordWriteStub()
832 XMMRegister reg = XMMRegister::from_code(i); CallRecordWriteStub() local
834 Movdqu(Operand(rsp, i * kStackSavedSavedFPSize), reg); CallRecordWriteStub() local
836 Movsd(Operand(rsp, i * kStackSavedSavedFPSize), reg); CallRecordWriteStub() local
851 XMMRegister reg = XMMRegister::from_code(i); CallRecordWriteStub() local
864 Register reg = saved_regs[i]; CallRecordWriteStub() local
1252 SmiTag(Register reg) CallRecordWriteStub() argument
1272 SmiUntag(Register reg) CallRecordWriteStub() argument
1313 SmiToInt32(Register reg) CallRecordWriteStub() argument
2866 DoubleRegister reg = CallRecordWriteStub() local
2868 Movsd(Operand(rbp, offset - ((i + 1) * kDoubleSize)), reg); CallRecordWriteStub() local
2914 DoubleRegister reg = CallRecordWriteStub() local
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/base/telephony/core_service/test/fuzztest/imsregcallback_fuzzer/
H A Dimsregcallback_fuzzer.cpp41 int32_t reg = static_cast<int32_t>(*data % BOOL_NUM); in OnRemoteRequest() local
44 dataMessageParcel.WriteInt32(reg); in OnRemoteRequest()
/drivers/hdf_core/framework/include/audio/
H A Daudio_dai_if.h147 * @brief Defines Dai device reg read.
150 * @param reg Indicates reg offset.
151 * @param value Indicates read reg value.
153 * @return Returns <b>0</b> if dai device read reg success; returns a non-zero value otherwise.
158 int32_t (*Read)(const struct DaiDevice *dai, uint32_t reg, uint32_t *value);
161 * @brief Defines Dai device reg write.
164 * @param reg Indicates reg offset.
165 * @param value Indicates write reg valu
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/drivers/hdf_core/framework/model/audio/core/include/
H A Daudio_control.h55 uint32_t reg; member
72 uint32_t reg; member
73 uint32_t rreg; /* right sound channel reg */
75 uint32_t rshift; /* right sound channel reg shift */
/third_party/ffmpeg/libavutil/mips/
H A Dcpu.c41 static uint32_t read_cpucfg(uint32_t reg) in read_cpucfg() argument
47 "parse_r reg,%1\n\t" in read_cpucfg()
49 ".word (0xc8080118 | (reg << 21) | (__res << 11))\n\t" in read_cpucfg()
51 :"r"(reg) in read_cpucfg()
/third_party/libunwind/libunwind/src/x86_64/
H A Dunwind_i.h85 extern dwarf_loc_t x86_64_scratch_loc (struct cursor *c, unw_regnum_t reg);
88 extern void *x86_64_r_uc_addr (ucontext_t *uc, int reg);
H A DGget_save_loc.c31 unw_get_save_loc (unw_cursor_t *cursor, int reg, unw_save_loc_t *sloc) in unw_get_save_loc() argument
38 switch (reg) in unw_get_save_loc()
/third_party/node/deps/v8/src/compiler/backend/x64/
H A Dunwinding-info-writer-x64.h60 BlockInitialState(Register reg, int offset, bool tracking_fp) in BlockInitialState() argument
61 : register_(reg), offset_(offset), tracking_fp_(tracking_fp) {} in BlockInitialState()
/third_party/mesa3d/src/gallium/drivers/freedreno/a6xx/
H A Dfd6_context.h129 unsigned reg = REG_A6XX_CP_SCRATCH_REG(scratch_idx); in emit_marker6() local
132 OUT_PKT4(ring, reg, 1); in emit_marker6()
/third_party/mesa3d/src/gallium/frontends/nine/
H A Dnine_shader.c248 assert_replicate_swizzle(const struct ureg_src *reg) in assert_replicate_swizzle() argument
250 assert(reg->SwizzleY == reg->SwizzleX && in assert_replicate_swizzle()
251 reg->SwizzleZ == reg->SwizzleX && in assert_replicate_swizzle()
252 reg->SwizzleW == reg->SwizzleX); in assert_replicate_swizzle()
335 struct sm1_dst_param reg; member
430 struct ureg_src reg; member
653 *src = tx->lconstf[i].reg; in tx_lconstf()
2522 struct ureg_src reg; DECL_SPECIAL() local
3327 sm1_parse_get_param(struct shader_translator *tx, DWORD *reg, DWORD *rel) sm1_parse_get_param() argument
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/third_party/FreeBSD/sys/dev/usb/net/
H A Dif_axge.c165 axge_write_cmd_1(struct axge_softc *sc, uint8_t cmd, uint16_t reg, uint8_t val) in axge_write_cmd_1() argument
167 axge_write_mem(sc, cmd, 1, reg, &val, 1); in axge_write_cmd_1()
172 uint16_t reg, uint16_t val) in axge_write_cmd_2()
177 axge_write_mem(sc, cmd, index, reg, &temp, 2); in axge_write_cmd_2()
199 axge_read_cmd_1(struct axge_softc *sc, uint8_t cmd, uint16_t reg) in axge_read_cmd_1() argument
203 (void)axge_read_mem(sc, cmd, 1, reg, &val, 1); in axge_read_cmd_1()
208 axge_read_cmd_2(struct axge_softc *sc, uint8_t cmd, uint16_t index, uint16_t reg) in axge_read_cmd_2() argument
212 (void)axge_read_mem(sc, cmd, index, reg, &val, 2); in axge_read_cmd_2()
171 axge_write_cmd_2(struct axge_softc *sc, uint8_t cmd, uint16_t index, uint16_t reg, uint16_t val) axge_write_cmd_2() argument
/third_party/mesa3d/src/gallium/frontends/clover/api/
H A Dmemory.cpp146 auto reg = reinterpret_cast<const cl_buffer_region *>(op_info); in clCreateSubBuffer() local
148 if (!reg || in clCreateSubBuffer()
149 reg->origin > parent.size() || in clCreateSubBuffer()
150 reg->origin + reg->size > parent.size()) in clCreateSubBuffer()
153 if (!reg->size) in clCreateSubBuffer()
157 return new sub_buffer(parent, flags, reg->origin, reg->size); in clCreateSubBuffer()
/third_party/node/deps/v8/src/baseline/x64/
H A Dbaseline-assembler-x64-inl.h254 inline void PushSingle(MacroAssembler* masm, Register reg) { masm->Push(reg); } in PushSingle() argument
422 void BaselineAssembler::Switch(Register reg, int case_value_base, in Switch() argument
429 __ subq(reg, Immediate(case_value_base)); in Switch()
431 __ cmpq(reg, Immediate(num_labels)); in Switch()
434 __ jmp(MemOperand(table, reg, times_8, 0)); in Switch()
502 Register reg) { in AssertEqualToAccumulator()
503 assembler_->masm()->cmp_tagged(reg, kInterpreterAccumulatorRegister); in AssertEqualToAccumulator()
501 AssertEqualToAccumulator( Register reg) AssertEqualToAccumulator() argument
/third_party/skia/third_party/externals/swiftshader/src/Shader/
H A DPixelShader.cpp696 unsigned char reg = inst->dst.index; in analyzeInterpolants() local
698 if(mask & 0x01) input[reg][0] = Semantic(usage, index); in analyzeInterpolants()
699 if(mask & 0x02) input[reg][1] = Semantic(usage, index); in analyzeInterpolants()
700 if(mask & 0x04) input[reg][2] = Semantic(usage, index); in analyzeInterpolants()
701 if(mask & 0x08) input[reg][3] = Semantic(usage, index); in analyzeInterpolants()
728 unsigned char reg = inst->dst.index; in analyzeInterpolants() local
733 input[reg][0].centroid = centroid; in analyzeInterpolants()
736 input[2 + reg][0].centroid = centroid; in analyzeInterpolants()
H A DVertexProgram.cpp690 Vector4f reg; in fetchRegister() local
698 reg = r[i]; in fetchRegister()
702 reg = r[i + relativeAddress(src.rel, src.bufferIndex)]; in fetchRegister()
706 reg = r[i + dynamicAddress(src.rel)]; in fetchRegister()
710 reg = readConstant(src, offset); in fetchRegister()
715 reg = v[i]; in fetchRegister()
719 reg = v[i + relativeAddress(src.rel, src.bufferIndex)]; in fetchRegister()
723 reg = v[i + dynamicAddress(src.rel)]; in fetchRegister()
731 reg.x = As<Float4>(Int4(src.integer[0])); in fetchRegister()
732 reg in fetchRegister()
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/third_party/mesa3d/src/compiler/nir/
H A Dnir.h860 #define nir_foreach_register(reg, reg_list) \
861 foreach_list_typed(nir_register, reg, node, reg_list)
862 #define nir_foreach_register_safe(reg, reg_list) \
863 foreach_list_typed_safe(nir_register, reg, node, reg_list)
953 nir_register *reg;
964 nir_register *reg;
983 nir_reg_src reg;
1013 nir_reg_dest reg;
1029 #define nir_foreach_def(dest, reg) \
1030 list_for_each_entry(nir_dest, dest, &(reg)
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/third_party/vk-gl-cts/external/vulkan-docs/src/scripts/
H A Djson_h_generator.py96 for feature in self.registry.reg.findall('feature'):
115 allExtensions = self.registry.reg.findall('extensions')
131 typesList = self.registry.reg.findall('types')
/third_party/vixl/test/aarch32/
H A Dtest-utils-aarch32.h118 int32_t reg(unsigned code) const { in reg() function in vixl::aarch32::RegisterDump
154 int32_t spreg() const { return reg(kSPRegNum); }
184 bool Equal32(uint32_t expected, const RegisterDump* core, const Register& reg);
/third_party/pcre2/pcre2/src/sljit/
H A DsljitNativeX86_32.c1205 sljit_s32 reg, in sljit_emit_mem()
1213 CHECK(check_sljit_emit_mem(compiler, type, reg, mem, memw)); in sljit_emit_mem()
1215 if (!(reg & REG_PAIR_MASK)) in sljit_emit_mem()
1216 return sljit_emit_mem_unaligned(compiler, type, reg, mem, memw); in sljit_emit_mem()
1220 regs[0] = U8(REG_PAIR_FIRST(reg)); in sljit_emit_mem()
1221 regs[1] = U8(REG_PAIR_SECOND(reg)); in sljit_emit_mem()
1244 reg = regs[reg_idx]; in sljit_emit_mem()
1248 if (reg >= SLJIT_R3 && reg <= SLJIT_S3) { in sljit_emit_mem()
1249 offset = (2 * SSIZE_OF(sw)) + ((reg) in sljit_emit_mem()
1204 sljit_emit_mem(struct sljit_compiler *compiler, sljit_s32 type, sljit_s32 reg, sljit_s32 mem, sljit_sw memw) sljit_emit_mem() argument
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H A DsljitNativeX86_64.c33 static sljit_s32 emit_load_imm64(struct sljit_compiler *compiler, sljit_s32 reg, sljit_sw imm) in emit_load_imm64() argument
40 *inst++ = REX_W | ((reg_map[reg] <= 7) ? 0 : REX_B); in emit_load_imm64()
41 *inst++ = U8(MOV_r_i32 | (reg_map[reg] & 0x7)); in emit_load_imm64()
942 sljit_s32 reg, in sljit_emit_mem()
950 CHECK(check_sljit_emit_mem(compiler, type, reg, mem, memw)); in sljit_emit_mem()
952 if (!(reg & REG_PAIR_MASK)) in sljit_emit_mem()
953 return sljit_emit_mem_unaligned(compiler, type, reg, mem, memw); in sljit_emit_mem()
971 regs[0] = U8(REG_PAIR_FIRST(reg)); in sljit_emit_mem()
972 regs[1] = U8(REG_PAIR_SECOND(reg)); in sljit_emit_mem()
995 reg in sljit_emit_mem()
941 sljit_emit_mem(struct sljit_compiler *compiler, sljit_s32 type, sljit_s32 reg, sljit_s32 mem, sljit_sw memw) sljit_emit_mem() argument
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/third_party/mesa3d/src/freedreno/ir3/
H A Dir3_legalize.c185 struct ir3_register *reg; in legalize_block() local
187 reg = n->dsts[i]; in legalize_block()
189 reg = n->srcs[i - n->dsts_count]; in legalize_block()
191 if (reg_gpr(reg)) { in legalize_block()
197 if (regmask_get(&state->needs_ss, reg)) { in legalize_block()
204 if (regmask_get(&state->needs_sy, reg)) { in legalize_block()
211 foreach_dst (reg, n) { in legalize_block()
212 if (regmask_get(&state->needs_ss_war, reg)) { in legalize_block()
294 foreach_src (reg, n) { in legalize_block()
295 regmask_set(&state->needs_ss_war, reg); in legalize_block()
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H A Dir3_ra_validate.c123 get_file_size(struct ra_val_ctx *ctx, struct ir3_register *reg) in get_file_size() argument
125 if (reg->flags & IR3_REG_SHARED) in get_file_size()
127 else if (ctx->merged_regs || !(reg->flags & IR3_REG_HALF)) in get_file_size()
208 ra_val_get_file(struct ra_val_ctx *ctx, struct ir3_register *reg) in ra_val_get_file() argument
210 if (reg->flags & IR3_REG_SHARED) in ra_val_get_file()
212 else if (ctx->merged_regs || !(reg->flags & IR3_REG_HALF)) in ra_val_get_file()
/base/hiviewdfx/hiview/utility/smart_parser/feature_analysis/
H A Dfeature_analysis.cpp196 string reg = ""; in ParseElementForParam() local
198 int seekType = GetSeekInfo(iter->second, reg); in ParseElementForParam()
200 if (reg.find(L3_VARIABLE_TRACE_BLOCK) != string::npos || regex_search(src, result, regex(reg))) { in ParseElementForParam()
202 SetParamRecord(rule.name + "." + iter->first, FormatLineFeature(value, reg), seekType); in ParseElementForParam()
203 SetStackRegex(rule.name + "." + iter->first, reg); in ParseElementForParam()
/third_party/elfutils/libdw/
H A Dcfi.c60 enough_registers (Dwarf_Word reg, Dwarf_Frame **pfs, int *result) in enough_registers() argument
65 if (unlikely (reg >= INT32_MAX / sizeof ((*pfs)->regs[0]))) in enough_registers()
71 if ((*pfs)->nregs <= reg) in enough_registers()
73 size_t size = offsetof (Dwarf_Frame, regs[reg + 1]); in enough_registers()
84 (reg + 1 - bigger->nregs) * sizeof bigger->regs[0]); in enough_registers()
85 bigger->nregs = reg + 1; in enough_registers()
/third_party/mesa3d/src/intel/compiler/
H A Dbrw_vec4_copy_propagation.cpp502 const unsigned reg = (alloc.offsets[inst->src[i].nr] + in opt_copy_propagation() local
504 const copy_entry &entry = entries[reg]; in opt_copy_propagation()
514 const int reg = in opt_copy_propagation() local
522 entries[reg].saturatemask &= ~inst->dst.writemask; in opt_copy_propagation()
525 entries[reg].value[i] = direct_copy ? &inst->src[0] : NULL; in opt_copy_propagation()
526 entries[reg].saturatemask |= in opt_copy_propagation()

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