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Searched refs:phase (Results 201 - 225 of 476) sorted by relevance

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/kernel/linux/linux-5.10/net/netfilter/
H A Dnft_lookup.c123 enum nft_trans_phase phase) in nft_lookup_deactivate()
127 nf_tables_deactivate_set(ctx, priv->set, &priv->binding, phase); in nft_lookup_deactivate()
121 nft_lookup_deactivate(const struct nft_ctx *ctx, const struct nft_expr *expr, enum nft_trans_phase phase) nft_lookup_deactivate() argument
/kernel/linux/linux-6.6/drivers/net/ethernet/amazon/ena/
H A Dena_eth_com.h220 /* Switch phase bit in case of wrap around */ in ena_com_cq_inc_head()
222 io_cq->phase ^= 1; in ena_com_cq_inc_head()
233 expected_phase = io_cq->phase; in ena_com_tx_comp_req_id_get()
239 /* When the current completion descriptor phase isn't the same as the in ena_com_tx_comp_req_id_get()
/kernel/linux/linux-6.6/drivers/acpi/
H A Dacpi_fpdt.c19 * performance data fields, for boot or suspend or resume phase.
79 #define FPDT_ATTR(phase, name) \
83 return sprintf(buf, "%llu\n", record_##phase->name); \
/kernel/linux/linux-6.6/drivers/usb/dwc3/
H A Ddebug.h298 int phase = DEPEVT_STATUS_CONTROL_PHASE(event->status); in dwc3_ep_event_string() local
300 switch (phase) { in dwc3_ep_event_string()
/kernel/linux/linux-6.6/drivers/net/wwan/iosm/
H A Diosm_ipc_imem.h254 * respond to any requests. So while introducing new phase
259 * driver call the device power mode D3hot. In this phase
262 * @IPC_P_OFF_REQ: The intermediate phase between cleanup activity starts
264 * @IPC_P_CRASH: The phase indicating CP crash
265 * @IPC_P_CD_READY: The phase indicating CP core dump is ready
269 * @IPC_P_PSI: Primary signed image download phase
271 * @IPC_P_RUN: The phase after flashing to RAM is the RUNTIME phase.
309 * @enter_runtime: 1 means the transition to runtime phase was
317 * @phase
363 enum ipc_phase phase; global() member
[all...]
/kernel/linux/linux-6.6/drivers/hwmon/pmbus/
H A Dtps53679.c79 /* On TPS53681, only channel A provides per-phase output current */ in tps53679_identify_phases()
113 * Common identification function for chips with multi-phase support.
189 int phase, int reg) in tps53681_read_word_data()
195 * 80h readack (!) the total phase current". in tps53681_read_word_data()
197 * current for all phases if the phase is set to 0xff. Instead, it in tps53681_read_word_data()
198 * appears to report the current of one of the phases. Override phase in tps53681_read_word_data()
201 if (reg == PMBUS_READ_IOUT && page == 0 && phase == 0xff) in tps53681_read_word_data()
188 tps53681_read_word_data(struct i2c_client *client, int page, int phase, int reg) tps53681_read_word_data() argument
/kernel/linux/linux-5.10/drivers/char/ipmi/
H A Dkcs_bmc.h80 enum kcs_phases phase; member
/kernel/linux/linux-5.10/drivers/input/
H A Dinput-compat.h30 __u16 phase; member
/kernel/linux/linux-5.10/include/uapi/rdma/
H A Dbnxt_re-abi.h86 __u32 phase; member
/kernel/linux/linux-5.10/drivers/gpu/drm/i915/gvt/
H A Dedid.h112 enum gvt_gmbus_phase phase; member
/kernel/linux/linux-6.6/drivers/gpu/drm/i915/gvt/
H A Dedid.h112 enum gvt_gmbus_phase phase; member
/kernel/linux/linux-6.6/drivers/input/
H A Dinput-compat.h30 __u16 phase; member
/kernel/linux/patches/linux-5.10/prebuilts/usr/include/rdma/
H A Dbnxt_re-abi.h52 __u32 phase; member
/kernel/linux/patches/linux-6.6/prebuilts/usr/include/rdma/
H A Dbnxt_re-abi.h52 __u32 phase; member
/kernel/linux/linux-5.10/fs/f2fs/
H A Dgc.c895 int phase = 0; in gc_node_segment() local
905 if (fggc && phase == 2) in gc_node_segment()
921 if (phase == 0) { in gc_node_segment()
927 if (phase == 1) { in gc_node_segment()
932 /* phase == 2 */ in gc_node_segment()
959 if (++phase < 3) in gc_node_segment()
1418 int phase = 0; in gc_data_segment() local
1448 if (phase == 0) { in gc_data_segment()
1454 if (phase == 1) { in gc_data_segment()
1463 if (phase in gc_data_segment()
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/kernel/linux/linux-6.6/fs/f2fs/
H A Dgc.c1003 int phase = 0; in gc_node_segment() local
1013 if (fggc && phase == 2) in gc_node_segment()
1029 if (phase == 0) { in gc_node_segment()
1035 if (phase == 1) { in gc_node_segment()
1040 /* phase == 2 */ in gc_node_segment()
1067 if (++phase < 3) in gc_node_segment()
1507 int phase = 0; in gc_data_segment() local
1537 if (phase == 0) { in gc_data_segment()
1543 if (phase == 1) { in gc_data_segment()
1552 if (phase in gc_data_segment()
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/kernel/linux/linux-5.10/drivers/mmc/host/
H A Dsdhci-msm.c401 static int msm_config_cm_dll_phase(struct sdhci_host *host, u8 phase) in msm_config_cm_dll_phase() argument
414 if (phase > 0xf) in msm_config_cm_dll_phase()
430 * Write the selected DLL clock output phase (0 ... 15) in msm_config_cm_dll_phase()
435 config |= grey_coded_phase_table[phase] << CDR_SELEXT_SHIFT; in msm_config_cm_dll_phase()
454 dev_err(mmc_dev(mmc), "%s: Failed to set DLL phase: %d\n", in msm_config_cm_dll_phase()
455 mmc_hostname(mmc), phase); in msm_config_cm_dll_phase() local
468 * selected DLL clock output phase.
495 /* check if next phase in phase_table is consecutive or not */ in msm_find_most_appropriate_phase()
505 /* Check if phase-0 is present in first valid window? */ in msm_find_most_appropriate_phase()
525 /* number of phases in raw where phase in msm_find_most_appropriate_phase()
1170 u8 phase, tuned_phases[16], tuned_phase_cnt = 0; sdhci_msm_execute_tuning() local
1220 mmc_hostname(mmc), phase); sdhci_msm_execute_tuning() local
1257 mmc_hostname(mmc), phase); sdhci_msm_execute_tuning() local
[all...]
/kernel/linux/linux-6.6/drivers/mmc/host/
H A Dsdhci-msm.c421 static int msm_config_cm_dll_phase(struct sdhci_host *host, u8 phase) in msm_config_cm_dll_phase() argument
434 if (phase > 0xf) in msm_config_cm_dll_phase()
450 * Write the selected DLL clock output phase (0 ... 15) in msm_config_cm_dll_phase()
455 config |= grey_coded_phase_table[phase] << CDR_SELEXT_SHIFT; in msm_config_cm_dll_phase()
474 dev_err(mmc_dev(mmc), "%s: Failed to set DLL phase: %d\n", in msm_config_cm_dll_phase()
475 mmc_hostname(mmc), phase); in msm_config_cm_dll_phase() local
488 * selected DLL clock output phase.
515 /* check if next phase in phase_table is consecutive or not */ in msm_find_most_appropriate_phase()
525 /* Check if phase-0 is present in first valid window? */ in msm_find_most_appropriate_phase()
545 /* number of phases in raw where phase in msm_find_most_appropriate_phase()
1190 u8 phase, tuned_phases[16], tuned_phase_cnt = 0; sdhci_msm_execute_tuning() local
1240 mmc_hostname(mmc), phase); sdhci_msm_execute_tuning() local
1277 mmc_hostname(mmc), phase); sdhci_msm_execute_tuning() local
[all...]
/kernel/linux/linux-5.10/fs/
H A Dfs_context.c697 fc->phase = FS_CONTEXT_AWAITING_RECONF; in vfs_clean_context()
704 if (fc->phase != FS_CONTEXT_AWAITING_RECONF) in finish_clean_context()
712 fc->phase = FS_CONTEXT_FAILED; in finish_clean_context()
716 fc->phase = FS_CONTEXT_RECONF_PARAMS; in finish_clean_context()
/kernel/linux/linux-6.6/fs/
H A Dfs_context.c749 fc->phase = FS_CONTEXT_AWAITING_RECONF; in vfs_clean_context()
756 if (fc->phase != FS_CONTEXT_AWAITING_RECONF) in finish_clean_context()
764 fc->phase = FS_CONTEXT_FAILED; in finish_clean_context()
768 fc->phase = FS_CONTEXT_RECONF_PARAMS; in finish_clean_context()
/kernel/linux/linux-5.10/drivers/gpu/drm/meson/
H A Dmeson_overlay.c195 static void meson_overlay_get_vertical_phase(unsigned int ratio_y, int *phase, in meson_overlay_get_vertical_phase() argument
210 *phase = (offset_out - offset_in) >> 2; in meson_overlay_get_vertical_phase()
212 if (*phase > 0x100) in meson_overlay_get_vertical_phase()
215 *phase = *phase & 0xff; in meson_overlay_get_vertical_phase()
/kernel/linux/linux-5.10/drivers/net/ethernet/qlogic/qed/
H A Dqed_hw.c850 struct qed_ptt *p_ptt, const char *phase) in qed_dmae_sanity()
863 phase); in qed_dmae_sanity()
881 phase, in qed_dmae_sanity()
890 phase, rc); in qed_dmae_sanity()
903 phase, in qed_dmae_sanity()
849 qed_dmae_sanity(struct qed_hwfn *p_hwfn, struct qed_ptt *p_ptt, const char *phase) qed_dmae_sanity() argument
/kernel/linux/linux-6.6/drivers/net/ethernet/fungible/funeth/
H A Dfuneth_rx.c347 /* Advance the CQ pointers and phase tag to the next CQE. */
352 q->phase ^= 1; in advance_cq()
466 /* Return 0 if the phase tag of the CQE at the CQ's head matches expectations
469 static u16 cqe_phase_mismatch(const struct fun_cqe_info *ci, u16 phase) in cqe_phase_mismatch() argument
473 return (sf_p & 1) ^ phase; in cqe_phase_mismatch()
488 while (budget && !cqe_phase_mismatch(q->next_cqe_info, q->phase)) { in fun_process_cqes()
489 /* access other descriptor fields after the phase check */ in fun_process_cqes()
714 q->phase = 1; in fun_rxq_create_dev()
/kernel/linux/linux-6.6/drivers/net/ethernet/qlogic/qed/
H A Dqed_hw.c868 struct qed_ptt *p_ptt, const char *phase) in qed_dmae_sanity()
881 phase); in qed_dmae_sanity()
899 phase, in qed_dmae_sanity()
908 phase, rc); in qed_dmae_sanity()
921 phase, in qed_dmae_sanity()
867 qed_dmae_sanity(struct qed_hwfn *p_hwfn, struct qed_ptt *p_ptt, const char *phase) qed_dmae_sanity() argument
/kernel/linux/linux-6.6/drivers/gpu/drm/meson/
H A Dmeson_overlay.c200 static void meson_overlay_get_vertical_phase(unsigned int ratio_y, int *phase, in meson_overlay_get_vertical_phase() argument
215 *phase = (offset_out - offset_in) >> 2; in meson_overlay_get_vertical_phase()
217 if (*phase > 0x100) in meson_overlay_get_vertical_phase()
220 *phase = *phase & 0xff; in meson_overlay_get_vertical_phase()

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