/third_party/mesa3d/src/freedreno/ir3/ |
H A D | ir3_cf.c | 29 is_safe_conv(struct ir3_instruction *instr, type_t src_type, opc_t *src_opc) in is_safe_conv() argument 31 if (instr->opc != OPC_MOV) in is_safe_conv() 37 if (type_size(instr->cat1.src_type) == type_size(instr->cat1.dst_type) || in is_safe_conv() 38 full_type(instr->cat1.src_type) != full_type(instr->cat1.dst_type)) in is_safe_conv() 45 type_size(instr->cat1.src_type) == 16) in is_safe_conv() 48 struct ir3_register *dst = instr->dsts[0]; in is_safe_conv() 49 struct ir3_register *src = instr->srcs[0]; in is_safe_conv() 54 if (instr in is_safe_conv() [all...] |
H A D | ir3_array_to_ssa.c | 27 * the array defined in instr->dsts[0]->def (possibly a phi node), perform the 28 * operation, and store to instr->dsts[0]. 124 src_reg = __ssa_src(phi, src->instr, flags); in read_value_beginning() 159 struct ir3_instruction *src_instr = src->def->instr; in remove_trivial_phi() 168 src->def = remove_trivial_phi(src->def->instr); in remove_trivial_phi() 192 if (reg->instr->opc == OPC_META_PHI) in lookup_value() 193 return reg->instr->data; in lookup_value() 228 foreach_instr (instr, &block->instr_list) { in ir3_array_to_ssa() 229 foreach_dst (dst, instr) { in ir3_array_to_ssa() 240 foreach_instr (instr, in ir3_array_to_ssa() [all...] |
/third_party/mesa3d/src/compiler/nir/ |
H A D | nir_lower_clip_disable.c | 64 lower_clip_plane_store(nir_intrinsic_instr *instr, unsigned clip_plane_enable, nir_builder *b) in lower_clip_plane_store() argument 69 if (instr->intrinsic != nir_intrinsic_store_deref) in lower_clip_plane_store() 72 nir_deref_instr *deref = nir_src_as_deref(instr->src[0]); in lower_clip_plane_store() 80 b->cursor = nir_after_instr(&instr->instr); in lower_clip_plane_store() 82 int wrmask = nir_intrinsic_write_mask(instr); in lower_clip_plane_store() 92 components[i] = nir_channel(b, nir_ssa_for_src(b, instr->src[1], nir_src_num_components(instr->src[1])), i); in lower_clip_plane_store() 96 nir_store_deref(b, deref, nir_vec(b, components, instr->num_components), wrmask); in lower_clip_plane_store() 104 assert(nir_intrinsic_write_mask(instr) in lower_clip_plane_store() [all...] |
H A D | nir_opt_sink.c | 40 nir_can_move_instr(nir_instr *instr, nir_move_options options) in nir_can_move_instr() argument 42 switch (instr->type) { in nir_can_move_instr() 48 if (nir_op_is_vec(nir_instr_as_alu(instr)->op) || in nir_can_move_instr() 49 nir_instr_as_alu(instr)->op == nir_op_b2i32) in nir_can_move_instr() 51 if (nir_alu_instr_is_comparison(nir_instr_as_alu(instr))) in nir_can_move_instr() 56 nir_intrinsic_instr *intrin = nir_instr_as_intrinsic(instr); in nir_can_move_instr() 144 nir_instr *instr = use->parent_instr; in get_preferred_block() local 145 nir_block *use_block = instr->block; in get_preferred_block() 154 if (instr->type == nir_instr_type_phi) { in get_preferred_block() 155 nir_phi_instr *phi = nir_instr_as_phi(instr); in get_preferred_block() 229 nir_instr_insert(nir_after_phis(use_block), instr); nir_opt_sink() local [all...] |
H A D | nir_lower_point_size.c | 42 nir_intrinsic_instr *instr = nir_instr_as_intrinsic(psiz_instr); in lower_point_size_instr() local 44 assert(instr->src[1].is_ssa); in lower_point_size_instr() 45 assert(instr->src[1].ssa->num_components == 1); in lower_point_size_instr() 46 nir_ssa_def *psiz = instr->src[1].ssa; in lower_point_size_instr() 54 nir_instr_rewrite_src(&instr->instr, &instr->src[1], nir_src_for_ssa(psiz)); in lower_point_size_instr() 58 instr_is_point_size(const nir_instr *instr) in instr_is_point_size() argument 60 if (instr->type != nir_instr_type_intrinsic) in instr_is_point_size() 63 nir_intrinsic_instr *intr = nir_instr_as_intrinsic(instr); in instr_is_point_size() [all...] |
H A D | nir_opt_phi_precision.c | 110 narrowing_conversion_op(nir_instr *instr, nir_op current_op) in narrowing_conversion_op() argument 112 if (instr->type != nir_instr_type_alu) in narrowing_conversion_op() 115 nir_op op = nir_instr_as_alu(instr)->op; in narrowing_conversion_op() 156 widening_conversion_op(nir_instr *instr, unsigned *bit_size) in widening_conversion_op() argument 158 if (instr->type != nir_instr_type_alu) in widening_conversion_op() 161 nir_alu_instr *alu = nir_instr_as_alu(instr); in widening_conversion_op() 228 nir_ssa_dest_init(&new_phi->instr, &new_phi->dest, in try_move_narrowing_dst() 237 /* insert new conversion instr in block of original phi src: */ in try_move_narrowing_dst() 260 b->cursor = nir_after_instr(&phi->instr); in try_move_narrowing_dst() 261 nir_builder_instr_insert(b, &new_phi->instr); in try_move_narrowing_dst() 312 nir_instr *instr = src->src.ssa->parent_instr; find_widening_op() local 350 nir_instr *instr = src->src.ssa->parent_instr; find_widening_op() local 389 nir_instr *instr = src->src.ssa->parent_instr; try_move_widening_src() local [all...] |
H A D | nir_opt_find_array_copies.c | 88 node_for_deref(nir_deref_instr *instr, struct match_node *parent, in node_for_deref() argument 92 switch (instr->deref_type) { in node_for_deref() 95 _mesa_hash_table_search(state->var_nodes, instr->var); in node_for_deref() 99 struct match_node *node = create_match_node(instr->type, state); in node_for_deref() 100 _mesa_hash_table_insert(state->var_nodes, instr->var, node); in node_for_deref() 107 _mesa_hash_table_search(state->cast_nodes, instr); in node_for_deref() 111 struct match_node *node = create_match_node(instr->type, state); in node_for_deref() 112 _mesa_hash_table_insert(state->cast_nodes, instr, node); in node_for_deref() 122 if (nir_src_is_const(instr->arr.index)) { in node_for_deref() 123 idx = nir_src_as_uint(instr in node_for_deref() [all...] |
H A D | nir_opt_peephole_select.c | 71 nir_foreach_instr(instr, block) { in block_check_for_allowed_instrs() 72 switch (instr->type) { in block_check_for_allowed_instrs() 82 if (!nir_intrinsic_can_reorder(nir_instr_as_intrinsic(instr))) in block_check_for_allowed_instrs() 95 nir_foreach_instr(instr, block) { in block_check_for_allowed_instrs() 96 switch (instr->type) { in block_check_for_allowed_instrs() 98 nir_intrinsic_instr *intrin = nir_instr_as_intrinsic(instr); in block_check_for_allowed_instrs() 166 nir_alu_instr *mov = nir_instr_as_alu(instr); in block_check_for_allowed_instrs() 307 nir_foreach_instr(instr, last) { in nir_opt_collapse_if() 311 nir_phi_instr *phi = nir_instr_as_phi(instr); in nir_opt_collapse_if() 342 nir_foreach_instr(instr, las in nir_opt_collapse_if() [all...] |
H A D | nir_from_ssa.c | 44 nir_instr *instr; member 308 nir_instr *instr = nir_block_first_instr(block->successors[0]); in add_parallel_copy_to_end_of_block() local 309 if (instr && instr->type == nir_instr_type_phi) in add_parallel_copy_to_end_of_block() 314 nir_instr *instr = nir_block_first_instr(block->successors[1]); in add_parallel_copy_to_end_of_block() local 315 if (instr && instr->type == nir_instr_type_phi) in add_parallel_copy_to_end_of_block() 327 nir_instr_insert(nir_after_block_before_jump(block), &pcopy->instr); in add_parallel_copy_to_end_of_block() 384 nir_foreach_instr(instr, block) { in isolate_phi_nodes_block() 386 if (instr in isolate_phi_nodes_block() 1069 nir_instr *instr = dest->ssa.parent_instr; dest_replace_ssa_with_reg() local [all...] |
H A D | nir_opt_dce.c | 55 is_live(BITSET_WORD *defs_live, nir_instr *instr) in is_live() argument 57 switch (instr->type) { in is_live() 62 nir_alu_instr *alu = nir_instr_as_alu(instr); in is_live() 66 nir_deref_instr *deref = nir_instr_as_deref(instr); in is_live() 70 nir_intrinsic_instr *intrin = nir_instr_as_intrinsic(instr); in is_live() 76 nir_tex_instr *tex = nir_instr_as_tex(instr); in is_live() 80 nir_phi_instr *phi = nir_instr_as_phi(instr); in is_live() 84 nir_load_const_instr *lc = nir_instr_as_load_const(instr); in is_live() 88 nir_ssa_undef_instr *undef = nir_instr_as_ssa_undef(instr); in is_live() 92 nir_parallel_copy_instr *pc = nir_instr_as_parallel_copy(instr); in is_live() [all...] |
/third_party/vixl/examples/aarch64/ |
H A D | custom-disassembler.cc | 40 void CustomDisassembler::AppendRegisterNameToOutput(const Instruction* instr, in AppendRegisterNameToOutput() argument 42 USE(instr); in AppendRegisterNameToOutput() 66 Disassembler::AppendRegisterNameToOutput(instr, reg); in AppendRegisterNameToOutput() 89 const Instruction* instr, const void* addr) { in AppendCodeRelativeCodeAddressToOutput() 90 USE(instr); in AppendCodeRelativeCodeAddressToOutput() 111 void CustomDisassembler::Visit(Metadata* metadata, const Instruction* instr) { in Visit() argument 112 vixl::aarch64::Disassembler::Visit(metadata, instr); in Visit() 119 if (instr->GetRd() == 10) { in Visit() 123 ProcessOutput(instr); in Visit() 176 Instruction* instr; in TestCustomDisassembler() local 88 AppendCodeRelativeCodeAddressToOutput( const Instruction* instr, const void* addr) AppendCodeRelativeCodeAddressToOutput() argument [all...] |
/third_party/mesa3d/src/gallium/drivers/r600/sfn/ |
H A D | sfn_nir_lower_64bit.cpp | 102 bool filter(const nir_instr *instr) const override; 103 nir_ssa_def *lower(nir_instr *instr) override; 112 bool filter(const nir_instr *instr) const override; 113 nir_ssa_def *lower(nir_instr *instr) override; 116 bool LowerLoad64Uniform::filter(const nir_instr *instr) const in filter() 118 if (instr->type != nir_instr_type_intrinsic) in filter() 121 auto intr = nir_instr_as_intrinsic(instr); in filter() 131 nir_ssa_def *LowerLoad64Uniform::lower(nir_instr *instr) in lower() argument 133 auto intr = nir_instr_as_intrinsic(instr); in lower() 164 bool filter(const nir_instr *instr) cons 720 lower(nir_instr *instr) lower() argument 855 lower(nir_instr *instr) lower() argument 1247 r600_lower_64bit_intrinsic(nir_builder *b, nir_intrinsic_instr *instr) r600_lower_64bit_intrinsic() argument 1385 r600_lower_64bit_load_const(nir_builder *b, nir_load_const_instr *instr) r600_lower_64bit_load_const() argument 1422 r600_lower_64bit_to_vec2_instr(nir_builder *b, nir_instr *instr, void *data) r600_lower_64bit_to_vec2_instr() argument [all...] |
H A D | sfn_shader.cpp | 215 sfn_log << SfnLog::instr << "Create Instr from '" << s << "'\n"; in emit_instruction_from_string() 219 sfn_log << SfnLog::instr << " Emit start block\n"; in emit_instruction_from_string() member in r600::SfnLog 233 sfn_log << SfnLog::instr << " " << *ir << "\n"; in emit_instruction_from_string() 499 nir_foreach_instr(instr, block) { in scan_shader() 500 if (!scan_instruction(instr)) { in scan_shader() 502 nir_print_instr(instr, stderr); in scan_shader() 571 bool Shader::scan_instruction(nir_instr *instr) in scan_instruction() argument 573 if (do_scan_instruction(instr)) in scan_instruction() 576 if (instr->type != nir_instr_type_intrinsic) in scan_instruction() 579 auto intr = nir_instr_as_intrinsic(instr); in scan_instruction() 745 sfn_log << SfnLog::instr << "FROM:" << *instr << "\\n"; process_block() local 749 << *instr << "\\n"; process_block() local 756 process_instr(nir_instr *instr) process_instr() argument 858 emit_atomic_local_shared(nir_intrinsic_instr* instr) emit_atomic_local_shared() argument 1016 emit_local_store(nir_intrinsic_instr *instr) emit_local_store() argument 1040 emit_local_load(nir_intrinsic_instr* instr) emit_local_load() argument 1048 chain_scratch_read(Instr *instr) chain_scratch_read() argument 1053 chain_ssbo_read(Instr *instr) chain_ssbo_read() argument 1066 visit(ScratchIOInstr *instr) visit() argument 1071 visit(GDSInstr *instr) visit() argument 1079 visit(RatInstr *instr) visit() argument 1099 emit_instruction(PInst instr) emit_instruction() argument 1101 sfn_log << SfnLog::instr << " " << *instr << "\\n"; emit_instruction() local 1152 emit_load_tcs_param_base(nir_intrinsic_instr* instr, int offset) emit_load_tcs_param_base() argument 1169 emit_shader_clock(nir_intrinsic_instr* instr) emit_shader_clock() argument 1195 load_ubo(nir_intrinsic_instr *instr) load_ubo() argument [all...] |
H A D | sfn_shader_gs.cpp | 40 bool GeometryShader::do_scan_instruction(nir_instr *instr) in do_scan_instruction() argument 42 if (instr->type != nir_instr_type_intrinsic) in do_scan_instruction() 45 nir_intrinsic_instr *ii = nir_instr_as_intrinsic(instr); in do_scan_instruction() 57 bool GeometryShader::process_store_output(nir_intrinsic_instr *instr) in process_store_output() argument 59 auto location = nir_intrinsic_io_semantics(instr).location; in process_store_output() 60 auto index = nir_src_as_const_value(instr->src[1]); in process_store_output() 63 auto driver_location = nir_intrinsic_base(instr) + index->u32; in process_store_output() 86 auto write_mask = nir_intrinsic_write_mask(instr); in process_store_output() 89 if (!nir_intrinsic_io_semantics(instr).no_varying) in process_store_output() 91 if (nir_intrinsic_io_semantics(instr) in process_store_output() 115 process_load_input(nir_intrinsic_instr *instr) process_load_input() argument 216 emit_vertex(nir_intrinsic_instr* instr, bool cut) emit_vertex() argument [all...] |
H A D | sfn_nir_lower_fs_out_to_vector.cpp | 74 bool instr_can_rewrite(nir_instr *instr); 75 bool vec_instr_set_remove(nir_builder *b,nir_instr *instr); 81 nir_intrinsic_instr *instr); 248 nir_foreach_instr_safe(instr, block) { in vectorize_block() 249 if (instr_can_rewrite(instr)) { in vectorize_block() 250 instr->index = m_next_index++; in vectorize_block() 251 nir_intrinsic_instr *ir = nir_instr_as_intrinsic(instr); in vectorize_block() 261 nir_foreach_instr_reverse_safe(instr, block) { in vectorize_block() 262 progress |= vec_instr_set_remove(b, instr); in vectorize_block() 269 bool NirLowerIOToVector::instr_can_rewrite(nir_instr *instr) in instr_can_rewrite() argument 282 vec_instr_set_remove(nir_builder *b,nir_instr *instr) vec_instr_set_remove() argument 326 vec_instr_stack_pop(nir_builder *b, InstrSubSet &ir_set, nir_intrinsic_instr *instr) vec_instr_stack_pop() argument 443 nir_alu_instr * instr = nir_alu_instr_create(b->shader, op); create_combined_vector() local [all...] |
/third_party/mesa3d/src/broadcom/compiler/ |
H A D | nir_to_vir.c | 176 v3d_get_op_for_atomic_add(nir_intrinsic_instr *instr, unsigned src) in v3d_get_op_for_atomic_add() argument 178 if (nir_src_is_const(instr->src[src])) { in v3d_get_op_for_atomic_add() 179 int64_t add_val = nir_src_as_int(instr->src[src]); in v3d_get_op_for_atomic_add() 190 v3d_general_tmu_op(nir_intrinsic_instr *instr) in v3d_general_tmu_op() argument 192 switch (instr->intrinsic) { in v3d_general_tmu_op() 205 return v3d_get_op_for_atomic_add(instr, 2); in v3d_general_tmu_op() 208 return v3d_get_op_for_atomic_add(instr, 1); in v3d_general_tmu_op() 353 nir_intrinsic_instr *instr, in emit_tmu_general_store_writes() 373 last_component < instr->num_components); in emit_tmu_general_store_writes() 376 struct qreg data = ntq_get_src(c, instr in emit_tmu_general_store_writes() 351 emit_tmu_general_store_writes(struct v3d_compile *c, enum emit_mode mode, nir_intrinsic_instr *instr, uint32_t base_const_offset, uint32_t *writemask, uint32_t *const_offset, uint32_t *type_size, uint32_t *tmu_writes) emit_tmu_general_store_writes() argument 409 emit_tmu_general_atomic_writes(struct v3d_compile *c, enum emit_mode mode, nir_intrinsic_instr *instr, uint32_t tmu_op, bool has_index, uint32_t *tmu_writes) emit_tmu_general_atomic_writes() argument 443 emit_tmu_general_address_write(struct v3d_compile *c, enum emit_mode mode, nir_intrinsic_instr *instr, uint32_t config, bool dynamic_src, int offset_src, struct qreg base_offset, uint32_t const_offset, uint32_t *tmu_writes) emit_tmu_general_address_write() argument 503 ntq_emit_tmu_general(struct v3d_compile *c, nir_intrinsic_instr *instr, bool is_shared_or_scratch, bool is_global) ntq_emit_tmu_general() argument 876 ntq_get_alu_src(struct v3d_compile *c, nir_alu_instr *instr, unsigned src) ntq_get_alu_src() argument 897 ntq_emit_txs(struct v3d_compile *c, nir_tex_instr *instr) ntq_emit_txs() argument 944 ntq_emit_tex(struct v3d_compile *c, nir_tex_instr *instr) ntq_emit_tex() argument 1423 ntq_emit_alu(struct v3d_compile *c, nir_alu_instr *instr) ntq_emit_alu() argument 2511 ntq_emit_load_const(struct v3d_compile *c, nir_load_const_instr *instr) ntq_emit_load_const() argument 2525 ntq_emit_image_size(struct v3d_compile *c, nir_intrinsic_instr *instr) ntq_emit_image_size() argument 2553 vir_emit_tlb_color_read(struct v3d_compile *c, nir_intrinsic_instr *instr) vir_emit_tlb_color_read() argument 2723 ntq_emit_load_uniform(struct v3d_compile *c, nir_intrinsic_instr *instr) ntq_emit_load_uniform() argument 2747 ntq_emit_inline_ubo_load(struct v3d_compile *c, nir_intrinsic_instr *instr) ntq_emit_inline_ubo_load() argument 2782 ntq_emit_load_input(struct v3d_compile *c, nir_intrinsic_instr *instr) ntq_emit_load_input() argument 2844 ntq_emit_per_sample_color_write(struct v3d_compile *c, nir_intrinsic_instr *instr) ntq_emit_per_sample_color_write() argument 2863 ntq_emit_color_write(struct v3d_compile *c, nir_intrinsic_instr *instr) ntq_emit_color_write() argument 2876 emit_store_output_gs(struct v3d_compile *c, nir_intrinsic_instr *instr) emit_store_output_gs() argument 2917 emit_store_output_vs(struct v3d_compile *c, nir_intrinsic_instr *instr) emit_store_output_vs() argument 2940 ntq_emit_store_output(struct v3d_compile *c, nir_intrinsic_instr *instr) ntq_emit_store_output() argument 3102 ntq_emit_load_unifa(struct v3d_compile *c, nir_intrinsic_instr *instr) ntq_emit_load_unifa() argument 3312 ntq_emit_intrinsic(struct v3d_compile *c, nir_intrinsic_instr *instr) ntq_emit_intrinsic() argument 4126 ntq_emit_instr(struct v3d_compile *c, nir_instr *instr) ntq_emit_instr() argument [all...] |
/third_party/mesa3d/src/gallium/drivers/etnaviv/ |
H A D | etnaviv_nir.c | 40 nir_foreach_instr_safe(instr, block) { in etna_lower_io() 41 if (instr->type == nir_instr_type_intrinsic) { in etna_lower_io() 42 nir_intrinsic_instr *intr = nir_instr_as_intrinsic(instr); in etna_lower_io() 51 b.cursor = nir_after_instr(instr); in etna_lower_io() 72 b.cursor = nir_before_instr(instr); in etna_lower_io() 78 nir_instr_rewrite_src(instr, &intr->src[1], nir_src_for_ssa(ssa)); in etna_lower_io() 90 if (instr->type != nir_instr_type_tex) in etna_lower_io() 93 nir_tex_instr *tex = nir_instr_as_tex(instr); in etna_lower_io() 137 nir_ssa_dest_init(&vec->instr, &vec->dest.dest, 4, 32, NULL); in etna_lower_io() 140 nir_instr_rewrite_src(&tex->instr, coor in etna_lower_io() [all...] |
/third_party/skia/third_party/externals/spirv-tools/source/fuzz/ |
H A D | transformation_duplicate_region_with_selection.cpp | 219 for (auto& instr : *block) { in IsApplicable() 220 if (!instr.HasResultId()) { in IsApplicable() 225 if (original_id_to_duplicate_id.count(instr.result_id()) == 0) { in IsApplicable() 230 auto duplicate_id = original_id_to_duplicate_id.at(instr.result_id()); in IsApplicable() 246 if (AvailableAfterRegion(instr, exit_block, ir_context)) { in IsApplicable() 247 if (!ValidOpPhiArgument(instr, ir_context)) { in IsApplicable() 253 &instr, in IsApplicable() 267 if (original_id_to_phi_id.count(instr.result_id()) == 0) { in IsApplicable() 273 auto phi_id = original_id_to_phi_id.at(instr.result_id()); in IsApplicable() 336 for (auto& instr in Apply() 687 AvailableAfterRegion( const opt::Instruction& instr, opt::BasicBlock* exit_block, opt::IRContext* ir_context) AvailableAfterRegion() argument 696 ValidOpPhiArgument( const opt::Instruction& instr, opt::IRContext* ir_context) ValidOpPhiArgument() argument [all...] |
/third_party/skia/third_party/externals/swiftshader/third_party/SPIRV-Tools/source/fuzz/ |
H A D | transformation_duplicate_region_with_selection.cpp | 219 for (auto& instr : *block) { in IsApplicable() 220 if (!instr.HasResultId()) { in IsApplicable() 225 if (original_id_to_duplicate_id.count(instr.result_id()) == 0) { in IsApplicable() 230 auto duplicate_id = original_id_to_duplicate_id.at(instr.result_id()); in IsApplicable() 246 if (AvailableAfterRegion(instr, exit_block, ir_context)) { in IsApplicable() 247 if (!ValidOpPhiArgument(instr, ir_context)) { in IsApplicable() 253 &instr, in IsApplicable() 267 if (original_id_to_phi_id.count(instr.result_id()) == 0) { in IsApplicable() 273 auto phi_id = original_id_to_phi_id.at(instr.result_id()); in IsApplicable() 336 for (auto& instr in Apply() 687 AvailableAfterRegion( const opt::Instruction& instr, opt::BasicBlock* exit_block, opt::IRContext* ir_context) AvailableAfterRegion() argument 696 ValidOpPhiArgument( const opt::Instruction& instr, opt::IRContext* ir_context) ValidOpPhiArgument() argument [all...] |
/third_party/spirv-tools/source/fuzz/ |
H A D | transformation_duplicate_region_with_selection.cpp | 219 for (auto& instr : *block) { in IsApplicable() 220 if (!instr.HasResultId()) { in IsApplicable() 225 if (original_id_to_duplicate_id.count(instr.result_id()) == 0) { in IsApplicable() 230 auto duplicate_id = original_id_to_duplicate_id.at(instr.result_id()); in IsApplicable() 246 if (AvailableAfterRegion(instr, exit_block, ir_context)) { in IsApplicable() 247 if (!ValidOpPhiArgument(instr, ir_context)) { in IsApplicable() 253 &instr, in IsApplicable() 267 if (original_id_to_phi_id.count(instr.result_id()) == 0) { in IsApplicable() 273 auto phi_id = original_id_to_phi_id.at(instr.result_id()); in IsApplicable() 336 for (auto& instr in Apply() 687 AvailableAfterRegion( const opt::Instruction& instr, opt::BasicBlock* exit_block, opt::IRContext* ir_context) AvailableAfterRegion() argument 696 ValidOpPhiArgument( const opt::Instruction& instr, opt::IRContext* ir_context) ValidOpPhiArgument() argument [all...] |
/third_party/mesa3d/src/imagination/rogue/nir/ |
H A D | rogue_nir_lower_io.c | 45 nir_instr_remove(&intr->instr); in lower_vulkan_resource_index() 56 nir_instr_remove(&intr->instr); in lower_load_vulkan_descriptor() 62 b->cursor = nir_before_instr(&intr->instr); in lower_load_ubo_to_scalar() 73 nir_ssa_dest_init(&chan_intr->instr, in lower_load_ubo_to_scalar() 95 nir_builder_instr_insert(b, &chan_intr->instr); in lower_load_ubo_to_scalar() 102 nir_instr_remove(&intr->instr); in lower_load_ubo_to_scalar() 106 lower_intrinsic(nir_builder *b, nir_intrinsic_instr *instr, void *layout) in lower_intrinsic() argument 108 switch (instr->intrinsic) { in lower_intrinsic() 110 lower_load_vulkan_descriptor(b, instr); in lower_intrinsic() 114 lower_vulkan_resource_index(b, instr, layou in lower_intrinsic() [all...] |
/third_party/node/deps/v8/src/codegen/arm64/ |
H A D | decoder-arm64.h | 92 #define DECLARE(A) virtual void Visit##A(Instruction* instr) = 0; 132 void VisitNEONShiftImmediate(const Instruction* instr); 134 #define DECLARE(A) void Visit##A(Instruction* instr); 151 virtual void Decode(Instruction* instr); 157 void DecodePCRelAddressing(Instruction* instr); 162 void DecodeAddSubImmediate(Instruction* instr); 167 void DecodeBranchSystemException(Instruction* instr); 172 void DecodeLoadStore(Instruction* instr); 177 void DecodeLogical(Instruction* instr); 182 void DecodeBitfieldExtract(Instruction* instr); [all...] |
/third_party/mesa3d/src/asahi/compiler/ |
H A D | agx_compile.c | 164 agx_emit_load_const(agx_builder *b, nir_load_const_instr *instr) in agx_emit_load_const() argument 167 unsigned bit_size = instr->def.bit_size; in agx_emit_load_const() 168 assert(instr->def.num_components == 1); in agx_emit_load_const() 173 agx_get_index(instr->def.index, agx_size_for_bits(bit_size)), in agx_emit_load_const() 174 nir_const_value_as_uint(instr->value[0], bit_size)); in agx_emit_load_const() 222 agx_emit_load_attr(agx_builder *b, agx_index *dests, nir_intrinsic_instr *instr) in agx_emit_load_attr() argument 224 nir_src *offset_src = nir_get_io_offset_src(instr); in agx_emit_load_attr() 226 unsigned index = nir_intrinsic_base(instr) + in agx_emit_load_attr() 257 assert(instr->num_components <= 4); in agx_emit_load_attr() 260 agx_index vec = agx_vec_for_dest(b->shader, &instr in agx_emit_load_attr() 276 agx_emit_load_vary_flat(agx_builder *b, agx_index *dests, nir_intrinsic_instr *instr) agx_emit_load_vary_flat() argument 296 agx_emit_load_vary(agx_builder *b, agx_index *dests, nir_intrinsic_instr *instr) agx_emit_load_vary() argument 318 agx_emit_store_vary(agx_builder *b, nir_intrinsic_instr *instr) agx_emit_store_vary() argument 335 agx_emit_fragment_out(agx_builder *b, nir_intrinsic_instr *instr) agx_emit_fragment_out() argument 372 agx_emit_load_tile(agx_builder *b, agx_index *dests, nir_intrinsic_instr *instr) agx_emit_load_tile() argument 407 agx_emit_load_ubo(agx_builder *b, agx_index dst, nir_intrinsic_instr *instr) agx_emit_load_ubo() argument 441 agx_emit_load_frag_coord(agx_builder *b, agx_index *dests, nir_intrinsic_instr *instr) agx_emit_load_frag_coord() argument 472 agx_emit_discard(agx_builder *b, nir_intrinsic_instr *instr) agx_emit_discard() argument 483 agx_emit_intrinsic(agx_builder *b, nir_intrinsic_instr *instr) agx_emit_intrinsic() argument 628 agx_emit_alu(agx_builder *b, nir_alu_instr *instr) agx_emit_alu() argument 886 agx_emit_tex(agx_builder *b, nir_tex_instr *instr) agx_emit_tex() argument 1011 agx_emit_jump(agx_builder *b, nir_jump_instr *instr) agx_emit_jump() argument 1039 agx_emit_phi(agx_builder *b, nir_phi_instr *instr) agx_emit_phi() argument 1088 agx_emit_instr(agx_builder *b, struct nir_instr *instr) agx_emit_instr() argument 1354 agx_lower_sincos_filter(const nir_instr *instr, UNUSED const void *_) agx_lower_sincos_filter() argument 1373 agx_lower_sincos_impl(struct nir_builder *b, nir_instr *instr, UNUSED void *_) agx_lower_sincos_impl() argument 1394 agx_lower_front_face(struct nir_builder *b, nir_instr *instr, UNUSED void *data) agx_lower_front_face() argument 1414 agx_lower_aligned_offsets(struct nir_builder *b, nir_instr *instr, UNUSED void *data) agx_lower_aligned_offsets() argument [all...] |
/third_party/node/deps/v8/src/codegen/mips/ |
H A D | assembler-mips.cc | 368 Register Assembler::GetRtReg(Instr instr) { in GetRtReg() argument 369 return Register::from_code((instr & kRtFieldMask) >> kRtShift); in GetRtReg() 372 Register Assembler::GetRsReg(Instr instr) { in GetRsReg() argument 373 return Register::from_code((instr & kRsFieldMask) >> kRsShift); in GetRsReg() 376 Register Assembler::GetRdReg(Instr instr) { in GetRdReg() argument 377 return Register::from_code((instr & kRdFieldMask) >> kRdShift); in GetRdReg() 380 uint32_t Assembler::GetRt(Instr instr) { in GetRt() argument 381 return (instr & kRtFieldMask) >> kRtShift; in GetRt() 384 uint32_t Assembler::GetRtField(Instr instr) { return instr argument 386 GetRs(Instr instr) GetRs() argument 390 GetRsField(Instr instr) GetRsField() argument 392 GetRd(Instr instr) GetRd() argument 396 GetRdField(Instr instr) GetRdField() argument 398 GetSa(Instr instr) GetSa() argument 402 GetSaField(Instr instr) GetSaField() argument 404 GetOpcodeField(Instr instr) GetOpcodeField() argument 406 GetFunction(Instr instr) GetFunction() argument 410 GetFunctionField(Instr instr) GetFunctionField() argument 414 GetImmediate16(Instr instr) GetImmediate16() argument 416 GetLabelConst(Instr instr) GetLabelConst() argument 418 IsPop(Instr instr) IsPop() argument 422 IsPush(Instr instr) IsPush() argument 426 IsSwRegFpOffset(Instr instr) IsSwRegFpOffset() argument 430 IsLwRegFpOffset(Instr instr) IsLwRegFpOffset() argument 434 IsSwRegFpNegOffset(Instr instr) IsSwRegFpNegOffset() argument 439 IsLwRegFpNegOffset(Instr instr) IsLwRegFpNegOffset() argument 463 IsMsaBranch(Instr instr) IsMsaBranch() argument 487 IsBranch(Instr instr) IsBranch() argument 511 IsBc(Instr instr) IsBc() argument 517 IsNal(Instr instr) IsNal() argument 524 IsBzc(Instr instr) IsBzc() argument 531 IsEmittedConstant(Instr instr) IsEmittedConstant() argument 536 IsBeq(Instr instr) IsBeq() argument 538 IsBne(Instr instr) IsBne() argument 540 IsBeqzc(Instr instr) IsBeqzc() argument 545 IsBnezc(Instr instr) IsBnezc() argument 550 IsBeqc(Instr instr) IsBeqc() argument 557 IsBnec(Instr instr) IsBnec() argument 564 IsJicOrJialc(Instr instr) IsJicOrJialc() argument 570 IsJump(Instr instr) IsJump() argument 582 IsJ(Instr instr) IsJ() argument 588 IsJal(Instr instr) IsJal() argument 590 IsJr(Instr instr) IsJr() argument 599 IsJalr(Instr instr) IsJalr() argument 604 IsLui(Instr instr) IsLui() argument 610 IsOri(Instr instr) IsOri() argument 616 IsAddu(Instr instr, Register rd, Register rs, Register rt) IsAddu() argument 630 IsMov(Instr instr, Register rd, Register rs) IsMov() argument 644 IsNop(Instr instr, unsigned int type) IsNop() argument 666 GetBranchOffset(Instr instr) GetBranchOffset() argument 671 IsLw(Instr instr) IsLw() argument 675 GetLwOffset(Instr instr) GetLwOffset() argument 680 SetLwOffset(Instr instr, int16_t offset) SetLwOffset() argument 690 IsSw(Instr instr) IsSw() argument 694 SetSwOffset(Instr instr, int16_t offset) SetSwOffset() argument 699 IsAddImmediate(Instr instr) IsAddImmediate() argument 703 SetAddImmediateOffset(Instr instr, int16_t offset) SetAddImmediateOffset() argument 708 IsAndImmediate(Instr instr) IsAndImmediate() argument 712 OffsetSizeInBits(Instr instr) OffsetSizeInBits() argument 723 AddBranchOffset(int pos, Instr instr) AddBranchOffset() argument 812 Instr instr = instr_at(pos); target_at() local 882 SetBranchOffset(int32_t pos, int32_t target_pos, Instr instr) SetBranchOffset() argument 898 Instr instr = instr_at(pos); target_at_put() local 1015 Instr instr = instr_at(l.pos()); print() local 1045 Instr instr = instr_at(fixup_pos); bind_to() local 1104 BranchOffset(Instr instr) BranchOffset() argument 1142 Instr instr = opcode | (rs.code() << kRsShift) | (rt.code() << kRtShift) | GenInstrRegister() local 1151 Instr instr = opcode | (rs.code() << kRsShift) | (rt.code() << kRtShift) | GenInstrRegister() local 1160 Instr instr = opcode | fmt | (ft.code() << kFtShift) | GenInstrRegister() local 1169 Instr instr = opcode | (fr.code() << kFrShift) | (ft.code() << kFtShift) | GenInstrRegister() local 1178 Instr instr = opcode | fmt | (rt.code() << kRtShift) | GenInstrRegister() local 1186 Instr instr = GenInstrRegister() local 1197 Instr instr = opcode | (rs.code() << kRsShift) | (rt.code() << kRtShift) | GenInstrImmediate() local 1207 Instr instr = opcode | (base.code() << kBaseShift) | (rt.code() << kRtShift) | GenInstrImmediate() local 1217 Instr instr = opcode | (rs.code() << kRsShift) | SF | (j & kImm16Mask); GenInstrImmediate() local 1225 Instr instr = opcode | (rs.code() << kRsShift) | (ft.code() << kFtShift) | GenInstrImmediate() local 1233 Instr instr = opcode | (rs.code() << kRsShift) | (offset21 & kImm21Mask); GenInstrImmediate() local 1240 Instr instr = opcode | (rs.code() << kRsShift) | (offset21 & kImm21Mask); GenInstrImmediate() local 1247 Instr instr = opcode | (offset26 & kImm26Mask); GenInstrImmediate() local 1254 Instr instr = opcode | address; GenInstrJump() local 1264 Instr instr = MSA | operation | ((imm8 & kImm8Mask) << kWtShift) | GenInstrMsaI8() local 1278 Instr instr = MSA | operation | df | ((imm5 & kImm5Mask) << kWtShift) | GenInstrMsaI5() local 1287 Instr instr = MSA | operation | df | (m << kWtShift) | GenInstrMsaBit() local 1296 Instr instr = MSA | operation | df | ((imm10 & kImm10Mask) << kWsShift) | GenInstrMsaI10() local 1306 Instr instr = MSA | operation | df | (t.code() << kWtShift) | GenInstrMsa3R() local 1316 Instr instr = MSA | operation | df | (n << kWtShift) | GenInstrMsaElm() local 1327 Instr instr = MSA | operation | (df << 21) | (wt.code() << kWtShift) | GenInstrMsa3RF() local 1336 Instr instr = MSA | operation | (wt.code() << kWtShift) | GenInstrMsaVec() local 1346 Instr instr = MSA | operation | ((s10 & kImm10Mask) << kWtShift) | GenInstrMsaMI10() local 1355 Instr instr = MSA | MSA_2R_FORMAT | operation | df | (ws.code() << kWsShift) | GenInstrMsa2R() local 1364 Instr instr = MSA | MSA_2RF_FORMAT | operation | df | GenInstrMsa2RF() local 1375 Instr instr = GenInstrMsaBranch() local 1919 Instr instr = SPECIAL | (1 << kRsShift) | (rt.code() << kRtShift) | rotr() local 1928 Instr instr = SPECIAL | (rs.code() << kRsShift) | (rt.code() << kRtShift) | rotrv() local 1937 Instr instr = SPECIAL | rs.code() << kRsShift | rt.code() << kRtShift | lsa() local 2240 Instr instr = tge() local 2247 Instr instr = SPECIAL | TGEU | rs.code() << kRsShift | rt.code() << kRtShift | tgeu() local 2254 Instr instr = tlt() local 2261 Instr instr = SPECIAL | TLTU | rs.code() << kRsShift | rt.code() << kRtShift | tltu() local 2268 Instr instr = teq() local 2275 Instr instr = tne() local 2368 Instr instr = pref() local 2875 Instr instr = COP1 | fmt | ft.code() << kFtShift | fs.code() << kFsShift | cmp() local 2893 Instr instr = COP1 | BC1EQZ | ft.code() << kFtShift | (offset & kImm16Mask); bc1eqz() local 2901 Instr instr = COP1 | BC1NEZ | ft.code() << kFtShift | (offset & kImm16Mask); bc1nez() local 2912 Instr instr = COP1 | fmt | ft.code() << 16 | fs.code() << kFsShift | cc << 8 | c() local 2937 Instr instr = COP1 | BC1 | cc << 18 | 0 << 16 | (offset & kImm16Mask); bc1f() local 2945 Instr instr = COP1 | BC1 | cc << 18 | 1 << 16 | (offset & kImm16Mask); bc1t() local 3403 Instr instr = MSA | MOVE_V | (ws.code() << kWsShift) | move_v() local 3411 Instr instr = MSA | CTCMSA | (rs.code() << kWsShift) | ctcmsa() local 3419 Instr instr = MSA | CFCMSA | (cs.code() << kWsShift) | cfcmsa() local 3457 Instr instr = instr_at(pc); RelocateInternalReference() local 3506 Instr instr = instr_at(pc); RelocateRelativeReference() local [all...] |
/kernel/linux/linux-5.10/arch/arm/include/asm/ |
H A D | domain.h | 133 #define TUSER(instr) TUSERCOND(instr, ) 134 #define TUSERCOND(instr, cond) #instr "t" #cond 136 #define TUSER(instr) TUSERCOND(instr, ) 137 #define TUSERCOND(instr, cond) #instr #cond 147 #define TUSER(instr) instr ## [all...] |