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/kernel/linux/linux-6.6/drivers/gpu/drm/amd/display/dc/dce/
H A Ddce_aux.c35 aux110->base.ctx
54 container_of((ptr), struct aux_engine_dce110, base)
57 FROM_AUX_ENGINE(container_of((ptr), struct dce_aux, base))
60 container_of((ptr), struct dce_aux, base)
516 aux_engine110->base.ddc = NULL; in dce110_aux_engine_construct()
517 aux_engine110->base.ctx = ctx; in dce110_aux_engine_construct()
518 aux_engine110->base.delay = 0; in dce110_aux_engine_construct()
519 aux_engine110->base.max_defer_write_retry = 0; in dce110_aux_engine_construct()
520 aux_engine110->base.inst = inst; in dce110_aux_engine_construct()
526 aux_engine110->base in dce110_aux_engine_construct()
[all...]
/kernel/linux/linux-6.6/drivers/crypto/allwinner/sun8i-ss/
H A Dsun8i-ss-cipher.c27 struct sun8i_ss_alg_template *algt = container_of(alg, struct sun8i_ss_alg_template, alg.skcipher.base); in sun8i_ss_need_fallback()
101 alg.skcipher.base); in sun8i_ss_cipher_fallback()
109 skcipher_request_set_callback(&rctx->fallback_req, areq->base.flags, in sun8i_ss_cipher_fallback()
110 areq->base.complete, areq->base.data); in sun8i_ss_cipher_fallback()
201 algt = container_of(alg, struct sun8i_ss_alg_template, alg.skcipher.base); in sun8i_ss_cipher()
204 crypto_tfm_alg_name(areq->base.tfm), in sun8i_ss_cipher()
297 err = sun8i_ss_run_task(ss, rctx, crypto_tfm_alg_name(areq->base.tfm)); in sun8i_ss_cipher()
335 struct skcipher_request *breq = container_of(areq, struct skcipher_request, base); in sun8i_ss_handle_cipher_request()
398 algt = container_of(alg, struct sun8i_ss_alg_template, alg.skcipher.base); in sun8i_ss_cipher_init()
[all...]
/kernel/linux/linux-6.6/drivers/perf/
H A Darm_dmc620_pmu.c41 * offsets are relative to that base.
89 void __iomem *base; member
267 return readl(dmc620_pmu->base + DMC620_PMU_COUNTERn_OFFSET(idx) + reg); in dmc620_pmu_creg_read()
274 writel(val, dmc620_pmu->base + DMC620_PMU_COUNTERn_OFFSET(idx) + reg); in dmc620_pmu_creg_write()
390 status = readl(dmc620_pmu->base + DMC620_PMU_OVERFLOW_STATUS_CLKDIV2); in dmc620_pmu_handle_irq()
391 status |= (readl(dmc620_pmu->base + DMC620_PMU_OVERFLOW_STATUS_CLK) << in dmc620_pmu_handle_irq()
404 writel(0, dmc620_pmu->base + DMC620_PMU_OVERFLOW_STATUS_CLKDIV2); in dmc620_pmu_handle_irq()
408 writel(0, dmc620_pmu->base + DMC620_PMU_OVERFLOW_STATUS_CLK); in dmc620_pmu_handle_irq()
687 dmc620_pmu->base = devm_platform_get_and_ioremap_resource(pdev, 0, &res); in dmc620_pmu_device_probe()
688 if (IS_ERR(dmc620_pmu->base)) in dmc620_pmu_device_probe()
[all...]
/kernel/linux/linux-6.6/drivers/gpu/drm/nouveau/nvkm/subdev/mmu/
H A Dvmmgp100.c42 u32 datalo = nvkm_ro32(pt->memory, pt->base + ptei * 8 + 0); in gp100_vmm_pfn_unmap()
43 u32 datahi = nvkm_ro32(pt->memory, pt->base + ptei * 8 + 4); in gp100_vmm_pfn_unmap()
61 u32 datalo = nvkm_ro32(pt->memory, pt->base + ptei * 8 + 0); in gp100_vmm_pfn_clear()
62 u32 datahi = nvkm_ro32(pt->memory, pt->base + ptei * 8 + 4); in gp100_vmm_pfn_clear()
276 u32 datalo = nvkm_ro32(pt->memory, pt->base + ptei * 16 + 0); in gp100_vmm_pd0_pfn_unmap()
277 u32 datahi = nvkm_ro32(pt->memory, pt->base + ptei * 16 + 4); in gp100_vmm_pd0_pfn_unmap()
297 u32 datalo = nvkm_ro32(pt->memory, pt->base + ptei * 16 + 0); in gp100_vmm_pd0_pfn_clear()
298 u32 datahi = nvkm_ro32(pt->memory, pt->base + ptei * 16 + 4); in gp100_vmm_pd0_pfn_clear()
571 u64 base = BIT_ULL(10) /* VER2 */ | BIT_ULL(11) /* 64KiB */; in gp100_vmm_join() local
573 base | in gp100_vmm_join()
[all...]
/kernel/linux/linux-6.6/tools/objtool/arch/x86/
H A Ddecode.c735 state->regs[i].base = CFI_UNDEFINED; in arch_initial_func_cfi_state()
740 state->cfa.base = CFI_SP; in arch_initial_func_cfi_state()
744 state->regs[CFI_RA].base = CFI_CFA; in arch_initial_func_cfi_state()
786 int arch_decode_hint_reg(u8 sp_reg, int *base) in arch_decode_hint_reg() argument
790 *base = CFI_UNDEFINED; in arch_decode_hint_reg()
793 *base = CFI_SP; in arch_decode_hint_reg()
796 *base = CFI_BP; in arch_decode_hint_reg()
799 *base = CFI_SP_INDIRECT; in arch_decode_hint_reg()
802 *base = CFI_R10; in arch_decode_hint_reg()
805 *base in arch_decode_hint_reg()
[all...]
/kernel/linux/linux-6.6/tools/testing/selftests/kvm/x86_64/
H A Duserspace_msr_exit_test.c31 .base = MSR_IA32_XSS,
38 .base = MSR_IA32_FLUSH_CMD,
45 .base = MSR_NON_EXISTENT,
57 .base = MSR_FS_BASE,
69 .base = MSR_GS_BASE,
111 .base = 0x00000000,
116 .base = 0x00000000,
121 .base = 0x40000000,
126 .base = 0xc0000000,
131 .base
[all...]
/third_party/icu/icu4j/main/classes/core/src/com/ibm/icu/impl/
H A DICUBinary.java112 int base = bytes.position(); in addBaseNamesInFolder()
113 int count = bytes.getInt(base); in addBaseNamesInFolder()
121 int base = bytes.position(); in binarySearch()
122 int count = bytes.getInt(base); in binarySearch()
146 int base = bytes.position(); in getNameOffset()
147 assert 0 <= index && index < bytes.getInt(base); // count in getNameOffset()
150 return base + bytes.getInt(base + 4 + index * 8); in getNameOffset()
154 int base = bytes.position(); in getDataOffset()
155 int count = bytes.getInt(base); in getDataOffset()
[all...]
/third_party/icu/ohos_icu4j/src/main/java/ohos/global/icu/impl/
H A DICUBinary.java116 int base = bytes.position(); in addBaseNamesInFolder()
117 int count = bytes.getInt(base); in addBaseNamesInFolder()
125 int base = bytes.position(); in binarySearch()
126 int count = bytes.getInt(base); in binarySearch()
150 int base = bytes.position(); in getNameOffset()
151 assert 0 <= index && index < bytes.getInt(base); // count in getNameOffset()
154 return base + bytes.getInt(base + 4 + index * 8); in getNameOffset()
158 int base = bytes.position(); in getDataOffset()
159 int count = bytes.getInt(base); in getDataOffset()
[all...]
/third_party/mesa3d/src/gallium/include/pipe/
H A Dp_video_state.h156 struct pipe_picture_desc base; member
180 struct pipe_macroblock base; member
220 struct pipe_picture_desc base; member
245 struct pipe_picture_desc base; member
336 struct pipe_picture_desc base; member
415 struct pipe_picture_desc base; member
518 struct pipe_picture_desc base; member
619 struct pipe_picture_desc base; member
648 struct pipe_picture_desc base; member
730 struct pipe_picture_desc base; member
802 struct pipe_picture_desc base; global() member
977 struct pipe_picture_desc base; global() member
[all...]
/third_party/icu/icu4c/source/tools/makeconv/
H A Dmakeconv.cpp356 /* Changed to ignore directory and only compare base name in main()
514 * For delta (extension-only) tables, copy values from the base file in readHeader()
563 /* return true if a base table was read, false for an extension table */
600 /* read the base table */ in readFile()
623 fprintf(stderr, "unexpected text after the base mapping table\n"); in readFile()
630 if(data->ucm->base->flagsType==UCM_FLAGS_MIXED || data->ucm->ext->flagsType==UCM_FLAGS_MIXED) { in readFile()
662 * Build a normal .cnv file with a base table in createConverter()
683 !ucm_checkBaseExt(states, data->ucm->base, data->ucm->ext, data->ucm->ext, false) in createConverter()
686 } else if(data->ucm->base->flagsType&UCM_FLAGS_EXPLICIT) { in createConverter()
688 ucm_sortTable(data->ucm->base); in createConverter()
[all...]
/third_party/lwip/src/netif/ppp/
H A Dutils.c138 int base, len, neg, quoted; in ppp_vslprintf() local
200 base = 0; in ppp_vslprintf()
213 base = 10; in ppp_vslprintf()
217 base = 10; in ppp_vslprintf()
233 base = 10; in ppp_vslprintf()
237 base = 10; in ppp_vslprintf()
241 base = 8; in ppp_vslprintf()
246 base = 16; in ppp_vslprintf()
251 base = 16; in ppp_vslprintf()
359 if (base ! in ppp_vslprintf()
[all...]
/third_party/mesa3d/src/imagination/vulkan/winsys/pvrsrvkm/
H A Dpvr_srv_job_render.c53 struct pvr_winsys_free_list base; member
61 container_of(free_list, struct pvr_srv_winsys_free_list, base)
64 struct pvr_winsys_rt_dataset base; member
73 container_of(rt_dataset, struct pvr_srv_winsys_rt_dataset, base)
76 struct pvr_winsys_render_ctx base; member
86 container_of(ctx, struct pvr_srv_winsys_render_ctx, base)
139 srv_free_list->base.ws = ws; in pvr_srv_winsys_free_list_create()
141 *free_list_out = &srv_free_list->base; in pvr_srv_winsys_free_list_create()
249 srv_rt_dataset->base.ws = ws; in pvr_srv_render_target_dataset_create()
251 *rt_dataset_out = &srv_rt_dataset->base; in pvr_srv_render_target_dataset_create()
[all...]
/third_party/python/Lib/distutils/
H A Dccompiler.py3 Contains CCompiler, an abstract base class that defines the interface
16 """Abstract base class to define the interface that must be implemented
43 # (UnixCCompiler, MSVCCompiler, etc.) -- or perhaps the base
483 base, ext = os.path.splitext(source)
852 base, ext = os.path.splitext(src_name)
853 base = os.path.splitdrive(base)[1] # Chop off the drive
854 base = base[os.path.isabs(base)
[all...]
/third_party/skia/third_party/externals/icu/source/tools/makeconv/
H A Dmakeconv.cpp356 /* Changed to ignore directory and only compare base name in main()
514 * For delta (extension-only) tables, copy values from the base file in readHeader()
563 /* return TRUE if a base table was read, FALSE for an extension table */
600 /* read the base table */ in readFile()
623 fprintf(stderr, "unexpected text after the base mapping table\n"); in readFile()
630 if(data->ucm->base->flagsType==UCM_FLAGS_MIXED || data->ucm->ext->flagsType==UCM_FLAGS_MIXED) { in readFile()
662 * Build a normal .cnv file with a base table in createConverter()
683 !ucm_checkBaseExt(states, data->ucm->base, data->ucm->ext, data->ucm->ext, FALSE) in createConverter()
686 } else if(data->ucm->base->flagsType&UCM_FLAGS_EXPLICIT) { in createConverter()
688 ucm_sortTable(data->ucm->base); in createConverter()
[all...]
/third_party/protobuf/src/google/protobuf/stubs/
H A Dstrutil.h353 int base);
355 int base);
357 inline int32 strto32(const char *nptr, char **endptr, int base) { in strto32() argument
359 return strtol(nptr, endptr, base); in strto32()
361 return strto32_adaptor(nptr, endptr, base); in strto32()
364 inline uint32 strtou32(const char *nptr, char **endptr, int base) { in strtou32() argument
366 return strtoul(nptr, endptr, base); in strtou32()
368 return strtou32_adaptor(nptr, endptr, base); in strtou32()
373 inline int64 strto64(const char *nptr, char **endptr, int base) { in strto64() argument
376 return strtoll(nptr, endptr, base); in strto64()
379 strtou64(const char *nptr, char **endptr, int base) strtou64() argument
[all...]
/kernel/linux/linux-5.10/drivers/firewire/
H A Dohci.c164 struct fw_iso_context base; member
2772 ctx->base.callback.sc(&ctx->base, ctx->last_timestamp, in flush_iso_completions()
2774 ctx->base.callback_data); in flush_iso_completions()
2782 if (ctx->header_length + ctx->base.header_size > PAGE_SIZE) { in copy_iso_headers()
2783 if (ctx->base.drop_overflow_headers) in copy_iso_headers()
2796 if (ctx->base.header_size > 0) in copy_iso_headers()
2798 if (ctx->base.header_size > 4) in copy_iso_headers()
2800 if (ctx->base.header_size > 8) in copy_iso_headers()
2801 memcpy(&ctx_hdr[2], &dma_hdr[2], ctx->base in copy_iso_headers()
3074 ohci_start_iso(struct fw_iso_context *base, s32 cycle, u32 sync, u32 tags) ohci_start_iso() argument
3124 ohci_stop_iso(struct fw_iso_context *base) ohci_stop_iso() argument
3149 ohci_free_iso_context(struct fw_iso_context *base) ohci_free_iso_context() argument
3186 ohci_set_iso_channels(struct fw_iso_context *base, u64 *channels) ohci_set_iso_channels() argument
3477 ohci_queue_iso(struct fw_iso_context *base, struct fw_iso_packet *packet, struct fw_iso_buffer *buffer, unsigned long payload) ohci_queue_iso() argument
3503 ohci_flush_queue_iso(struct fw_iso_context *base) ohci_flush_queue_iso() argument
3511 ohci_flush_iso_completions(struct fw_iso_context *base) ohci_flush_iso_completions() argument
[all...]
/kernel/linux/linux-6.6/drivers/firewire/
H A Dohci.c164 struct fw_iso_context base; member
2784 ctx->base.callback.sc(&ctx->base, ctx->last_timestamp, in flush_iso_completions()
2786 ctx->base.callback_data); in flush_iso_completions()
2794 if (ctx->header_length + ctx->base.header_size > PAGE_SIZE) { in copy_iso_headers()
2795 if (ctx->base.drop_overflow_headers) in copy_iso_headers()
2808 if (ctx->base.header_size > 0) in copy_iso_headers()
2810 if (ctx->base.header_size > 4) in copy_iso_headers()
2812 if (ctx->base.header_size > 8) in copy_iso_headers()
2813 memcpy(&ctx_hdr[2], &dma_hdr[2], ctx->base in copy_iso_headers()
3086 ohci_start_iso(struct fw_iso_context *base, s32 cycle, u32 sync, u32 tags) ohci_start_iso() argument
3136 ohci_stop_iso(struct fw_iso_context *base) ohci_stop_iso() argument
3161 ohci_free_iso_context(struct fw_iso_context *base) ohci_free_iso_context() argument
3198 ohci_set_iso_channels(struct fw_iso_context *base, u64 *channels) ohci_set_iso_channels() argument
3489 ohci_queue_iso(struct fw_iso_context *base, struct fw_iso_packet *packet, struct fw_iso_buffer *buffer, unsigned long payload) ohci_queue_iso() argument
3515 ohci_flush_queue_iso(struct fw_iso_context *base) ohci_flush_queue_iso() argument
3523 ohci_flush_iso_completions(struct fw_iso_context *base) ohci_flush_iso_completions() argument
[all...]
/third_party/glslang/glslang/MachineIndependent/
H A DParseHelper.cpp225 // use base class function to create/expand block in growGlobalUniformBlock()
257 // use base class function to create/expand block in growAtomicCounterBlock()
526 // Handle seeing a base[index] dereference in the grammar.
528 TIntermTyped* TParseContext::handleBracketDereference(const TSourceLoc& loc, TIntermTyped* base, TIntermTyped* index) in handleBracketDereference() argument
535 variableCheck(base); in handleBracketDereference()
537 if (! base->isArray() && ! base->isMatrix() && ! base->isVector() && ! base->getType().isCoopMat() && in handleBracketDereference()
538 ! base in handleBracketDereference()
674 handleIndexLimits(const TSourceLoc& , TIntermTyped* base, TIntermTyped* index) handleIndexLimits() argument
751 handleIoResizeArrayAccess(const TSourceLoc& , TIntermTyped* base) handleIoResizeArrayAccess() argument
938 handleDotDereference(const TSourceLoc& loc, TIntermTyped* base, const TString& field) handleDotDereference() argument
1049 handleDotSwizzle(const TSourceLoc& loc, TIntermTyped* base, const TString& field) handleDotSwizzle() argument
1100 blockMemberExtensionCheck(const TSourceLoc& loc, const TIntermTyped* base, int member, const TString& memberName) blockMemberExtensionCheck() argument
2584 const TIntermTyped* base = TIntermediate::traverseLValueBase(arg0, true, true); builtInOpCheck() local
4675 checkRuntimeSizable(const TSourceLoc& loc, const TIntermTyped& base) checkRuntimeSizable() argument
7675 vkRelaxedRemapDotDereference(const TSourceLoc&, TIntermTyped& base, const TType& member, const TString& identifier) vkRelaxedRemapDotDereference() argument
[all...]
/kernel/linux/linux-5.10/sound/soc/codecs/
H A Dwm_adsp.c852 return mem->base + (offset * 3); in wm_adsp_region_to_reg()
857 return mem->base + (offset * 2); in wm_adsp_region_to_reg()
870 return mem->base + (offset * 4); in wm_halo_region_to_reg()
873 return (mem->base + (offset * 3)) & ~0x3; in wm_halo_region_to_reg()
875 return mem->base + (offset * 5); in wm_halo_region_to_reg()
889 ret = regmap_read(dsp->regmap, dsp->base + offs[i], &offs[i]); in wm_adsp_read_fw_status()
945 adsp_err(dsp, "No base for region %x\n", in wm_coeff_base_reg()
950 *reg = dsp->ops->region_to_reg(mem, ctl->alg_region.base + ctl->offset); in wm_coeff_base_reg()
2119 ctl->alg_region.base = alg_region->base; in wm_adsp_ctl_fixup_base()
2189 wm_adsp_create_region(struct wm_adsp *dsp, int type, __be32 id, __be32 base) wm_adsp_create_region() argument
2250 wm_adsp_create_regions(struct wm_adsp *dsp, __be32 id, int nregions, int *type, __be32 *base) wm_adsp_create_regions() argument
[all...]
/kernel/linux/linux-6.6/drivers/pinctrl/stm32/
H A Dpinctrl-stm32.c88 void __iomem *base; member
204 writel_relaxed(BIT(offset), bank->base + STM32_GPIO_BSRR); in __stm32_gpio_set()
220 return pinctrl_gpio_request(chip->base + offset); in stm32_gpio_request()
225 pinctrl_gpio_free(chip->base + offset); in stm32_gpio_free()
232 return !!(readl_relaxed(bank->base + STM32_GPIO_IDR) & BIT(offset)); in stm32_gpio_get()
244 return pinctrl_gpio_direction_input(chip->base + offset); in stm32_gpio_direction_input()
253 pinctrl_gpio_direction_output(chip->base + offset); in stm32_gpio_direction_output()
304 sec = readl_relaxed(bank->base + STM32_GPIO_SECCFGR); in stm32_gpio_init_valid_mask()
789 val = readl_relaxed(bank->base + alt_offset); in stm32_pmx_set_mode()
792 writel_relaxed(val, bank->base in stm32_pmx_set_mode()
[all...]
/kernel/linux/linux-6.6/drivers/bus/mhi/host/
H A Dmain.c20 void __iomem *base, u32 offset, u32 *out) in mhi_read_reg()
22 return mhi_cntrl->read_reg(mhi_cntrl, base + offset, out); in mhi_read_reg()
26 void __iomem *base, u32 offset, in mhi_read_reg_field()
32 ret = mhi_read_reg(mhi_cntrl, base, offset, &tmp); in mhi_read_reg_field()
42 void __iomem *base, u32 offset, in mhi_poll_reg_field()
49 ret = mhi_read_reg_field(mhi_cntrl, base, offset, mask, &out); in mhi_poll_reg_field()
62 void mhi_write_reg(struct mhi_controller *mhi_cntrl, void __iomem *base, in mhi_write_reg() argument
65 mhi_cntrl->write_reg(mhi_cntrl, base + offset, val); in mhi_write_reg()
69 void __iomem *base, u32 offset, u32 mask, in mhi_write_reg_field()
75 ret = mhi_read_reg(mhi_cntrl, base, offse in mhi_write_reg_field()
19 mhi_read_reg(struct mhi_controller *mhi_cntrl, void __iomem *base, u32 offset, u32 *out) mhi_read_reg() argument
25 mhi_read_reg_field(struct mhi_controller *mhi_cntrl, void __iomem *base, u32 offset, u32 mask, u32 *out) mhi_read_reg_field() argument
41 mhi_poll_reg_field(struct mhi_controller *mhi_cntrl, void __iomem *base, u32 offset, u32 mask, u32 val, u32 delayus) mhi_poll_reg_field() argument
68 mhi_write_reg_field(struct mhi_controller *mhi_cntrl, void __iomem *base, u32 offset, u32 mask, u32 val) mhi_write_reg_field() argument
[all...]
/kernel/linux/linux-6.6/drivers/pinctrl/intel/
H A Dpinctrl-intel.c108 #define padgroup_offset(g, p) ((p) - (g)->base)
136 if (pin >= padgrp->base && pin < padgrp->base + padgrp->size) in intel_community_get_padgroup()
911 pin = pgrp->base + offset - pgrp->gpio_base; in intel_gpio_to_pin()
947 return pin - padgrp->base + padgrp->gpio_base; in intel_pin_to_gpio()
1029 return pinctrl_gpio_direction_input(chip->base + offset); in intel_gpio_direction_input()
1036 return pinctrl_gpio_direction_output(chip->base + offset); in intel_gpio_direction_output()
1267 void __iomem *base; in intel_gpio_irq_init() local
1271 base = community->regs; in intel_gpio_irq_init()
1275 writel(0, base in intel_gpio_irq_init()
1792 void __iomem *base; intel_pinctrl_suspend_noirq() local
1822 intel_restore_hostown(struct intel_pinctrl *pctrl, unsigned int c, void __iomem *base, unsigned int gpp, u32 saved) intel_restore_hostown() argument
1844 intel_restore_intmask(struct intel_pinctrl *pctrl, unsigned int c, void __iomem *base, unsigned int gpp, u32 saved) intel_restore_intmask() argument
1903 void __iomem *base; intel_pinctrl_resume_noirq() local
[all...]
/kernel/linux/linux-6.6/drivers/gpu/drm/i915/gem/selftests/
H A Di915_gem_mman.c96 const unsigned long npages = obj->base.size / PAGE_SIZE; in check_partial_mapping()
97 struct drm_i915_private *i915 = to_i915(obj->base.dev); in check_partial_mapping()
152 if (offset >= obj->base.size) in check_partial_mapping()
190 const unsigned long npages = obj->base.size / PAGE_SIZE; in check_partial_mappings()
191 struct drm_i915_private *i915 = to_i915(obj->base.dev); in check_partial_mappings()
248 if (offset >= obj->base.size) in check_partial_mappings()
344 nreal, obj->base.size / PAGE_SIZE, err); in igt_partial_tiling()
481 nreal, obj->base.size / PAGE_SIZE, err); in igt_smoke_tiling()
542 struct drm_i915_private *i915 = to_i915(obj->base.dev); in make_obj_busy()
797 memset_io(map, POISON_INUSE, obj->base in gtt_set()
[all...]
/kernel/linux/linux-6.6/lib/zstd/compress/
H A Dzstd_opt.c388 const BYTE* const base = ms->window.base; in ZSTD_insertAndFindFirstIndexHash3() local
390 U32 const target = (U32)(ip - base); in ZSTD_insertAndFindFirstIndexHash3()
395 hashTable3[ZSTD_hash3Ptr(base+idx, hashLog3)] = idx; in ZSTD_insertAndFindFirstIndexHash3()
426 const BYTE* const base = ms->window.base; in ZSTD_insertBt1() local
430 const BYTE* const prefixStart = base + dictLimit; in ZSTD_insertBt1()
432 const U32 curr = (U32)(ip-base); in ZSTD_insertBt1()
486 match = base + matchIndex; in ZSTD_insertBt1()
492 match = base in ZSTD_insertBt1()
535 const BYTE* const base = ms->window.base; ZSTD_updateTree_internal() local
568 const BYTE* const base = ms->window.base; ZSTD_insertBtAndGetAllMatches() local
1050 const BYTE* const base = ms->window.base; ZSTD_compressBlock_opt_generic() local
[all...]
/third_party/mesa3d/src/amd/vulkan/
H A Dradv_device_generated_commands.c47 for (unsigned i = 0; i < ARRAY_SIZE(pipeline->base.shaders); ++i) { in radv_get_sequence_size()
48 if (!pipeline->base.shaders[i]) in radv_get_sequence_size()
51 struct radv_userdata_locations *locs = &pipeline->base.shaders[i]->info.user_sgprs_locs; in radv_get_sequence_size()
63 align(pipeline->base.push_constant_size + 16 * pipeline->base.dynamic_offset_count, 16); in radv_get_sequence_size()
67 /* Index type write (normal reg write) + index buffer base write (64-bits, but special packet in radv_get_sequence_size()
86 if (pipeline->base.device->physical_device->rad_info.has_gfx9_scissor_bug) { in radv_get_sequence_size()
213 .base = offsetof(struct radv_dgc_params, field), .range = 4)
219 .base = (offsetof(struct radv_dgc_params, field) & ~3), .range = 4), \
226 .base
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