Home
last modified time | relevance | path

Searched refs:base (Results 3026 - 3050 of 18472) sorted by relevance

1...<<121122123124125126127128129130>>...739

/kernel/linux/linux-6.6/drivers/soundwire/
H A Dintel.h13 * @mmio_base: mmio base of SoundWire registers
14 * @registers: Link IO registers base
70 static inline int intel_readl(void __iomem *base, int offset) in intel_readl() argument
72 return readl(base + offset); in intel_readl()
75 static inline void intel_writel(void __iomem *base, int offset, int value) in intel_writel() argument
77 writel(value, base + offset); in intel_writel()
80 static inline u16 intel_readw(void __iomem *base, int offset) in intel_readw() argument
82 return readw(base + offset); in intel_readw()
85 static inline void intel_writew(void __iomem *base, int offset, u16 value) in intel_writew() argument
87 writew(value, base in intel_writew()
[all...]
/kernel/linux/linux-6.6/drivers/thermal/tegra/
H A Dtegra210-soctherm.c131 .base = 0xc0,
139 .base = 0xe0,
147 .base = 0x100,
155 .base = 0x120,
163 .base = 0x140,
171 .base = 0x160,
179 .base = 0x180,
187 .base = 0x1a0,
H A Dtegra132-soctherm.c130 .base = 0xc0,
138 .base = 0xe0,
146 .base = 0x100,
154 .base = 0x120,
162 .base = 0x140,
170 .base = 0x160,
178 .base = 0x180,
186 .base = 0x1a0,
H A Dtegra124-soctherm.c130 .base = 0xc0,
138 .base = 0xe0,
146 .base = 0x100,
154 .base = 0x120,
162 .base = 0x140,
170 .base = 0x160,
178 .base = 0x180,
186 .base = 0x1a0,
/kernel/linux/linux-6.6/drivers/base/
H A Dmap.c3 * linux/drivers/base/map.c
138 struct probe *base = kzalloc(sizeof(*base), GFP_KERNEL); in kobj_map_init() local
141 if ((p == NULL) || (base == NULL)) { in kobj_map_init()
143 kfree(base); in kobj_map_init()
147 base->dev = 1; in kobj_map_init()
148 base->range = ~0; in kobj_map_init()
149 base->get = base_probe; in kobj_map_init()
151 p->probes[i] = base; in kobj_map_init()
/kernel/linux/linux-6.6/drivers/clk/davinci/
H A Dpsc-da850.c73 static int da850_psc0_init(struct device *dev, void __iomem *base) in da850_psc0_init() argument
77 return davinci_psc_register_clocks(dev, da850_psc0_info, 16, base); in da850_psc0_init()
80 static int of_da850_psc0_init(struct device *dev, void __iomem *base) in of_da850_psc0_init() argument
82 return of_davinci_psc_clk_init(dev, da850_psc0_info, 16, base); in of_da850_psc0_init()
129 static int da850_psc1_init(struct device *dev, void __iomem *base) in da850_psc1_init() argument
131 return davinci_psc_register_clocks(dev, da850_psc1_info, 32, base); in da850_psc1_init()
134 static int of_da850_psc1_init(struct device *dev, void __iomem *base) in of_da850_psc1_init() argument
136 return of_davinci_psc_clk_init(dev, da850_psc1_info, 32, base); in of_da850_psc1_init()
/kernel/linux/linux-6.6/drivers/cpufreq/
H A Dkirkwood-cpufreq.c25 void __iomem *base; member
59 reg = readl_relaxed(priv.base); in kirkwood_cpufreq_target()
61 writel_relaxed(reg, priv.base); in kirkwood_cpufreq_target()
76 reg = readl_relaxed(priv.base); in kirkwood_cpufreq_target()
78 writel_relaxed(reg, priv.base); in kirkwood_cpufreq_target()
109 priv.base = devm_platform_ioremap_resource(pdev, 0); in kirkwood_cpufreq_probe()
110 if (IS_ERR(priv.base)) in kirkwood_cpufreq_probe()
111 return PTR_ERR(priv.base); in kirkwood_cpufreq_probe()
/kernel/linux/linux-6.6/drivers/net/mdio/
H A Dmdio-mux-bcm6368.c31 void __iomem *base; member
43 __raw_writel(0, md->base + MDIOC_REG); in bcm6368_mdiomux_read()
51 __raw_writel(reg, md->base + MDIOC_REG); in bcm6368_mdiomux_read()
53 ret = __raw_readw(md->base + MDIOD_REG); in bcm6368_mdiomux_read()
64 __raw_writel(0, md->base + MDIOC_REG); in bcm6368_mdiomux_write()
73 __raw_writel(reg, md->base + MDIOC_REG); in bcm6368_mdiomux_write()
109 md->base = devm_ioremap(&pdev->dev, res->start, resource_size(res)); in bcm6368_mdiomux_probe()
110 if (!md->base) { in bcm6368_mdiomux_probe()
/kernel/linux/linux-6.6/drivers/phy/broadcom/
H A Dphy-bcm-cygnus-pcie.c38 * @base: base register
44 void __iomem *base; member
73 val = readl(core->base + PCIE_CFG_OFFSET); in cygnus_pcie_power_config()
75 writel(val, core->base + PCIE_CFG_OFFSET); in cygnus_pcie_power_config()
82 val = readl(core->base + PCIE_CFG_OFFSET); in cygnus_pcie_power_config()
84 writel(val, core->base + PCIE_CFG_OFFSET); in cygnus_pcie_power_config()
133 core->base = devm_platform_ioremap_resource(pdev, 0); in cygnus_pcie_phy_probe()
134 if (IS_ERR(core->base)) in cygnus_pcie_phy_probe()
135 return PTR_ERR(core->base); in cygnus_pcie_phy_probe()
[all...]
H A Dphy-bcm-ns-usb2.c26 void __iomem *base; member
52 if (usb2->base) in bcm_ns_usb2_phy_init()
53 usb2ctl = readl(usb2->base); in bcm_ns_usb2_phy_init()
77 if (usb2->base) in bcm_ns_usb2_phy_init()
78 writel(usb2ctl, usb2->base); in bcm_ns_usb2_phy_init()
111 usb2->base = devm_platform_ioremap_resource(pdev, 0); in bcm_ns_usb2_probe()
112 if (IS_ERR(usb2->base)) { in bcm_ns_usb2_probe()
114 return PTR_ERR(usb2->base); in bcm_ns_usb2_probe()
/kernel/linux/linux-6.6/drivers/gpu/drm/imx/dcss/
H A Ddcss-kms.c46 struct drm_mode_config *config = &kms->base.mode_config; in dcss_kms_mode_config_init()
48 drm_mode_config_init(&kms->base); in dcss_kms_mode_config_init()
66 struct drm_device *ddev = &kms->base; in dcss_kms_bridge_connector_init()
85 ret = drm_encoder_init(&kms->base, encoder, in dcss_kms_bridge_connector_init()
117 struct dcss_kms_dev, base); in dcss_kms_attach()
121 drm = &kms->base; in dcss_kms_attach()
165 struct drm_device *drm = &kms->base; in dcss_kms_detach()
170 drm_crtc_vblank_off(&kms->crtc.base); in dcss_kms_detach()
/kernel/linux/linux-6.6/drivers/gpu/drm/i915/gem/
H A Di915_gem_ttm_pm.c32 * @base: The i915_gem_apply_to_region we derive from.
37 struct i915_gem_apply_to_region base; member
46 container_of(apply, typeof(*pm_apply), base); in i915_ttm_backup()
84 obj->base.size, 0, flags); in i915_ttm_backup()
160 .base = {.ops = &backup_ops}, in i915_ttm_backup_region()
165 return i915_gem_process_region(mr, &pm_apply.base); in i915_ttm_backup_region()
172 container_of(apply, typeof(*pm_apply), base); in i915_ttm_restore()
227 .base = {.ops = &restore_ops}, in i915_ttm_restore_region()
231 return i915_gem_process_region(mr, &pm_apply.base); in i915_ttm_restore_region()
/kernel/linux/linux-6.6/drivers/gpu/drm/vgem/
H A Dvgem_fence.c33 struct dma_fence base; member
48 static void vgem_fence_release(struct dma_fence *base) in vgem_fence_release() argument
50 struct vgem_fence *fence = container_of(base, typeof(*fence), base); in vgem_fence_release()
53 dma_fence_free(&fence->base); in vgem_fence_release()
81 dma_fence_signal(&fence->base); in vgem_fence_timeout()
94 dma_fence_init(&fence->base, &vgem_fence_ops, &fence->lock, in vgem_fence_create()
102 return &fence->base; in vgem_fence_create()
/kernel/linux/linux-6.6/drivers/iio/adc/
H A Dlpc18xx_adc.c43 void __iomem *base; member
75 writel(reg, adc->base + LPC18XX_ADC_CR); in lpc18xx_adc_read_chan()
77 ret = readl_poll_timeout(adc->base + LPC18XX_ADC_GDR, reg, in lpc18xx_adc_read_chan()
121 writel(0, adc->base + LPC18XX_ADC_CR); in lpc18xx_clear_cr_reg()
145 adc->base = devm_platform_ioremap_resource(pdev, 0); in lpc18xx_adc_probe()
146 if (IS_ERR(adc->base)) in lpc18xx_adc_probe()
147 return PTR_ERR(adc->base); in lpc18xx_adc_probe()
180 writel(adc->cr_reg, adc->base + LPC18XX_ADC_CR); in lpc18xx_adc_probe()
/kernel/linux/linux-6.6/drivers/scsi/arm/
H A Doak.c44 u8 __iomem *base = hostdata->io; in oakscsi_pwrite() local
51 while (((status = readw(base + STAT)) & 0x100)==0); in oakscsi_pwrite()
59 u8 __iomem *base = hostdata->io; in oakscsi_pread() local
69 while (((status = readw(base + STAT)) & 0x100)==0) in oakscsi_pread()
81 readsw(base + DATA, addr, 128); in oakscsi_pread()
87 b = (unsigned long) readw(base + DATA); in oakscsi_pread()
172 void __iomem *base = priv(host)->io; in oakscsi_remove() local
179 iounmap(base); in oakscsi_remove()
/third_party/icu/icu4j/main/classes/core/src/com/ibm/icu/util/
H A DAnnualTimeZoneRule.java193 public Date getNextStart(long base, int prevRawOffset, int prevDSTSavings, boolean inclusive) { in getNextStart() argument
194 int[] fields = Grego.timeToFields(base, null); in getNextStart()
200 if (d != null && (d.getTime() < base || (!inclusive && (d.getTime() == base)))) { in getNextStart()
211 public Date getPreviousStart(long base, int prevRawOffset, int prevDSTSavings, boolean inclusive) { in getPreviousStart() argument
212 int[] fields = Grego.timeToFields(base, null); in getPreviousStart()
218 if (d != null && (d.getTime() > base || (!inclusive && (d.getTime() == base)))) { in getPreviousStart()
/third_party/icu/ohos_icu4j/src/main/java/ohos/global/icu/util/
H A DAnnualTimeZoneRule.java180 public Date getNextStart(long base, int prevRawOffset, int prevDSTSavings, boolean inclusive) { in getNextStart() argument
181 int[] fields = Grego.timeToFields(base, null); in getNextStart()
187 if (d != null && (d.getTime() < base || (!inclusive && (d.getTime() == base)))) { in getNextStart()
197 public Date getPreviousStart(long base, int prevRawOffset, int prevDSTSavings, boolean inclusive) { in getPreviousStart() argument
198 int[] fields = Grego.timeToFields(base, null); in getPreviousStart()
204 if (d != null && (d.getTime() > base || (!inclusive && (d.getTime() == base)))) { in getPreviousStart()
/third_party/mesa3d/src/gallium/drivers/svga/
H A Dsvga_pipe_ts.c107 assert(tcs->base.parent == NULL); in svga_delete_tcs_state()
110 next_tcs = (struct svga_tcs_shader *)tcs->base.next; in svga_delete_tcs_state()
111 for (variant = tcs->base.variants; variant; variant = tmp) { in svga_delete_tcs_state()
123 FREE((void *)tcs->base.tokens); in svga_delete_tcs_state()
187 assert(tes->base.parent == NULL); in svga_delete_tes_state()
190 next_tes = (struct svga_tes_shader *)tes->base.next; in svga_delete_tes_state()
191 for (variant = tes->base.variants; variant; variant = tmp) { in svga_delete_tes_state()
203 FREE((void *)tes->base.tokens); in svga_delete_tes_state()
/third_party/node/deps/v8/src/execution/
H A Dstack-guard.h9 #include "src/base/atomicops.h"
162 base::AtomicWord jslimit_ = kIllegalLimit;
163 base::AtomicWord climit_ = kIllegalLimit;
166 return bit_cast<uintptr_t>(base::Relaxed_Load(&jslimit_)); in jslimit()
169 return base::Relaxed_Store(&jslimit_, in set_jslimit()
170 static_cast<base::AtomicWord>(limit)); in set_jslimit()
173 return bit_cast<uintptr_t>(base::Relaxed_Load(&climit_)); in climit()
176 return base::Relaxed_Store(&climit_, in set_climit()
177 static_cast<base::AtomicWord>(limit)); in set_climit()
/kernel/linux/linux-5.10/drivers/fpga/
H A Ddfl-fme-perf.c137 * @ioaddr: mapped base address of mmio region.
299 void __iomem *base = priv->ioaddr; in basic_read_event_counter() local
301 return fme_read_perf_cntr_reg(base + CLK_CNTR); in basic_read_event_counter()
316 void __iomem *base = priv->ioaddr; in cache_read_event_counter() local
328 v = readq(base + CACHE_CTRL); in cache_read_event_counter()
332 writeq(v, base + CACHE_CTRL); in cache_read_event_counter()
334 if (readq_poll_timeout_atomic(base + CACHE_CNTR0, v, in cache_read_event_counter()
341 v = fme_read_perf_cntr_reg(base + CACHE_CNTR0); in cache_read_event_counter()
343 v = fme_read_perf_cntr_reg(base + CACHE_CNTR1); in cache_read_event_counter()
365 void __iomem *base in fabric_event_init() local
425 void __iomem *base = priv->ioaddr; fabric_read_event_counter() local
456 void __iomem *base = priv->ioaddr; vtd_read_event_counter() local
489 void __iomem *base = priv->ioaddr; vtd_sip_read_event_counter() local
892 void __iomem *base = priv->ioaddr; fme_perf_setup_hardware() local
[all...]
/kernel/linux/linux-5.10/drivers/pci/controller/
H A Dpci-mvebu.c80 phys_addr_t base; member
88 void __iomem *base; member
110 writel(val, port->base + reg); in mvebu_writel()
115 return readl(port->base + reg); in mvebu_readl()
185 mvebu_writel(port, cs->base & 0xffff0000, in mvebu_pcie_setup_wins()
202 mvebu_writel(port, dram->cs[0].base, PCIE_BAR_LO_OFF(1)); in mvebu_pcie_setup_wins()
238 void __iomem *conf_data = port->base + PCIE_CONF_DATA_OFF; in mvebu_pcie_hw_rd_conf()
262 void __iomem *conf_data = port->base + PCIE_CONF_DATA_OFF; in mvebu_pcie_hw_wr_conf()
289 phys_addr_t base, size_t size) in mvebu_pcie_del_windows()
294 mvebu_mbus_del_window(base, s in mvebu_pcie_del_windows()
288 mvebu_pcie_del_windows(struct mvebu_pcie_port *port, phys_addr_t base, size_t size) mvebu_pcie_del_windows() argument
306 mvebu_pcie_add_windows(struct mvebu_pcie_port *port, unsigned int target, unsigned int attribute, phys_addr_t base, size_t size, phys_addr_t remap) mvebu_pcie_add_windows() argument
[all...]
/kernel/linux/linux-6.6/drivers/fpga/
H A Ddfl-fme-perf.c137 * @ioaddr: mapped base address of mmio region.
299 void __iomem *base = priv->ioaddr; in basic_read_event_counter() local
301 return fme_read_perf_cntr_reg(base + CLK_CNTR); in basic_read_event_counter()
316 void __iomem *base = priv->ioaddr; in cache_read_event_counter() local
328 v = readq(base + CACHE_CTRL); in cache_read_event_counter()
332 writeq(v, base + CACHE_CTRL); in cache_read_event_counter()
334 if (readq_poll_timeout_atomic(base + CACHE_CNTR0, v, in cache_read_event_counter()
341 v = fme_read_perf_cntr_reg(base + CACHE_CNTR0); in cache_read_event_counter()
343 v = fme_read_perf_cntr_reg(base + CACHE_CNTR1); in cache_read_event_counter()
365 void __iomem *base in fabric_event_init() local
425 void __iomem *base = priv->ioaddr; fabric_read_event_counter() local
456 void __iomem *base = priv->ioaddr; vtd_read_event_counter() local
489 void __iomem *base = priv->ioaddr; vtd_sip_read_event_counter() local
892 void __iomem *base = priv->ioaddr; fme_perf_setup_hardware() local
[all...]
/kernel/linux/linux-6.6/drivers/gpu/drm/i915/display/
H A Dintel_dsi_vbt.c58 /* base offsets for gpio pads */
155 struct drm_i915_private *dev_priv = to_i915(intel_dsi->base.base.dev); in mipi_exec_send_packet()
235 struct drm_i915_private *i915 = to_i915(intel_dsi->base.base.dev); in mipi_exec_delay()
249 struct drm_i915_private *dev_priv = to_i915(connector->base.dev); in vlv_exec_gpio()
297 struct drm_i915_private *dev_priv = to_i915(connector->base.dev); in chv_exec_gpio()
351 struct drm_i915_private *dev_priv = to_i915(connector->base.dev); in bxt_exec_gpio()
378 struct drm_i915_private *dev_priv = to_i915(connector->base.dev); in icl_exec_gpio()
464 struct drm_device *dev = intel_dsi->base in mipi_exec_gpio()
[all...]
H A Dintel_lvds.c72 struct intel_encoder base; member
86 return container_of(encoder, struct intel_lvds_encoder, base); in to_lvds_encoder()
108 struct drm_i915_private *i915 = to_i915(encoder->base.dev); in intel_lvds_get_hw_state()
127 struct drm_i915_private *dev_priv = to_i915(encoder->base.dev); in intel_lvds_get_config()
239 struct drm_i915_private *i915 = to_i915(encoder->base.dev); in intel_pre_enable_lvds()
320 struct drm_i915_private *dev_priv = to_i915(encoder->base.dev); in intel_enable_lvds()
340 struct drm_i915_private *dev_priv = to_i915(encoder->base.dev); in intel_disable_lvds()
380 struct drm_i915_private *dev_priv = to_i915(encoder->base.dev); in intel_lvds_shutdown()
392 struct drm_i915_private *i915 = to_i915(connector->base.dev); in intel_lvds_mode_valid()
395 int max_pixclk = to_i915(connector->base in intel_lvds_mode_valid()
[all...]
/third_party/ffmpeg/libavfilter/
H A Dvf_premultiply.c479 AVFrame *base = td->m; in premultiply_slice() local
489 base->data[p] + slice_start * base->linesize[p], in premultiply_slice()
490 base->linesize[p], in premultiply_slice()
495 s->premultiply[p](base->data[p] + slice_start * base->linesize[p], in premultiply_slice()
499 base->linesize[p], s->inplace ? alpha->linesize[3] : alpha->linesize[0], in premultiply_slice()
509 AVFrame **out, AVFrame *base, AVFrame *alpha) in filter_frame()
515 *out = av_frame_clone(base); in filter_frame()
525 av_frame_copy_props(*out, base); in filter_frame()
508 filter_frame(AVFilterContext *ctx, AVFrame **out, AVFrame *base, AVFrame *alpha) filter_frame() argument
651 AVFrame *out = NULL, *base, *alpha; process_frame() local
697 AVFilterLink *base = ctx->inputs[0]; config_output() local
[all...]

Completed in 18 milliseconds

1...<<121122123124125126127128129130>>...739