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Searched defs:src2 (Results 251 - 275 of 277) sorted by relevance

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/third_party/node/deps/v8/src/execution/s390/
H A Dsimulator-s390.cc3288 VectorBinaryOp(Simulator* sim, int dst, int src1, int src2, Operation op) VectorBinaryOp() argument
3434 VectorSum(Simulator* sim, int dst, int src1, int src2) VectorSum() argument
3528 VectorPack(Simulator* sim, int dst, int src1, int src2, bool saturate, const D& max = 0, const D& min = 0) VectorPack() argument
4190 int64_t src2 = get_simd_register_by_lane<int64_t>(r1, 1); EVALUATE() local
4401 FP_Type src2 = sim->get_fpr<FP_Type>(rhs); FPMinMaxForEachLane() local
4407 FP_Type src2 = sim->get_simd_register_by_lane<FP_Type>(rhs, i); FPMinMaxForEachLane() local
4446 VectorFPCompare(Simulator* sim, int dst, int src1, int src2, int m6, Operation op) VectorFPCompare() argument
[all...]
/third_party/node/deps/v8/src/execution/riscv64/
H A Dsimulator-riscv64.cc3493 static inline bool is_invalid_fmul(T src1, T src2) { in is_invalid_fmul() argument
3499 static inline bool is_invalid_fadd(T src1, T src2) { in is_invalid_fadd() argument
3505 static inline bool is_invalid_fsub(T src1, T src2) { in is_invalid_fsub() argument
3511 static inline bool is_invalid_fdiv(T src1, T src2) { in is_invalid_fdiv() argument
[all...]
H A Dsimulator-riscv64.h755 inline T CanonicalizeFPUOpFMA(Func fn, T dst, T src1, T src2) { in CanonicalizeFPUOpFMA() argument
773 T src2 = std::is_same<float, T>::value ? frs2() : drs2(); in CanonicalizeFPUOp3() local
791 T src2 = std::is_same<float, T>::value ? frs2() : drs2(); in CanonicalizeFPUOp2() local
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/third_party/node/deps/v8/src/wasm/baseline/ia32/
H A Dliftoff-assembler-ia32.h1863 Register src2 = src.high_gp() == dst.low_gp() ? src.low_gp() : src.high_gp(); in emit_i64_popcnt() local
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/third_party/node/deps/v8/src/wasm/baseline/arm/
H A Dliftoff-assembler-arm.h1854 Register src2 = src.high_gp() == dst.low_gp() ? src.low_gp() : src.high_gp(); in emit_i64_popcnt() local
2475 emit_f64x2_replace_lane(LiftoffRegister dst, LiftoffRegister src1, LiftoffRegister src2, uint8_t imm_lane_idx) emit_f64x2_replace_lane() argument
2659 emit_f32x4_replace_lane(LiftoffRegister dst, LiftoffRegister src1, LiftoffRegister src2, uint8_t imm_lane_idx) emit_f32x4_replace_lane() argument
2845 emit_i64x2_replace_lane(LiftoffRegister dst, LiftoffRegister src1, LiftoffRegister src2, uint8_t imm_lane_idx) emit_i64x2_replace_lane() argument
2964 emit_i64x2_extmul_low_i32x4_s(LiftoffRegister dst, LiftoffRegister src1, LiftoffRegister src2) emit_i64x2_extmul_low_i32x4_s() argument
2971 emit_i64x2_extmul_low_i32x4_u(LiftoffRegister dst, LiftoffRegister src1, LiftoffRegister src2) emit_i64x2_extmul_low_i32x4_u() argument
2978 emit_i64x2_extmul_high_i32x4_s(LiftoffRegister dst, LiftoffRegister src1, LiftoffRegister src2) emit_i64x2_extmul_high_i32x4_s() argument
2985 emit_i64x2_extmul_high_i32x4_u(LiftoffRegister dst, LiftoffRegister src1, LiftoffRegister src2) emit_i64x2_extmul_high_i32x4_u() argument
3029 emit_i32x4_replace_lane(LiftoffRegister dst, LiftoffRegister src1, LiftoffRegister src2, uint8_t imm_lane_idx) emit_i32x4_replace_lane() argument
[all...]
/third_party/node/deps/v8/src/wasm/baseline/arm64/
H A Dliftoff-assembler-arm64.h1789 emit_f64x2_replace_lane(LiftoffRegister dst, LiftoffRegister src1, LiftoffRegister src2, uint8_t imm_lane_idx) emit_f64x2_replace_lane() argument
1930 emit_f32x4_replace_lane(LiftoffRegister dst, LiftoffRegister src1, LiftoffRegister src2, uint8_t imm_lane_idx) emit_f32x4_replace_lane() argument
2054 emit_i64x2_replace_lane(LiftoffRegister dst, LiftoffRegister src1, LiftoffRegister src2, uint8_t imm_lane_idx) emit_i64x2_replace_lane() argument
2145 emit_i64x2_extmul_low_i32x4_s(LiftoffRegister dst, LiftoffRegister src1, LiftoffRegister src2) emit_i64x2_extmul_low_i32x4_s() argument
2151 emit_i64x2_extmul_low_i32x4_u(LiftoffRegister dst, LiftoffRegister src1, LiftoffRegister src2) emit_i64x2_extmul_low_i32x4_u() argument
2157 emit_i64x2_extmul_high_i32x4_s(LiftoffRegister dst, LiftoffRegister src1, LiftoffRegister src2) emit_i64x2_extmul_high_i32x4_s() argument
2163 emit_i64x2_extmul_high_i32x4_u(LiftoffRegister dst, LiftoffRegister src1, LiftoffRegister src2) emit_i64x2_extmul_high_i32x4_u() argument
2205 emit_i32x4_replace_lane(LiftoffRegister dst, LiftoffRegister src1, LiftoffRegister src2, uint8_t imm_lane_idx) emit_i32x4_replace_lane() argument
2340 emit_i32x4_extmul_low_i16x8_s(LiftoffRegister dst, LiftoffRegister src1, LiftoffRegister src2) emit_i32x4_extmul_low_i16x8_s() argument
2346 emit_i32x4_extmul_low_i16x8_u(LiftoffRegister dst, LiftoffRegister src1, LiftoffRegister src2) emit_i32x4_extmul_low_i16x8_u() argument
2352 emit_i32x4_extmul_high_i16x8_s(LiftoffRegister dst, LiftoffRegister src1, LiftoffRegister src2) emit_i32x4_extmul_high_i16x8_s() argument
2358 emit_i32x4_extmul_high_i16x8_u(LiftoffRegister dst, LiftoffRegister src1, LiftoffRegister src2) emit_i32x4_extmul_high_i16x8_u() argument
2381 emit_i16x8_replace_lane(LiftoffRegister dst, LiftoffRegister src1, LiftoffRegister src2, uint8_t imm_lane_idx) emit_i16x8_replace_lane() argument
2525 VRegister src2 = rhs.fp(); emit_i8x16_shuffle() local
2582 emit_i8x16_replace_lane(LiftoffRegister dst, LiftoffRegister src1, LiftoffRegister src2, uint8_t imm_lane_idx) emit_i8x16_replace_lane() argument
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/third_party/mesa3d/src/gallium/auxiliary/tgsi/
H A Dtgsi_exec.c129 micro_cmp(union tgsi_exec_channel *dst, const union tgsi_exec_channel *src0, const union tgsi_exec_channel *src1, const union tgsi_exec_channel *src2) micro_cmp() argument
510 micro_lrp(union tgsi_exec_channel *dst, const union tgsi_exec_channel *src0, const union tgsi_exec_channel *src1, const union tgsi_exec_channel *src2) micro_lrp() argument
522 micro_mad(union tgsi_exec_channel *dst, const union tgsi_exec_channel *src0, const union tgsi_exec_channel *src1, const union tgsi_exec_channel *src2) micro_mad() argument
1298 micro_lt( union tgsi_exec_channel *dst, const union tgsi_exec_channel *src0, const union tgsi_exec_channel *src1, const union tgsi_exec_channel *src2, const union tgsi_exec_channel *src3 ) micro_lt() argument
3135 micro_ucmp(union tgsi_exec_channel *dst, const union tgsi_exec_channel *src0, const union tgsi_exec_channel *src1, const union tgsi_exec_channel *src2) micro_ucmp() argument
4530 micro_umad(union tgsi_exec_channel *dst, const union tgsi_exec_channel *src0, const union tgsi_exec_channel *src1, const union tgsi_exec_channel *src2) micro_umad() argument
4685 micro_ibfe(union tgsi_exec_channel *dst, const union tgsi_exec_channel *src0, const union tgsi_exec_channel *src1, const union tgsi_exec_channel *src2) micro_ibfe() argument
4712 micro_ubfe(union tgsi_exec_channel *dst, const union tgsi_exec_channel *src0, const union tgsi_exec_channel *src1, const union tgsi_exec_channel *src2) micro_ubfe() argument
4739 micro_bfi(union tgsi_exec_channel *dst, const union tgsi_exec_channel *src0, const union tgsi_exec_channel *src1, const union tgsi_exec_channel *src2, const union tgsi_exec_channel *src3) micro_bfi() argument
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/third_party/mesa3d/src/gallium/auxiliary/nir/
H A Dnir_to_tgsi.c133 ntt_insn(struct ntt_compile *c, enum tgsi_opcode opcode, struct ureg_dst dst, struct ureg_src src0, struct ureg_src src1, struct ureg_src src2, struct ureg_src src3) ntt_insn() argument
/third_party/pcre2/pcre2/src/sljit/
H A DsljitNativeMIPS_common.c1462 emit_single_op(struct sljit_compiler *compiler, sljit_s32 op, sljit_s32 flags, sljit_s32 dst, sljit_s32 src1, sljit_sw src2) emit_single_op() argument
2018 emit_op(struct sljit_compiler *compiler, sljit_s32 op, sljit_s32 flags, sljit_s32 dst, sljit_sw dstw, sljit_s32 src1, sljit_sw src1w, sljit_s32 src2, sljit_sw src2w) emit_op() argument
2313 sljit_emit_op2(struct sljit_compiler *compiler, sljit_s32 op, sljit_s32 dst, sljit_sw dstw, sljit_s32 src1, sljit_sw src1w, sljit_s32 src2, sljit_sw src2w) sljit_emit_op2() argument
2382 sljit_emit_op2u(struct sljit_compiler *compiler, sljit_s32 op, sljit_s32 src1, sljit_sw src1w, sljit_s32 src2, sljit_sw src2w) sljit_emit_op2u() argument
2401 sljit_emit_shift_into(struct sljit_compiler *compiler, sljit_s32 op, sljit_s32 src_dst, sljit_s32 src1, sljit_sw src1w, sljit_s32 src2, sljit_sw src2w) sljit_emit_shift_into() argument
2626 sljit_emit_fop1_cmp(struct sljit_compiler *compiler, sljit_s32 op, sljit_s32 src1, sljit_sw src1w, sljit_s32 src2, sljit_sw src2w) sljit_emit_fop1_cmp() argument
2731 sljit_emit_fop2(struct sljit_compiler *compiler, sljit_s32 op, sljit_s32 dst, sljit_sw dstw, sljit_s32 src1, sljit_sw src1w, sljit_s32 src2, sljit_sw src2w) sljit_emit_fop2() argument
3006 sljit_emit_cmp(struct sljit_compiler *compiler, sljit_s32 type, sljit_s32 src1, sljit_sw src1w, sljit_s32 src2, sljit_sw src2w) sljit_emit_cmp() argument
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/third_party/skia/third_party/externals/libwebp/src/dsp/
H A Denc_sse2.c301 const __m128i src2 = _mm_loadl_epi64((const __m128i*)&src[2 * BPS]); in FTransform_SSE2() local
346 const __m128i src2 = _mm_loadl_epi64((const __m128i*)&src[2 * BPS]); in FTransform2_SSE2() local
392 const __m128i src2 = _mm_loadl_epi64((__m128i*)&in[2 * 16]); in FTransformWHTRow_SSE2() local
/third_party/mesa3d/src/amd/llvm/
H A Dac_nir_to_llvm.c223 emit_intrin_3f_param(struct ac_llvm_context *ctx, const char *intrin, LLVMTypeRef result_type, LLVMValueRef src0, LLVMValueRef src1, LLVMValueRef src2) emit_intrin_3f_param() argument
240 emit_bcsel(struct ac_llvm_context *ctx, LLVMValueRef src0, LLVMValueRef src1, LLVMValueRef src2) emit_bcsel() argument
/third_party/node/deps/v8/src/wasm/baseline/mips/
H A Dliftoff-assembler-mips.h1229 Register src2 = src.high_gp() == dst.low_gp() ? src.low_gp() : src.high_gp(); in emit_i64_popcnt() local
1896 emit_i16x8_q15mulr_sat_s(LiftoffRegister dst, LiftoffRegister src1, LiftoffRegister src2) emit_i16x8_q15mulr_sat_s() argument
2077 emit_s128_select(LiftoffRegister dst, LiftoffRegister src1, LiftoffRegister src2, LiftoffRegister mask) emit_s128_select() argument
2852 emit_i8x16_replace_lane(LiftoffRegister dst, LiftoffRegister src1, LiftoffRegister src2, uint8_t imm_lane_idx) emit_i8x16_replace_lane() argument
2859 emit_i16x8_replace_lane(LiftoffRegister dst, LiftoffRegister src1, LiftoffRegister src2, uint8_t imm_lane_idx) emit_i16x8_replace_lane() argument
2866 emit_i32x4_replace_lane(LiftoffRegister dst, LiftoffRegister src1, LiftoffRegister src2, uint8_t imm_lane_idx) emit_i32x4_replace_lane() argument
2873 emit_i64x2_replace_lane(LiftoffRegister dst, LiftoffRegister src1, LiftoffRegister src2, uint8_t imm_lane_idx) emit_i64x2_replace_lane() argument
2880 emit_f32x4_replace_lane(LiftoffRegister dst, LiftoffRegister src1, LiftoffRegister src2, uint8_t imm_lane_idx) emit_f32x4_replace_lane() argument
2887 emit_f64x2_replace_lane(LiftoffRegister dst, LiftoffRegister src1, LiftoffRegister src2, uint8_t imm_lane_idx) emit_f64x2_replace_lane() argument
[all...]
/third_party/node/deps/v8/src/wasm/baseline/loong64/
H A Dliftoff-assembler-loong64.h1881 emit_i16x8_q15mulr_sat_s(LiftoffRegister dst, LiftoffRegister src1, LiftoffRegister src2) emit_i16x8_q15mulr_sat_s() argument
2062 emit_s128_select(LiftoffRegister dst, LiftoffRegister src1, LiftoffRegister src2, LiftoffRegister mask) emit_s128_select() argument
2825 emit_i8x16_replace_lane(LiftoffRegister dst, LiftoffRegister src1, LiftoffRegister src2, uint8_t imm_lane_idx) emit_i8x16_replace_lane() argument
2832 emit_i16x8_replace_lane(LiftoffRegister dst, LiftoffRegister src1, LiftoffRegister src2, uint8_t imm_lane_idx) emit_i16x8_replace_lane() argument
2839 emit_i32x4_replace_lane(LiftoffRegister dst, LiftoffRegister src1, LiftoffRegister src2, uint8_t imm_lane_idx) emit_i32x4_replace_lane() argument
2846 emit_i64x2_replace_lane(LiftoffRegister dst, LiftoffRegister src1, LiftoffRegister src2, uint8_t imm_lane_idx) emit_i64x2_replace_lane() argument
2853 emit_f32x4_replace_lane(LiftoffRegister dst, LiftoffRegister src1, LiftoffRegister src2, uint8_t imm_lane_idx) emit_f32x4_replace_lane() argument
2860 emit_f64x2_replace_lane(LiftoffRegister dst, LiftoffRegister src1, LiftoffRegister src2, uint8_t imm_lane_idx) emit_f64x2_replace_lane() argument
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/third_party/node/deps/v8/src/codegen/s390/
H A Dmacro-assembler-s390.cc2511 void TurboAssembler::MulHighS32(Register dst, Register src1, Register src2) { in CallRecordWriteStub() argument
2278 MovToFloatParameters(DoubleRegister src1, DoubleRegister src2) CallRecordWriteStub() argument
2506 MulHighS32(Register dst, Register src1, const MemOperand& src2) CallRecordWriteStub() argument
2518 MulHighS32(Register dst, Register src1, const Operand& src2) CallRecordWriteStub() argument
2532 MulHighU32(Register dst, Register src1, const MemOperand& src2) CallRecordWriteStub() argument
2537 MulHighU32(Register dst, Register src1, Register src2) CallRecordWriteStub() argument
2541 MulHighU32(Register dst, Register src1, const Operand& src2) CallRecordWriteStub() argument
2558 Mul32WithOverflowIfCCUnequal(Register dst, Register src1, const MemOperand& src2) CallRecordWriteStub() argument
2566 Mul32WithOverflowIfCCUnequal(Register dst, Register src1, Register src2) CallRecordWriteStub() argument
2574 Mul32WithOverflowIfCCUnequal(Register dst, Register src1, const Operand& src2) CallRecordWriteStub() argument
2588 DivS32(Register dst, Register src1, const MemOperand& src2) CallRecordWriteStub() argument
2593 DivS32(Register dst, Register src1, Register src2) CallRecordWriteStub() argument
2607 DivU32(Register dst, Register src1, const MemOperand& src2) CallRecordWriteStub() argument
2612 DivU32(Register dst, Register src1, Register src2) CallRecordWriteStub() argument
2625 DivS64(Register dst, Register src1, const MemOperand& src2) CallRecordWriteStub() argument
2630 DivS64(Register dst, Register src1, Register src2) CallRecordWriteStub() argument
2644 DivU64(Register dst, Register src1, const MemOperand& src2) CallRecordWriteStub() argument
2649 DivU64(Register dst, Register src1, Register src2) CallRecordWriteStub() argument
2662 ModS32(Register dst, Register src1, const MemOperand& src2) CallRecordWriteStub() argument
2667 ModS32(Register dst, Register src1, Register src2) CallRecordWriteStub() argument
2681 ModU32(Register dst, Register src1, const MemOperand& src2) CallRecordWriteStub() argument
2686 ModU32(Register dst, Register src1, Register src2) CallRecordWriteStub() argument
2699 ModS64(Register dst, Register src1, const MemOperand& src2) CallRecordWriteStub() argument
2704 ModS64(Register dst, Register src1, Register src2) CallRecordWriteStub() argument
2718 ModU64(Register dst, Register src1, const MemOperand& src2) CallRecordWriteStub() argument
2723 ModU64(Register dst, Register src1, Register src2) CallRecordWriteStub() argument
2809 AddS32(Register dst, Register src1, Register src2) CallRecordWriteStub() argument
2826 AddS64(Register dst, Register src1, Register src2) CallRecordWriteStub() argument
2878 AddU32(Register dst, Register src1, Register src2) CallRecordWriteStub() argument
2903 AddU64(Register dst, Register src1, Register src2) CallRecordWriteStub() argument
2942 SubU32(Register dst, Register src1, Register src2) CallRecordWriteStub() argument
2993 SubS32(Register dst, Register src1, Register src2) CallRecordWriteStub() argument
3013 SubS64(Register dst, Register src1, Register src2) CallRecordWriteStub() argument
3107 And(Register dst, Register src1, Register src2) CallRecordWriteStub() argument
3124 AndP(Register dst, Register src1, Register src2) CallRecordWriteStub() argument
3230 Or(Register dst, Register src1, Register src2) CallRecordWriteStub() argument
3247 OrP(Register dst, Register src1, Register src2) CallRecordWriteStub() argument
3318 Xor(Register dst, Register src1, Register src2) CallRecordWriteStub() argument
3335 XorP(Register dst, Register src1, Register src2) CallRecordWriteStub() argument
3433 CmpS32(Register src1, Register src2) CallRecordWriteStub() argument
3436 CmpS64(Register src1, Register src2) CallRecordWriteStub() argument
3656 StoreMultipleP(Register src1, Register src2, const MemOperand& mem) CallRecordWriteStub() argument
3681 StoreMultipleW(Register src1, Register src2, const MemOperand& mem) CallRecordWriteStub() argument
5185 F64x2ReplaceLane(Simd128Register dst, Simd128Register src1, DoubleRegister src2, uint8_t imm_lane_idx, Register scratch) CallRecordWriteStub() argument
5195 F32x4ReplaceLane(Simd128Register dst, Simd128Register src1, DoubleRegister src2, uint8_t imm_lane_idx, Register scratch) CallRecordWriteStub() argument
5205 I64x2ReplaceLane(Simd128Register dst, Simd128Register src1, Register src2, uint8_t imm_lane_idx, Register) CallRecordWriteStub() argument
5214 I32x4ReplaceLane(Simd128Register dst, Simd128Register src1, Register src2, uint8_t imm_lane_idx, Register) CallRecordWriteStub() argument
5223 I16x8ReplaceLane(Simd128Register dst, Simd128Register src1, Register src2, uint8_t imm_lane_idx, Register) CallRecordWriteStub() argument
5232 I8x16ReplaceLane(Simd128Register dst, Simd128Register src1, Register src2, uint8_t imm_lane_idx, Register) CallRecordWriteStub() argument
5253 S128Select(Simd128Register dst, Simd128Register src1, Simd128Register src2, Simd128Register mask) CallRecordWriteStub() argument
5475 I64x2Mul(Simd128Register dst, Simd128Register src1, Simd128Register src2, Register scratch1, Register scratch2, Register scratch3) CallRecordWriteStub() argument
5490 F64x2Ne(Simd128Register dst, Simd128Register src1, Simd128Register src2) CallRecordWriteStub() argument
5496 F64x2Lt(Simd128Register dst, Simd128Register src1, Simd128Register src2) CallRecordWriteStub() argument
5501 F64x2Le(Simd128Register dst, Simd128Register src1, Simd128Register src2) CallRecordWriteStub() argument
5506 F32x4Ne(Simd128Register dst, Simd128Register src1, Simd128Register src2) CallRecordWriteStub() argument
5512 F32x4Lt(Simd128Register dst, Simd128Register src1, Simd128Register src2) CallRecordWriteStub() argument
5517 F32x4Le(Simd128Register dst, Simd128Register src1, Simd128Register src2) CallRecordWriteStub() argument
5522 I64x2Ne(Simd128Register dst, Simd128Register src1, Simd128Register src2) CallRecordWriteStub() argument
5528 I64x2GeS(Simd128Register dst, Simd128Register src1, Simd128Register src2) CallRecordWriteStub() argument
5535 I32x4Ne(Simd128Register dst, Simd128Register src1, Simd128Register src2) CallRecordWriteStub() argument
5541 I32x4GeS(Simd128Register dst, Simd128Register src1, Simd128Register src2) CallRecordWriteStub() argument
5548 I32x4GeU(Simd128Register dst, Simd128Register src1, Simd128Register src2, Simd128Register scratch) CallRecordWriteStub() argument
5555 I16x8Ne(Simd128Register dst, Simd128Register src1, Simd128Register src2) CallRecordWriteStub() argument
5561 I16x8GeS(Simd128Register dst, Simd128Register src1, Simd128Register src2) CallRecordWriteStub() argument
5568 I16x8GeU(Simd128Register dst, Simd128Register src1, Simd128Register src2, Simd128Register scratch) CallRecordWriteStub() argument
5575 I8x16Ne(Simd128Register dst, Simd128Register src1, Simd128Register src2) CallRecordWriteStub() argument
5581 I8x16GeS(Simd128Register dst, Simd128Register src1, Simd128Register src2) CallRecordWriteStub() argument
5588 I8x16GeU(Simd128Register dst, Simd128Register src1, Simd128Register src2, Simd128Register scratch) CallRecordWriteStub() argument
5715 I16x8SConvertI32x4(Simd128Register dst, Simd128Register src1, Simd128Register src2) CallRecordWriteStub() argument
5721 I8x16SConvertI16x8(Simd128Register dst, Simd128Register src1, Simd128Register src2) CallRecordWriteStub() argument
5733 I16x8UConvertI32x4(Simd128Register dst, Simd128Register src1, Simd128Register src2, Simd128Register scratch) CallRecordWriteStub() argument
5742 I8x16UConvertI16x8(Simd128Register dst, Simd128Register src1, Simd128Register src2, Simd128Register scratch) CallRecordWriteStub() argument
5764 I16x8AddSatS(Simd128Register dst, Simd128Register src1, Simd128Register src2, Simd128Register scratch1, Simd128Register scratch2) CallRecordWriteStub() argument
5772 I16x8SubSatS(Simd128Register dst, Simd128Register src1, Simd128Register src2, Simd128Register scratch1, Simd128Register scratch2) CallRecordWriteStub() argument
5780 I16x8AddSatU(Simd128Register dst, Simd128Register src1, Simd128Register src2, Simd128Register scratch1, Simd128Register scratch2) CallRecordWriteStub() argument
5788 I16x8SubSatU(Simd128Register dst, Simd128Register src1, Simd128Register src2, Simd128Register scratch1, Simd128Register scratch2) CallRecordWriteStub() argument
5802 I8x16AddSatS(Simd128Register dst, Simd128Register src1, Simd128Register src2, Simd128Register scratch1, Simd128Register scratch2) CallRecordWriteStub() argument
5810 I8x16SubSatS(Simd128Register dst, Simd128Register src1, Simd128Register src2, Simd128Register scratch1, Simd128Register scratch2) CallRecordWriteStub() argument
5818 I8x16AddSatU(Simd128Register dst, Simd128Register src1, Simd128Register src2, Simd128Register scratch1, Simd128Register scratch2) CallRecordWriteStub() argument
5826 I8x16SubSatU(Simd128Register dst, Simd128Register src1, Simd128Register src2, Simd128Register scratch1, Simd128Register scratch2) CallRecordWriteStub() argument
5942 I8x16Swizzle(Simd128Register dst, Simd128Register src1, Simd128Register src2, Register scratch1, Register scratch2, Simd128Register scratch3, Simd128Register scratch4) CallRecordWriteStub() argument
5962 I8x16Shuffle(Simd128Register dst, Simd128Register src1, Simd128Register src2, uint64_t high, uint64_t low, Register scratch1, Register scratch2, Simd128Register scratch3) CallRecordWriteStub() argument
5972 I32x4DotI16x8S(Simd128Register dst, Simd128Register src1, Simd128Register src2, Simd128Register scratch) CallRecordWriteStub() argument
5990 I16x8Q15MulRSatS(Simd128Register dst, Simd128Register src1, Simd128Register src2, Simd128Register scratch1, Simd128Register scratch2, Simd128Register scratch3) CallRecordWriteStub() argument
[all...]
/third_party/node/deps/v8/src/codegen/mips64/
H A Dassembler-mips64.cc3133 void Assembler::fcmp(FPURegister src1, const double src2, FPUCondition cond) { in fcmp() argument
/third_party/node/deps/v8/src/codegen/mips/
H A Dmacro-assembler-mips.cc106 LoadRoot(Register destination, RootIndex index, Condition cond, Register src1, const Operand& src2) LoadRoot() argument
4277 MovToFloatParameters(DoubleRegister src1, DoubleRegister src2) CallRecordWriteStub() argument
5146 Float32Max(FPURegister dst, FPURegister src1, FPURegister src2, Label* out_of_line) CallRecordWriteStub() argument
5191 Float32MaxOutOfLine(FPURegister dst, FPURegister src1, FPURegister src2) CallRecordWriteStub() argument
5196 Float32Min(FPURegister dst, FPURegister src1, FPURegister src2, Label* out_of_line) CallRecordWriteStub() argument
5241 Float32MinOutOfLine(FPURegister dst, FPURegister src1, FPURegister src2) CallRecordWriteStub() argument
5246 Float64Max(DoubleRegister dst, DoubleRegister src1, DoubleRegister src2, Label* out_of_line) CallRecordWriteStub() argument
5291 Float64MaxOutOfLine(DoubleRegister dst, DoubleRegister src1, DoubleRegister src2) CallRecordWriteStub() argument
5297 Float64Min(DoubleRegister dst, DoubleRegister src1, DoubleRegister src2, Label* out_of_line) CallRecordWriteStub() argument
5342 Float64MinOutOfLine(DoubleRegister dst, DoubleRegister src1, DoubleRegister src2) CallRecordWriteStub() argument
[all...]
H A Dassembler-mips.cc2927 void Assembler::fcmp(FPURegister src1, const double src2, FPUCondition cond) { in fcmp() argument
/third_party/node/deps/v8/src/codegen/riscv64/
H A Dmacro-assembler-riscv64.cc101 LoadRoot(Register destination, RootIndex index, Condition cond, Register src1, const Operand& src2) LoadRoot() argument
3650 MovToFloatParameters(DoubleRegister src1, DoubleRegister src2) MovToFloatParameters() argument
4709 FloatMinMaxHelper(FPURegister dst, FPURegister src1, FPURegister src2, MaxMinKind kind) FloatMinMaxHelper() argument
4764 Float32Max(FPURegister dst, FPURegister src1, FPURegister src2) Float32Max() argument
4770 Float32Min(FPURegister dst, FPURegister src1, FPURegister src2) Float32Min() argument
4776 Float64Max(FPURegister dst, FPURegister src1, FPURegister src2) Float64Max() argument
4782 Float64Min(FPURegister dst, FPURegister src1, FPURegister src2) Float64Min() argument
[all...]
/third_party/node/deps/v8/src/codegen/arm/
H A Dassembler-arm.cc1536 void Assembler::and_(Register dst, Register src1, const Operand& src2, SBit s, in and_() argument
1541 void Assembler::and_(Register dst, Register src1, Register src2, SBit s, in and_() argument
1546 void Assembler::eor(Register dst, Register src1, const Operand& src2, SBit s, in eor() argument
1551 void Assembler::eor(Register dst, Register src1, Register src2, SBit s, in eor() argument
1556 void Assembler::sub(Register dst, Register src1, const Operand& src2, SBit s, in sub() argument
1561 sub(Register dst, Register src1, Register src2, SBit s, Condition cond) sub() argument
1566 rsb(Register dst, Register src1, const Operand& src2, SBit s, Condition cond) rsb() argument
1571 add(Register dst, Register src1, const Operand& src2, SBit s, Condition cond) add() argument
1576 add(Register dst, Register src1, Register src2, SBit s, Condition cond) add() argument
1581 adc(Register dst, Register src1, const Operand& src2, SBit s, Condition cond) adc() argument
1586 sbc(Register dst, Register src1, const Operand& src2, SBit s, Condition cond) sbc() argument
1591 rsc(Register dst, Register src1, const Operand& src2, SBit s, Condition cond) rsc() argument
1596 tst(Register src1, const Operand& src2, Condition cond) tst() argument
1600 tst(Register src1, Register src2, Condition cond) tst() argument
1604 teq(Register src1, const Operand& src2, Condition cond) teq() argument
1608 cmp(Register src1, const Operand& src2, Condition cond) cmp() argument
1612 cmp(Register src1, Register src2, Condition cond) cmp() argument
1622 cmn(Register src1, const Operand& src2, Condition cond) cmn() argument
1626 orr(Register dst, Register src1, const Operand& src2, SBit s, Condition cond) orr() argument
1631 orr(Register dst, Register src1, Register src2, SBit s, Condition cond) orr() argument
1695 bic(Register dst, Register src1, const Operand& src2, SBit s, Condition cond) bic() argument
1704 asr(Register dst, Register src1, const Operand& src2, SBit s, Condition cond) asr() argument
1713 lsl(Register dst, Register src1, const Operand& src2, SBit s, Condition cond) lsl() argument
1722 lsr(Register dst, Register src1, const Operand& src2, SBit s, Condition cond) lsr() argument
1732 mla(Register dst, Register src1, Register src2, Register srcA, SBit s, Condition cond) mla() argument
1739 mls(Register dst, Register src1, Register src2, Register srcA, Condition cond) mls() argument
1747 sdiv(Register dst, Register src1, Register src2, Condition cond) sdiv() argument
1755 udiv(Register dst, Register src1, Register src2, Condition cond) udiv() argument
1763 mul(Register dst, Register src1, Register src2, SBit s, Condition cond) mul() argument
1770 smmla(Register dst, Register src1, Register src2, Register srcA, Condition cond) smmla() argument
1777 smmul(Register dst, Register src1, Register src2, Condition cond) smmul() argument
1784 smlal(Register dstL, Register dstH, Register src1, Register src2, SBit s, Condition cond) smlal() argument
1792 smull(Register dstL, Register dstH, Register src1, Register src2, SBit s, Condition cond) smull() argument
1800 umlal(Register dstL, Register dstH, Register src1, Register src2, SBit s, Condition cond) umlal() argument
1808 umull(Register dstL, Register dstH, Register src1, Register src2, SBit s, Condition cond) umull() argument
1901 pkhbt(Register dst, Register src1, const Operand& src2, Condition cond) pkhbt() argument
1916 pkhtb(Register dst, Register src1, const Operand& src2, Condition cond) pkhtb() argument
1943 sxtab(Register dst, Register src1, Register src2, int rotate, Condition cond) sxtab() argument
1967 sxtah(Register dst, Register src1, Register src2, int rotate, Condition cond) sxtah() argument
1991 uxtab(Register dst, Register src1, Register src2, int rotate, Condition cond) uxtab() argument
2026 uxtah(Register dst, Register src1, Register src2, int rotate, Condition cond) uxtah() argument
2131 strd(Register src1, Register src2, const MemOperand& dst, Condition cond) strd() argument
2159 strex(Register src1, Register src2, Register dst, Condition cond) strex() argument
2182 strexb(Register src1, Register src2, Register dst, Condition cond) strexb() argument
2205 strexh(Register src1, Register src2, Register dst, Condition cond) strexh() argument
2231 strexd(Register res, Register src1, Register src2, Register dst, Condition cond) strexd() argument
2908 vmov(const DwVfpRegister dst, const Register src1, const Register src2, const Condition cond) vmov() argument
3186 vadd(const DwVfpRegister dst, const DwVfpRegister src1, const DwVfpRegister src2, const Condition cond) vadd() argument
3206 vadd(const SwVfpRegister dst, const SwVfpRegister src1, const SwVfpRegister src2, const Condition cond) vadd() argument
3223 vsub(const DwVfpRegister dst, const DwVfpRegister src1, const DwVfpRegister src2, const Condition cond) vsub() argument
3243 vsub(const SwVfpRegister dst, const SwVfpRegister src1, const SwVfpRegister src2, const Condition cond) vsub() argument
3260 vmul(const DwVfpRegister dst, const DwVfpRegister src1, const DwVfpRegister src2, const Condition cond) vmul() argument
3280 vmul(const SwVfpRegister dst, const SwVfpRegister src1, const SwVfpRegister src2, const Condition cond) vmul() argument
3297 vmla(const DwVfpRegister dst, const DwVfpRegister src1, const DwVfpRegister src2, const Condition cond) vmla() argument
3315 vmla(const SwVfpRegister dst, const SwVfpRegister src1, const SwVfpRegister src2, const Condition cond) vmla() argument
3330 vmls(const DwVfpRegister dst, const DwVfpRegister src1, const DwVfpRegister src2, const Condition cond) vmls() argument
3348 vmls(const SwVfpRegister dst, const SwVfpRegister src1, const SwVfpRegister src2, const Condition cond) vmls() argument
3363 vdiv(const DwVfpRegister dst, const DwVfpRegister src1, const DwVfpRegister src2, const Condition cond) vdiv() argument
3383 vdiv(const SwVfpRegister dst, const SwVfpRegister src1, const SwVfpRegister src2, const Condition cond) vdiv() argument
3400 vcmp(const DwVfpRegister src1, const DwVfpRegister src2, const Condition cond) vcmp() argument
3416 vcmp(const SwVfpRegister src1, const SwVfpRegister src2, const Condition cond) vcmp() argument
3430 vcmp(const DwVfpRegister src1, const double src2, const Condition cond) vcmp() argument
3444 vcmp(const SwVfpRegister src1, const float src2, const Condition cond) vcmp() argument
3457 vmaxnm(const DwVfpRegister dst, const DwVfpRegister src1, const DwVfpRegister src2) vmaxnm() argument
3473 vmaxnm(const SwVfpRegister dst, const SwVfpRegister src1, const SwVfpRegister src2) vmaxnm() argument
3489 vminnm(const DwVfpRegister dst, const DwVfpRegister src1, const DwVfpRegister src2) vminnm() argument
3505 vminnm(const SwVfpRegister dst, const SwVfpRegister src1, const SwVfpRegister src2) vminnm() argument
3521 vsel(Condition cond, const DwVfpRegister dst, const DwVfpRegister src1, const DwVfpRegister src2) vsel() argument
3553 vsel(Condition cond, const SwVfpRegister dst, const SwVfpRegister src1, const SwVfpRegister src2) vsel() argument
4263 vand(QwNeonRegister dst, QwNeonRegister src1, QwNeonRegister src2) vand() argument
4272 vbic(QwNeonRegister dst, QwNeonRegister src1, QwNeonRegister src2) vbic() argument
4281 vbsl(QwNeonRegister dst, QwNeonRegister src1, QwNeonRegister src2) vbsl() argument
4290 veor(DwVfpRegister dst, DwVfpRegister src1, DwVfpRegister src2) veor() argument
4299 veor(QwNeonRegister dst, QwNeonRegister src1, QwNeonRegister src2) veor() argument
4308 vorr(QwNeonRegister dst, QwNeonRegister src1, QwNeonRegister src2) vorr() argument
4317 vorn(QwNeonRegister dst, QwNeonRegister src1, QwNeonRegister src2) vorn() argument
4339 EncodeNeonBinOp(FPBinOp op, QwNeonRegister dst, QwNeonRegister src1, QwNeonRegister src2) EncodeNeonBinOp() argument
4402 EncodeNeonBinOp(IntegerBinOp op, NeonDataType dt, QwNeonRegister dst, QwNeonRegister src1, QwNeonRegister src2) EncodeNeonBinOp() argument
4461 EncodeNeonBinOp(IntegerBinOp op, NeonSize size, QwNeonRegister dst, QwNeonRegister src1, QwNeonRegister src2) EncodeNeonBinOp() argument
4468 vadd(QwNeonRegister dst, QwNeonRegister src1, QwNeonRegister src2) vadd() argument
4476 vadd(NeonSize size, QwNeonRegister dst, QwNeonRegister src1, QwNeonRegister src2) vadd() argument
4484 vqadd(NeonDataType dt, QwNeonRegister dst, QwNeonRegister src1, QwNeonRegister src2) vqadd() argument
4492 vsub(QwNeonRegister dst, QwNeonRegister src1, QwNeonRegister src2) vsub() argument
4500 vsub(NeonSize size, QwNeonRegister dst, QwNeonRegister src1, QwNeonRegister src2) vsub() argument
4508 vqsub(NeonDataType dt, QwNeonRegister dst, QwNeonRegister src1, QwNeonRegister src2) vqsub() argument
4516 vmlal(NeonDataType dt, QwNeonRegister dst, DwVfpRegister src1, DwVfpRegister src2) vmlal() argument
4535 vmul(QwNeonRegister dst, QwNeonRegister src1, QwNeonRegister src2) vmul() argument
4543 vmul(NeonSize size, QwNeonRegister dst, QwNeonRegister src1, QwNeonRegister src2) vmul() argument
4551 vmull(NeonDataType dt, QwNeonRegister dst, DwVfpRegister src1, DwVfpRegister src2) vmull() argument
4568 vmin(QwNeonRegister dst, QwNeonRegister src1, QwNeonRegister src2) vmin() argument
4576 vmin(NeonDataType dt, QwNeonRegister dst, QwNeonRegister src1, QwNeonRegister src2) vmin() argument
4584 vmax(QwNeonRegister dst, QwNeonRegister src1, QwNeonRegister src2) vmax() argument
4592 vmax(NeonDataType dt, QwNeonRegister dst, QwNeonRegister src1, QwNeonRegister src2) vmax() argument
4750 vrecps(QwNeonRegister dst, QwNeonRegister src1, QwNeonRegister src2) vrecps() argument
4758 vrsqrts(QwNeonRegister dst, QwNeonRegister src1, QwNeonRegister src2) vrsqrts() argument
4768 EncodeNeonPairwiseOp(NeonPairwiseOp op, NeonDataType dt, DwVfpRegister dst, DwVfpRegister src1, DwVfpRegister src2) EncodeNeonPairwiseOp() argument
4797 vpadd(DwVfpRegister dst, DwVfpRegister src1, DwVfpRegister src2) vpadd() argument
4813 vpadd(NeonSize size, DwVfpRegister dst, DwVfpRegister src1, DwVfpRegister src2) vpadd() argument
4821 vpmin(NeonDataType dt, DwVfpRegister dst, DwVfpRegister src1, DwVfpRegister src2) vpmin() argument
4829 vpmax(NeonDataType dt, DwVfpRegister dst, DwVfpRegister src1, DwVfpRegister src2) vpmax() argument
4869 vtst(NeonSize size, QwNeonRegister dst, QwNeonRegister src1, QwNeonRegister src2) vtst() argument
4877 vceq(QwNeonRegister dst, QwNeonRegister src1, QwNeonRegister src2) vceq() argument
4885 vceq(NeonSize size, QwNeonRegister dst, QwNeonRegister src1, QwNeonRegister src2) vceq() argument
4902 vcge(QwNeonRegister dst, QwNeonRegister src1, QwNeonRegister src2) vcge() argument
4910 vcge(NeonDataType dt, QwNeonRegister dst, QwNeonRegister src1, QwNeonRegister src2) vcge() argument
4918 vcgt(QwNeonRegister dst, QwNeonRegister src1, QwNeonRegister src2) vcgt() argument
4926 vcgt(NeonDataType dt, QwNeonRegister dst, QwNeonRegister src1, QwNeonRegister src2) vcgt() argument
4943 vrhadd(NeonDataType dt, QwNeonRegister dst, QwNeonRegister src1, QwNeonRegister src2) vrhadd() argument
4951 vext(QwNeonRegister dst, QwNeonRegister src1, QwNeonRegister src2, int bytes) vext() argument
4967 vzip(NeonSize size, DwVfpRegister src1, DwVfpRegister src2) vzip() argument
4978 vzip(NeonSize size, QwNeonRegister src1, QwNeonRegister src2) vzip() argument
4985 vuzp(NeonSize size, DwVfpRegister src1, DwVfpRegister src2) vuzp() argument
4996 vuzp(NeonSize size, QwNeonRegister src1, QwNeonRegister src2) vuzp() argument
5024 vtrn(NeonSize size, DwVfpRegister src1, DwVfpRegister src2) vtrn() argument
5031 vtrn(NeonSize size, QwNeonRegister src1, QwNeonRegister src2) vtrn() argument
5054 vqrdmulh(NeonDataType dt, QwNeonRegister dst, QwNeonRegister src1, QwNeonRegister src2) vqrdmulh() argument
[all...]
/third_party/node/deps/v8/src/execution/arm/
H A Dsimulator-arm.cc3949 T src1[kLanes], src2[kLanes]; in Binop() local
4017 T src1[kElems], src2[kElems], dst1[kElems], dst2[kElems]; in Zip() local
4034 T src1[kElems], src2[kElems], dst1[kElems], dst2[kElems]; in Unzip() local
4051 T src1[kElems], src2[kElems]; Transpose() local
4125 T src1[kElems], src2[kElems]; Mul() local
4276 T dst[kElems], src1[kElems], src2[kElems]; PairwiseMinMax() local
4290 T dst[kElems], src1[kElems], src2[kElems]; PairwiseAdd() local
4333 NarrowType src1[kElems], src2[kElems]; MultiplyLong() local
4384 uint8_t src1[16], src2[16], dst[16]; DecodeAdvancedSIMDTwoOrThreeRegisters() local
4979 uint64_t src1, src2, dst[2]; DecodeAdvancedSIMDTwoOrThreeRegisters() local
5082 uint32_t src2[4]; DecodeAdvancedSIMDDataProcessing() local
5096 uint32_t src1[4], src2[4]; DecodeAdvancedSIMDDataProcessing() local
5105 uint32_t src1[4], src2[4]; DecodeAdvancedSIMDDataProcessing() local
5267 float src1[4], src2[4]; DecodeAdvancedSIMDDataProcessing() local
5282 float src1[4], src2[4]; DecodeAdvancedSIMDDataProcessing() local
5291 float src1[4], src2[4]; DecodeAdvancedSIMDDataProcessing() local
5307 float src1[4], src2[4]; DecodeAdvancedSIMDDataProcessing() local
5338 uint32_t dst[4], src1[4], src2[4]; DecodeAdvancedSIMDDataProcessing() local
5348 uint64_t src1, src2; DecodeAdvancedSIMDDataProcessing() local
5355 uint32_t src1[4], src2[4]; DecodeAdvancedSIMDDataProcessing() local
5497 float src1[4], src2[4]; DecodeAdvancedSIMDDataProcessing() local
5510 float src1[4], src2[4]; DecodeAdvancedSIMDDataProcessing() local
[all...]
/third_party/node/deps/v8/src/wasm/baseline/x64/
H A Dliftoff-assembler-x64.h2868 emit_s128_select(LiftoffRegister dst, LiftoffRegister src1, LiftoffRegister src2, LiftoffRegister mask) emit_s128_select() argument
3161 emit_i16x8_extmul_low_i8x16_s(LiftoffRegister dst, LiftoffRegister src1, LiftoffRegister src2) emit_i16x8_extmul_low_i8x16_s() argument
3168 emit_i16x8_extmul_low_i8x16_u(LiftoffRegister dst, LiftoffRegister src1, LiftoffRegister src2) emit_i16x8_extmul_low_i8x16_u() argument
3175 emit_i16x8_extmul_high_i8x16_s(LiftoffRegister dst, LiftoffRegister src1, LiftoffRegister src2) emit_i16x8_extmul_high_i8x16_s() argument
3181 emit_i16x8_extmul_high_i8x16_u(LiftoffRegister dst, LiftoffRegister src1, LiftoffRegister src2) emit_i16x8_extmul_high_i8x16_u() argument
3187 emit_i16x8_q15mulr_sat_s(LiftoffRegister dst, LiftoffRegister src1, LiftoffRegister src2) emit_i16x8_q15mulr_sat_s() argument
3318 I32x4ExtMulHelper(LiftoffAssembler* assm, XMMRegister dst, XMMRegister src1, XMMRegister src2, bool low, bool is_signed) I32x4ExtMulHelper() argument
3337 emit_i32x4_extmul_low_i16x8_s(LiftoffRegister dst, LiftoffRegister src1, LiftoffRegister src2) emit_i32x4_extmul_low_i16x8_s() argument
3344 emit_i32x4_extmul_low_i16x8_u(LiftoffRegister dst, LiftoffRegister src1, LiftoffRegister src2) emit_i32x4_extmul_low_i16x8_u() argument
3351 emit_i32x4_extmul_high_i16x8_s(LiftoffRegister dst, LiftoffRegister src1, LiftoffRegister src2) emit_i32x4_extmul_high_i16x8_s() argument
3359 emit_i32x4_extmul_high_i16x8_u(LiftoffRegister dst, LiftoffRegister src1, LiftoffRegister src2) emit_i32x4_extmul_high_i16x8_u() argument
3436 emit_i64x2_extmul_low_i32x4_s(LiftoffRegister dst, LiftoffRegister src1, LiftoffRegister src2) emit_i64x2_extmul_low_i32x4_s() argument
3443 emit_i64x2_extmul_low_i32x4_u(LiftoffRegister dst, LiftoffRegister src1, LiftoffRegister src2) emit_i64x2_extmul_low_i32x4_u() argument
3450 emit_i64x2_extmul_high_i32x4_s(LiftoffRegister dst, LiftoffRegister src1, LiftoffRegister src2) emit_i64x2_extmul_high_i32x4_s() argument
3457 emit_i64x2_extmul_high_i32x4_u(LiftoffRegister dst, LiftoffRegister src1, LiftoffRegister src2) emit_i64x2_extmul_high_i32x4_u() argument
3930 emit_i8x16_replace_lane(LiftoffRegister dst, LiftoffRegister src1, LiftoffRegister src2, uint8_t imm_lane_idx) emit_i8x16_replace_lane() argument
3944 emit_i16x8_replace_lane(LiftoffRegister dst, LiftoffRegister src1, LiftoffRegister src2, uint8_t imm_lane_idx) emit_i16x8_replace_lane() argument
3957 emit_i32x4_replace_lane(LiftoffRegister dst, LiftoffRegister src1, LiftoffRegister src2, uint8_t imm_lane_idx) emit_i32x4_replace_lane() argument
3971 emit_i64x2_replace_lane(LiftoffRegister dst, LiftoffRegister src1, LiftoffRegister src2, uint8_t imm_lane_idx) emit_i64x2_replace_lane() argument
3985 emit_f32x4_replace_lane(LiftoffRegister dst, LiftoffRegister src1, LiftoffRegister src2, uint8_t imm_lane_idx) emit_f32x4_replace_lane() argument
3999 emit_f64x2_replace_lane(LiftoffRegister dst, LiftoffRegister src1, LiftoffRegister src2, uint8_t imm_lane_idx) emit_f64x2_replace_lane() argument
[all...]
/third_party/node/deps/v8/src/wasm/baseline/riscv64/
H A Dliftoff-assembler-riscv64.h2002 emit_i64x2_extmul_low_i32x4_s(LiftoffRegister dst, LiftoffRegister src1, LiftoffRegister src2) emit_i64x2_extmul_low_i32x4_s() argument
2017 emit_i64x2_extmul_low_i32x4_u(LiftoffRegister dst, LiftoffRegister src1, LiftoffRegister src2) emit_i64x2_extmul_low_i32x4_u() argument
2032 emit_i64x2_extmul_high_i32x4_s(LiftoffRegister dst, LiftoffRegister src1, LiftoffRegister src2) emit_i64x2_extmul_high_i32x4_s() argument
2042 emit_i64x2_extmul_high_i32x4_u(LiftoffRegister dst, LiftoffRegister src1, LiftoffRegister src2) emit_i64x2_extmul_high_i32x4_u() argument
2052 emit_i32x4_extmul_low_i16x8_s(LiftoffRegister dst, LiftoffRegister src1, LiftoffRegister src2) emit_i32x4_extmul_low_i16x8_s() argument
2067 emit_i32x4_extmul_low_i16x8_u(LiftoffRegister dst, LiftoffRegister src1, LiftoffRegister src2) emit_i32x4_extmul_low_i16x8_u() argument
2082 emit_i32x4_extmul_high_i16x8_s(LiftoffRegister dst, LiftoffRegister src1, LiftoffRegister src2) emit_i32x4_extmul_high_i16x8_s() argument
2092 emit_i32x4_extmul_high_i16x8_u(LiftoffRegister dst, LiftoffRegister src1, LiftoffRegister src2) emit_i32x4_extmul_high_i16x8_u() argument
2102 emit_i16x8_extmul_low_i8x16_s(LiftoffRegister dst, LiftoffRegister src1, LiftoffRegister src2) emit_i16x8_extmul_low_i8x16_s() argument
2117 emit_i16x8_extmul_low_i8x16_u(LiftoffRegister dst, LiftoffRegister src1, LiftoffRegister src2) emit_i16x8_extmul_low_i8x16_u() argument
2132 emit_i16x8_extmul_high_i8x16_s(LiftoffRegister dst, LiftoffRegister src1, LiftoffRegister src2) emit_i16x8_extmul_high_i8x16_s() argument
2142 emit_i16x8_extmul_high_i8x16_u(LiftoffRegister dst, LiftoffRegister src1, LiftoffRegister src2) emit_i16x8_extmul_high_i8x16_u() argument
2154 emit_i16x8_q15mulr_sat_s(LiftoffRegister dst, LiftoffRegister src1, LiftoffRegister src2) emit_i16x8_q15mulr_sat_s() argument
2459 emit_s128_select(LiftoffRegister dst, LiftoffRegister src1, LiftoffRegister src2, LiftoffRegister mask) emit_s128_select() argument
3546 emit_i8x16_replace_lane(LiftoffRegister dst, LiftoffRegister src1, LiftoffRegister src2, uint8_t imm_lane_idx) emit_i8x16_replace_lane() argument
3557 emit_i16x8_replace_lane(LiftoffRegister dst, LiftoffRegister src1, LiftoffRegister src2, uint8_t imm_lane_idx) emit_i16x8_replace_lane() argument
3567 emit_i32x4_replace_lane(LiftoffRegister dst, LiftoffRegister src1, LiftoffRegister src2, uint8_t imm_lane_idx) emit_i32x4_replace_lane() argument
3577 emit_i64x2_replace_lane(LiftoffRegister dst, LiftoffRegister src1, LiftoffRegister src2, uint8_t imm_lane_idx) emit_i64x2_replace_lane() argument
3587 emit_f32x4_replace_lane(LiftoffRegister dst, LiftoffRegister src1, LiftoffRegister src2, uint8_t imm_lane_idx) emit_f32x4_replace_lane() argument
3598 emit_f64x2_replace_lane(LiftoffRegister dst, LiftoffRegister src1, LiftoffRegister src2, uint8_t imm_lane_idx) emit_f64x2_replace_lane() argument
[all...]
/third_party/node/deps/v8/src/wasm/baseline/mips64/
H A Dliftoff-assembler-mips64.h2219 emit_i16x8_q15mulr_sat_s(LiftoffRegister dst, LiftoffRegister src1, LiftoffRegister src2) emit_i16x8_q15mulr_sat_s() argument
2412 emit_s128_select(LiftoffRegister dst, LiftoffRegister src1, LiftoffRegister src2, LiftoffRegister mask) emit_s128_select() argument
3368 emit_i8x16_replace_lane(LiftoffRegister dst, LiftoffRegister src1, LiftoffRegister src2, uint8_t imm_lane_idx) emit_i8x16_replace_lane() argument
3378 emit_i16x8_replace_lane(LiftoffRegister dst, LiftoffRegister src1, LiftoffRegister src2, uint8_t imm_lane_idx) emit_i16x8_replace_lane() argument
3388 emit_i32x4_replace_lane(LiftoffRegister dst, LiftoffRegister src1, LiftoffRegister src2, uint8_t imm_lane_idx) emit_i32x4_replace_lane() argument
3398 emit_i64x2_replace_lane(LiftoffRegister dst, LiftoffRegister src1, LiftoffRegister src2, uint8_t imm_lane_idx) emit_i64x2_replace_lane() argument
3408 emit_f32x4_replace_lane(LiftoffRegister dst, LiftoffRegister src1, LiftoffRegister src2, uint8_t imm_lane_idx) emit_f32x4_replace_lane() argument
3419 emit_f64x2_replace_lane(LiftoffRegister dst, LiftoffRegister src1, LiftoffRegister src2, uint8_t imm_lane_idx) emit_f64x2_replace_lane() argument
[all...]
/third_party/mesa3d/src/panfrost/midgard/
H A Dmidgard.h317 unsigned src2 : 13; member
339 unsigned src2 : 11; member
/third_party/icu/ohos_icu4c/src/
H A Dicu_addon.cpp1556 int32_t ucol_mergeSortkeys(const uint8_t *src1, int32_t src1Length, const uint8_t *src2, int32_t src2Length, in ucol_mergeSortkeys() argument

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