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Searched defs:shader (Results 826 - 850 of 1249) sorted by relevance

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/third_party/mesa3d/src/compiler/nir/
H A Dnir_lower_subgroups.c839 nir_lower_subgroups(nir_shader *shader, in nir_lower_subgroups() argument
H A Dnir_opt_gcm.c795 opt_gcm_impl(nir_shader *shader, nir_function_impl *impl, bool value_number) in opt_gcm_impl() argument
858 nir_opt_gcm(nir_shader *shader, bool value_number) in nir_opt_gcm() argument
H A Dnir_opt_find_array_copies.c675 nir_opt_find_array_copies(nir_shader *shader) in nir_opt_find_array_copies() argument
H A Dnir_lower_io_to_vector.c51 get_per_vertex_type(const nir_shader *shader, const nir_variable *var, in get_per_vertex_type() argument
80 variables_can_merge(const nir_shader *shader, in variables_can_merge() argument
156 get_flat_type(const nir_shader *shader, nir_variable *old_vars[MAX_SLOTS][4], unsigned *loc, nir_variable **first_var, unsigned *num_vertices) get_flat_type() argument
211 create_new_io_vars(nir_shader *shader, nir_variable_mode mode, nir_variable *new_vars[MAX_SLOTS][4], bool flat_vars[MAX_SLOTS]) create_new_io_vars() argument
358 build_array_deref_of_new_var_flat(nir_shader *shader, nir_builder *b, nir_variable *new_var, nir_deref_instr *leader, unsigned base) build_array_deref_of_new_var_flat() argument
414 nir_shader *shader = impl->function->shader; nir_lower_io_to_vector_impl() local
597 nir_lower_io_to_vector(nir_shader *shader, nir_variable_mode modes) nir_lower_io_to_vector() argument
693 nir_vectorize_tess_levels(nir_shader *shader) nir_vectorize_tess_levels() argument
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H A Dnir_lower_vars_to_ssa.c73 nir_shader *shader; member
811 nir_lower_vars_to_ssa(nir_shader *shader) in nir_lower_vars_to_ssa() argument
H A Dnir_gather_xfb_info.c182 nir_shader_gather_xfb_info(nir_shader *shader) in nir_shader_gather_xfb_info() argument
188 nir_gather_xfb_info_with_varyings(nir_shader *shader, in nir_gather_xfb_info_with_varyings() argument
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H A Dnir_lower_double_ops.c755 nir_lower_doubles(nir_shader *shader, in nir_lower_doubles() argument
/third_party/mesa3d/src/freedreno/ir3/
H A Dir3_nir.c306 ir3_nir_lower_array_sampler(nir_shader *shader) in ir3_nir_lower_array_sampler() argument
436 ir3_nir_lower_subgroup_id_cs(nir_shader *shader) in ir3_nir_lower_subgroup_id_cs() argument
446 ir3_nir_post_finalize(struct ir3_shader *shader) in ir3_nir_post_finalize() argument
821 ir3_nir_scan_driver_consts(struct ir3_compiler *compiler, nir_shader *shader, struct ir3_const_state *layout) ir3_nir_scan_driver_consts() argument
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H A Dir3_shader.c291 compile_variant(struct ir3_shader *shader, struc argument
316 alloc_variant(struct ir3_shader *shader, const struct ir3_shader_key *key, struct ir3_shader_variant *nonbinning, void *mem_ctx) alloc_variant() argument
397 create_variant(struct ir3_shader *shader, const struct ir3_shader_key *key, bool write_disasm, void *mem_ctx) create_variant() argument
448 ir3_shader_create_variant(struct ir3_shader *shader, const struct ir3_shader_key *key, bool keep_ir) ir3_shader_create_variant() argument
456 shader_variant(struct ir3_shader *shader, const struct ir3_shader_key *key) shader_variant() argument
468 ir3_shader_get_variant(struct ir3_shader *shader, const struct ir3_shader_key *key, bool binning_pass, bool write_disasm, bool *created) ir3_shader_get_variant() argument
496 ir3_shader_destroy(struct ir3_shader *shader) ir3_shader_destroy() argument
509 ir3_setup_used_key(struct ir3_shader *shader) ir3_setup_used_key() argument
665 struct ir3_shader *shader = rzalloc_size(NULL, sizeof(*shader)); ir3_shader_from_nir() local
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/third_party/mesa3d/src/amd/vulkan/
H A Dradv_nir_apply_pipeline_layout.c527 radv_nir_apply_pipeline_layout(nir_shader *shader, struct radv_device *device, in radv_nir_apply_pipeline_layout() argument
/third_party/mesa3d/src/compiler/glsl/
H A Dlink_uniform_blocks.cpp402 link_uniform_blocks(void *mem_ctx, const struct gl_constants *consts, struct gl_shader_program *prog, struct gl_linked_shader *shader, struct gl_uniform_block **ubo_blocks, unsigned *num_ubo_blocks, struct gl_uniform_block **ssbo_blocks, unsigned *num_ssbo_blocks) link_uniform_blocks() argument
/third_party/mesa3d/src/gallium/drivers/svga/
H A Dsvga_state_uav.c820 enum pipe_shader_type shader = PIPE_SHADER_COMPUTE; need_to_set_cs_uav() local
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H A Dsvga_screen.c478 vgpu9_get_shader_param(struct pipe_screen *screen, enum pipe_shader_type shader, enum pipe_shader_cap param) vgpu9_get_shader_param() argument
642 vgpu10_get_shader_param(struct pipe_screen *screen, enum pipe_shader_type shader, enum pipe_shader_cap param) vgpu10_get_shader_param() argument
798 svga_get_compiler_options(struct pipe_screen *pscreen, enum pipe_shader_ir ir, enum pipe_shader_type shader) svga_get_compiler_options() argument
820 svga_get_shader_param(struct pipe_screen *screen, enum pipe_shader_type shader, enum pipe_shader_cap param) svga_get_shader_param() argument
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H A Dsvga_shader.c275 svga_init_shader_key_common(const struct svga_context *svga, enum pipe_shader_type shader_type, const struct svga_shader *shader, struct svga_compile_key *key) svga_init_shader_key_common() argument
564 svga_search_shader_key(const struct svga_shader *shader, const struct svga_compile_key *key) svga_search_shader_key() argument
583 struct svga_shader *shader = pshader; svga_search_shader_token_key() local
922 struct svga_shader *shader = CALLOC(1, shader_structlen); svga_create_shader() local
958 svga_compile_shader(struct svga_context *svga, struct svga_shader *shader, const struct svga_compile_key *key, struct svga_shader_variant **out_variant) svga_compile_shader() argument
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/third_party/mesa3d/src/gallium/drivers/vc4/kernel/
H A Dvc4_validate_shaders.c52 uint64_t *shader; member
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/third_party/mesa3d/src/gallium/frontends/xa/
H A Dxa_composite.c382 struct xa_shader shader; in bind_shaders() local
H A Dxa_tgsi.c440 void *shader = (void *)cso_hash_iter_data(iter); in cache_destroy() local
465 void *shader = NULL; in shader_from_cache() local
484 struct xa_shader shader = { NULL, NULL }; xa_shaders_get() local
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/third_party/mesa3d/src/gallium/drivers/zink/
H A Dzink_program.h68 VkShaderModule shader; member
126 struct zink_shader *shader; member
/third_party/mesa3d/src/intel/compiler/
H A Dbrw_fs_builder.h55 fs_builder(backend_shader *shader, in fs_builder() argument
71 fs_builder(backend_shader *shader, bblock_t *block, fs_inst *inst) : in fs_builder() argument
792 backend_shader *shader; global() member in brw::fs_builder
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H A Dbrw_fs_scoreboard.cpp235 num_instructions(const backend_shader *shader) in num_instructions() argument
245 ordered_inst_addresses(const fs_visitor *shader) in ordered_inst_addresses() argument
390 assert(from < n); if (is[from] != from) assign(is[from], to); is[from] = to; } } unsigned *is; unsigned n; }; struct dependency { dependency() : ordered(TGL_REGDIST_NULL), jp(), unordered(TGL_SBID_NULL), id(0), exec_all(false) {} dependency(tgl_regdist_mode mode, const ordered_address &jp, bool exec_all) : ordered(mode), jp(jp), unordered(TGL_SBID_NULL), id(0), exec_all(exec_all) {} dependency(tgl_sbid_mode mode, unsigned id, bool exec_all) : ordered(TGL_REGDIST_NULL), jp(), unordered(mode), id(id), exec_all(exec_all) {} tgl_regdist_mode ordered; ordered_address jp; tgl_sbid_mode unordered; unsigned id; bool exec_all; static const dependency done; friend bool operator==(const dependency &dep0, const dependency &dep1) { return dep0.ordered == dep1.ordered && dep0.jp == dep1.jp && dep0.unordered == dep1.unordered && dep0.id == dep1.id && dep0.exec_all == dep1.exec_all; } friend bool operator!=(const dependency &dep0, const dependency &dep1) { return !(dep0 == dep1); } }; const dependency dependency::done = dependency(TGL_REGDIST_DST, ordered_address(), false); bool is_valid(const dependency &dep) { return dep.ordered || dep.unordered; } dependency merge(equivalence_relation &eq, const dependency &dep0, const dependency &dep1) { dependency dep; if (dep0.ordered || dep1.ordered) { dep.ordered = dep0.ordered | dep1.ordered; for (unsigned p = 0; p < IDX(TGL_PIPE_ALL); p++) dep.jp.jp[p] = MAX2(dep0.jp.jp[p], dep1.jp.jp[p]); } if (dep0.unordered || dep1.unordered) { dep.unordered = dep0.unordered | dep1.unordered; dep.id = eq.link(dep0.unordered ? dep0.id : dep1.id, dep1.unordered ? dep1.id : dep0.id); } dep.exec_all = dep0.exec_all || dep1.exec_all; return dep; } dependency shadow(const dependency &dep0, const dependency &dep1) { if (dep0.ordered == TGL_REGDIST_SRC && is_valid(dep1) && !(dep1.unordered & TGL_SBID_DST) && !(dep1.ordered & TGL_REGDIST_DST)) { dependency dep = dep1; dep.ordered |= dep0.ordered; for (unsigned p = 0; p < IDX(TGL_PIPE_ALL); p++) dep.jp.jp[p] = MAX2(dep.jp.jp[p], dep0.jp.jp[p]); return dep; } else { return is_valid(dep1) ? dep1 : dep0; } } dependency transport(dependency dep, int delta[IDX(TGL_PIPE_ALL)]) { if (dep.ordered) { for (unsigned p = 0; p < IDX(TGL_PIPE_ALL); p++) { if (dep.jp.jp[p] > INT_MIN) dep.jp.jp[p] += delta[p]; } } return dep; } dependency dependency_for_read(dependency dep) { dep.ordered &= TGL_REGDIST_DST; return dep; } dependency dependency_for_write(const struct intel_device_info *devinfo, const fs_inst *inst, dependency dep) { if (!is_unordered(inst) && is_single_pipe(dep.jp, inferred_exec_pipe(devinfo, inst))) dep.ordered &= TGL_REGDIST_DST; return dep; } class scoreboard { public: dependency get(const fs_reg &r) const { if (const dependency *p = const_cast<scoreboard *>(this)->dep(r)) return *p; else return dependency(); } void set(const fs_reg &r, const dependency &d) { if (dependency *p = dep(r)) *p = d; } friend scoreboard merge(equivalence_relation &eq, const scoreboard &sb0, const scoreboard &sb1) { scoreboard sb; for (unsigned i = 0; i < ARRAY_SIZE(sb.grf_deps); i++) sb.grf_deps[i] = merge(eq, sb0.grf_deps[i], sb1.grf_deps[i]); sb.addr_dep = merge(eq, sb0.addr_dep, sb1.addr_dep); sb.accum_dep = merge(eq, sb0.accum_dep, sb1.accum_dep); return sb; } friend scoreboard shadow(const scoreboard &sb0, const scoreboard &sb1) { scoreboard sb; for (unsigned i = 0; i < ARRAY_SIZE(sb.grf_deps); i++) sb.grf_deps[i] = shadow(sb0.grf_deps[i], sb1.grf_deps[i]); sb.addr_dep = shadow(sb0.addr_dep, sb1.addr_dep); sb.accum_dep = shadow(sb0.accum_dep, sb1.accum_dep); return sb; } friend scoreboard transport(const scoreboard &sb0, int delta[IDX(TGL_PIPE_ALL)]) { scoreboard sb; for (unsigned i = 0; i < ARRAY_SIZE(sb.grf_deps); i++) sb.grf_deps[i] = transport(sb0.grf_deps[i], delta); sb.addr_dep = transport(sb0.addr_dep, delta); sb.accum_dep = transport(sb0.accum_dep, delta); return sb; } friend bool operator==(const scoreboard &sb0, const scoreboard &sb1) { for (unsigned i = 0; i < ARRAY_SIZE(sb0.grf_deps); i++) { if (sb0.grf_deps[i] != sb1.grf_deps[i]) return false; } if (sb0.addr_dep != sb1.addr_dep) return false; if (sb0.accum_dep != sb1.accum_dep) return false; return true; } friend bool operator!=(const scoreboard &sb0, const scoreboard &sb1) { return !(sb0 == sb1); } private: dependency grf_deps[BRW_MAX_GRF]; dependency addr_dep; dependency accum_dep; dependency * dep(const fs_reg &r) { const unsigned reg = (r.file == VGRF ? r.nr + r.offset / REG_SIZE : reg_offset(r) / REG_SIZE); return (r.file == VGRF || r.file == FIXED_GRF ? &grf_deps[reg] : r.file == MRF ? &grf_deps[GFX7_MRF_HACK_START + reg] : r.file == ARF && reg >= BRW_ARF_ADDRESS && reg < BRW_ARF_ACCUMULATOR ? &addr_dep : r.file == ARF && reg >= BRW_ARF_ACCUMULATOR && reg < BRW_ARF_FLAG ? &accum_dep : NULL); } }; struct dependency_list { dependency_list() : deps(NULL), n(0) {} ~dependency_list() { free(deps); } void push_back(const dependency &dep) { deps = (dependency *)realloc(deps, (n + 1) * sizeof(*deps)); deps[n++] = dep; } unsigned size() const { return n; } const dependency & operator[](unsigned i) const { assert(i < n); return deps[i]; } dependency & operator[](unsigned i) { assert(i < n); return deps[i]; } private: dependency_list(const dependency_list &); dependency_list & operator=(const dependency_list &); dependency *deps; unsigned n; }; void add_dependency(const unsigned *ids, dependency_list &deps, dependency dep) { if (is_valid(dep)) { if (dep.unordered) dep.id = ids[dep.id]; for (unsigned i = 0; i < deps.size(); i++) { if (deps[i].exec_all != dep.exec_all && (!deps[i].exec_all || (dep.unordered & TGL_SBID_SET)) && (!dep.exec_all || (deps[i].unordered & TGL_SBID_SET))) continue; if (dep.ordered && deps[i].ordered) { for (unsigned p = 0; p < IDX(TGL_PIPE_ALL); p++) deps[i].jp.jp[p] = MAX2(deps[i].jp.jp[p], dep.jp.jp[p]); deps[i].ordered |= dep.ordered; deps[i].exec_all |= dep.exec_all; dep.ordered = TGL_REGDIST_NULL; } if (dep.unordered && deps[i].unordered && deps[i].id == dep.id) { deps[i].unordered |= dep.unordered; deps[i].exec_all |= dep.exec_all; dep.unordered = TGL_SBID_NULL; } } if (is_valid(dep)) deps.push_back(dep); } } tgl_swsb ordered_dependency_swsb(const dependency_list &deps, const ordered_address &jp, bool exec_all) { tgl_pipe p = TGL_PIPE_NONE; unsigned min_dist = ~0u; for (unsigned i = 0; i < deps.size(); i++) { if (deps[i].ordered && exec_all >= deps[i].exec_all) { for (unsigned q = 0; q < IDX(TGL_PIPE_ALL); q++) { const unsigned dist = jp.jp[q] - int64_t(deps[i].jp.jp[q]); const unsigned max_dist = (q == IDX(TGL_PIPE_LONG) ? 14 : 10); assert(jp.jp[q] > deps[i].jp.jp[q]); if (dist <= max_dist) { p = (p && IDX(p) != q ? TGL_PIPE_ALL : tgl_pipe(TGL_PIPE_FLOAT + q)); min_dist = MIN3(min_dist, dist, 7); } } } } return { p ? min_dist : 0, p }; } bool find_ordered_dependency(const dependency_list &deps, const ordered_address &jp, bool exec_all) { return ordered_dependency_swsb(deps, jp, exec_all).regdist; } tgl_sbid_mode find_unordered_dependency(const dependency_list &deps, tgl_sbid_mode unordered, bool exec_all) { if (unordered) { for (unsigned i = 0; i < deps.size(); i++) { if ((unordered & deps[i].unordered) && exec_all >= deps[i].exec_all) return deps[i].unordered; } } return TGL_SBID_NULL; } tgl_sbid_mode baked_unordered_dependency_mode(const struct intel_device_info *devinfo, const fs_inst *inst, const dependency_list &deps, const ordered_address &jp) { const bool exec_all = inst->force_writemask_all; const bool has_ordered = find_ordered_dependency(deps, jp, exec_all); const tgl_pipe ordered_pipe = ordered_dependency_swsb(deps, jp, exec_all).pipe; if (find_unordered_dependency(deps, TGL_SBID_SET, exec_all)) return find_unordered_dependency(deps, TGL_SBID_SET, exec_all); else if (has_ordered && is_unordered(inst)) return TGL_SBID_NULL; else if (find_unordered_dependency(deps, TGL_SBID_DST, exec_all) && (!has_ordered || ordered_pipe == inferred_sync_pipe(devinfo, inst))) return find_unordered_dependency(deps, TGL_SBID_DST, exec_all); else if (!has_ordered) return find_unordered_dependency(deps, TGL_SBID_SRC, exec_all); else return TGL_SBID_NULL; } bool baked_ordered_dependency_mode(const struct intel_device_info *devinfo, const fs_inst *inst, const dependency_list &deps, const ordered_address &jp) { const bool exec_all = inst->force_writemask_all; const bool has_ordered = find_ordered_dependency(deps, jp, exec_all); const tgl_pipe ordered_pipe = ordered_dependency_swsb(deps, jp, exec_all).pipe; const tgl_sbid_mode unordered_mode = baked_unordered_dependency_mode(devinfo, inst, deps, jp); if (!has_ordered) return false; else if (!unordered_mode) return true; else return ordered_pipe == inferred_sync_pipe(devinfo, inst) && unordered_mode == (is_unordered(inst) ? TGL_SBID_SET : TGL_SBID_DST); } void update_inst_scoreboard(const fs_visitor *shader, const ordered_address *jps, const fs_inst *inst, unsigned ip, scoreboard &sb) { const bool exec_all = inst->force_writemask_all; const struct intel_device_info *devinfo = shader->devinfo; const tgl_pipe p = inferred_exec_pipe(devinfo, inst); const ordered_address jp = p ? ordered_address(p, jps[ip].jp[IDX(p)]) : ordered_address(); const bool is_ordered = ordered_unit(devinfo, inst, IDX(TGL_PIPE_ALL)); for (unsigned i = 0; i < inst->sources; i++) { const dependency rd_dep = (inst->is_payload(i) || inst->is_math()) ? dependency(TGL_SBID_SRC, ip, exec_all) : is_ordered ? dependency(TGL_REGDIST_SRC, jp, exec_all) : dependency::done; for (unsigned j = 0; j < regs_read(inst, i); j++) { const fs_reg r = byte_offset(inst->src[i], REG_SIZE * j); sb.set(r, shadow(sb.get(r), rd_dep)); } } if (inst->reads_accumulator_implicitly()) sb.set(brw_acc_reg(8), dependency(TGL_REGDIST_SRC, jp, exec_all)); if (is_send(inst) && inst->base_mrf != -1) { const dependency rd_dep = dependency(TGL_SBID_SRC, ip, exec_all); for (unsigned j = 0; j < inst->mlen; j++) sb.set(brw_uvec_mrf(8, inst->base_mrf + j, 0), rd_dep); } const dependency wr_dep = is_unordered(inst) ? dependency(TGL_SBID_DST, ip, exec_all) : is_ordered ? dependency(TGL_REGDIST_DST, jp, exec_all) : dependency(); if (inst->writes_accumulator_implicitly(devinfo)) sb.set(brw_acc_reg(8), wr_dep); if (is_valid(wr_dep) && inst->dst.file != BAD_FILE && !inst->dst.is_null()) assign() argument
1052 gather_block_scoreboards(const fs_visitor *shader, const ordered_address *jps) gather_block_scoreboards() argument
1072 propagate_block_scoreboards(const fs_visitor *shader, const ordered_address *jps, equivalence_relation &eq) propagate_block_scoreboards() argument
1119 gather_inst_dependencies(const fs_visitor *shader, const ordered_address *jps) gather_inst_dependencies() argument
1208 allocate_inst_dependencies(const fs_visitor *shader, const dependency_list *deps0) allocate_inst_dependencies() argument
1249 emit_inst_dependencies(fs_visitor *shader, const ordered_address *jps, const dependency_list *deps) emit_inst_dependencies() argument
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/third_party/mesa3d/src/gallium/drivers/tegra/
H A Dtegra_screen.c92 tegra_screen_get_shader_param(struct pipe_screen *pscreen, unsigned shader, in tegra_screen_get_shader_param() argument
446 tegra_screen_get_compiler_options(struct pipe_screen *pscreen, enum pipe_shader_ir ir, unsigned int shader) tegra_screen_get_compiler_options() argument
/third_party/mesa3d/src/imagination/rogue/
H A Drogue.c190 static bool trans_nir_alu_fmax(struct rogue_shader *shader, nir_alu_instr *alu) in trans_nir_alu_fmax() argument
218 static bool trans_nir_alu_fmin(struct rogue_shader *shader, nir_alu_inst argument
110 rogue_to_binary(struct rogue_build_ctx *ctx, const struct rogue_shader *shader) rogue_to_binary() argument
246 trans_nir_alu_mov_imm(struct rogue_shader *shader, nir_alu_instr *alu) trans_nir_alu_mov_imm() argument
263 trans_nir_alu_mov(struct rogue_shader *shader, nir_alu_instr *alu) trans_nir_alu_mov() argument
289 trans_nir_alu_pack_unorm_4x8(struct rogue_shader *shader, nir_alu_instr *alu) trans_nir_alu_pack_unorm_4x8() argument
318 trans_nir_alu_fmul(struct rogue_shader *shader, nir_alu_instr *alu) trans_nir_alu_fmul() argument
339 trans_nir_alu_ffma(struct rogue_shader *shader, nir_alu_instr *alu) trans_nir_alu_ffma() argument
365 trans_nir_alu(struct rogue_shader *shader, nir_alu_instr *alu) trans_nir_alu() argument
393 trans_nir_intrinsic_load_input_fs(struct rogue_shader *shader, nir_intrinsic_instr *intr) trans_nir_intrinsic_load_input_fs() argument
444 trans_nir_intrinsic_load_input_vs(struct rogue_shader *shader, nir_intrinsic_instr *intr) trans_nir_intrinsic_load_input_vs() argument
478 trans_nir_intrinsic_load_input(struct rogue_shader *shader, nir_intrinsic_instr *intr) trans_nir_intrinsic_load_input() argument
495 trans_nir_intrinsic_store_output_fs(struct rogue_shader *shader, nir_intrinsic_instr *intr) trans_nir_intrinsic_store_output_fs() argument
530 trans_nir_intrinsic_store_output_vs(struct rogue_shader *shader, nir_intrinsic_instr *intr) trans_nir_intrinsic_store_output_vs() argument
564 trans_nir_intrinsic_store_output(struct rogue_shader *shader, nir_intrinsic_instr *intr) trans_nir_intrinsic_store_output() argument
581 trans_nir_intrinsic_load_ubo(struct rogue_shader *shader, nir_intrinsic_instr *intr) trans_nir_intrinsic_load_ubo() argument
621 trans_nir_intrinsic(struct rogue_shader *shader, nir_intrinsic_instr *intr) trans_nir_intrinsic() argument
641 trans_nir_load_const(struct rogue_shader *shader, nir_load_const_instr *load_const) trans_nir_load_const() argument
667 trans_nir_jump_return(struct rogue_shader *shader, nir_jump_instr *jump) trans_nir_jump_return() argument
690 trans_nir_jump(struct rogue_shader *shader, nir_jump_instr *jump) trans_nir_jump() argument
714 struct rogue_shader *shader = rogue_shader_create(ctx, stage); rogue_nir_to_rogue() local
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/third_party/mesa3d/src/gallium/drivers/r600/sfn/
H A Dsfn_nir_vectorize_vs_inputs.c346 r600_create_new_io_var(nir_shader *shader, in r600_create_new_io_var() argument
379 r600_create_new_io_vars(nir_shader *shader, nir_variable_mode mode, in r600_create_new_io_vars() argument
434 nir_shader *shader = impl->function->shader; in r600_vectorize_io_impl() local
455 r600_vectorize_vs_inputs(nir_shader *shader) r600_vectorize_vs_inputs() argument
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H A Dsfn_nir_lower_fs_out_to_vector.cpp111 bool r600_lower_fs_out_to_vector(nir_shader *shader) in r600_lower_fs_out_to_vector() argument
151 void NirLowerIOToVector::create_new_io_vars(nir_shader *shader) in create_new_io_vars() argument
206 create_new_io_var(nir_shader *shader, unsigned location, unsigned comps) create_new_io_var() argument
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/third_party/mesa3d/src/mesa/state_tracker/
H A Dst_texture.c557 enum pipe_shader_type shader = pipe_shader_type_from_mesa(prog->info.stage); in st_make_bound_samplers_resident() local
604 enum pipe_shader_type shader = pipe_shader_type_from_mesa(prog->info.stage); in st_make_bound_images_resident() local
432 st_destroy_bound_texture_handles_per_stage(struct st_context *st, enum pipe_shader_type shader) st_destroy_bound_texture_handles_per_stage() argument
472 st_destroy_bound_image_handles_per_stage(struct st_context *st, enum pipe_shader_type shader) st_destroy_bound_image_handles_per_stage() argument
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