| /kernel/linux/linux-5.10/drivers/gpu/drm/amd/amdgpu/ |
| H A D | gfx_v9_4.c | 93 gfx_v9_4_select_se_sh(struct amdgpu_device *adev, u32 se_num, u32 sh_num, u32 instance) gfx_v9_4_select_se_sh() argument
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| H A D | amdgpu_kms.c | 680 unsigned int sh_num = (info->read_mmr_reg.instance >> in amdgpu_info_ioctl() local
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| H A D | nv.c | 218 nv_read_indexed_register(struct amdgpu_device *adev, u32 se_num, u32 sh_num, u32 reg_offset) nv_read_indexed_register() argument
235 nv_get_register_value(struct amdgpu_device *adev, bool indexed, u32 se_num, u32 sh_num, u32 reg_offset) nv_get_register_value() argument
248 nv_read_register(struct amdgpu_device *adev, u32 se_num, u32 sh_num, u32 reg_offset, u32 *value) nv_read_register() argument
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| H A D | cik.c | 1046 cik_get_register_value(struct amdgpu_device *adev, bool indexed, u32 se_num, u32 sh_num, u32 reg_offset) cik_get_register_value() argument
1142 cik_read_register(struct amdgpu_device *adev, u32 se_num, u32 sh_num, u32 reg_offset, u32 *value) cik_read_register() argument
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| H A D | si.c | 1054 si_get_register_value(struct amdgpu_device *adev, bool indexed, u32 se_num, u32 sh_num, u32 reg_offset) si_get_register_value() argument
1129 si_read_register(struct amdgpu_device *adev, u32 se_num, u32 sh_num, u32 reg_offset, u32 *value) si_read_register() argument
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| H A D | soc15.c | 344 soc15_read_indexed_register(struct amdgpu_device *adev, u32 se_num, u32 sh_num, u32 reg_offset) soc15_read_indexed_register() argument
361 soc15_get_register_value(struct amdgpu_device *adev, bool indexed, u32 se_num, u32 sh_num, u32 reg_offset) soc15_get_register_value() argument
376 soc15_read_register(struct amdgpu_device *adev, u32 se_num, u32 sh_num, u32 reg_offset, u32 *value) soc15_read_register() argument
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| H A D | vi.c | 537 vi_get_register_value(struct amdgpu_device *adev, bool indexed, u32 se_num, u32 sh_num, u32 reg_offset) vi_get_register_value() argument
633 vi_read_register(struct amdgpu_device *adev, u32 se_num, u32 sh_num, u32 reg_offset, u32 *value) vi_read_register() argument
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| H A D | gfx_v6_0.c | 1301 gfx_v6_0_select_se_sh(struct amdgpu_device *adev, u32 se_num, u32 sh_num, u32 instance) gfx_v6_0_select_se_sh() argument
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| H A D | gfx_v7_0.c | 1588 gfx_v7_0_select_se_sh(struct amdgpu_device *adev, u32 se_num, u32 sh_num, u32 instance) gfx_v7_0_select_se_sh() argument
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| H A D | gfx_v8_0.c | 3431 gfx_v8_0_select_se_sh(struct amdgpu_device *adev, u32 se_num, u32 sh_num, u32 instance) gfx_v8_0_select_se_sh() argument
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| /kernel/linux/linux-6.6/drivers/gpu/drm/amd/amdgpu/ |
| H A D | gfx_v9_4.c | 93 gfx_v9_4_select_se_sh(struct amdgpu_device *adev, u32 se_num, u32 sh_num, u32 instance) gfx_v9_4_select_se_sh() argument
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| H A D | soc21.c | 271 soc21_read_indexed_register(struct amdgpu_device *adev, u32 se_num, u32 sh_num, u32 reg_offset) soc21_read_indexed_register() argument
288 soc21_get_register_value(struct amdgpu_device *adev, bool indexed, u32 se_num, u32 sh_num, u32 reg_offset) soc21_get_register_value() argument
301 soc21_read_register(struct amdgpu_device *adev, u32 se_num, u32 sh_num, u32 reg_offset, u32 *value) soc21_read_register() argument
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| H A D | amdgpu_kms.c | 730 unsigned int sh_num = (info->read_mmr_reg.instance >> in amdgpu_info_ioctl() local
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| H A D | nv.c | 358 nv_read_indexed_register(struct amdgpu_device *adev, u32 se_num, u32 sh_num, u32 reg_offset) nv_read_indexed_register() argument
375 nv_get_register_value(struct amdgpu_device *adev, bool indexed, u32 se_num, u32 sh_num, u32 reg_offset) nv_get_register_value() argument
388 nv_read_register(struct amdgpu_device *adev, u32 se_num, u32 sh_num, u32 reg_offset, u32 *value) nv_read_register() argument
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| H A D | gfx_v9_4_2.c | 849 gfx_v9_4_2_select_se_sh(struct amdgpu_device *adev, u32 se_num, u32 sh_num, u32 instance) gfx_v9_4_2_select_se_sh() argument
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| H A D | cik.c | 1122 cik_get_register_value(struct amdgpu_device *adev, bool indexed, u32 se_num, u32 sh_num, u32 reg_offset) cik_get_register_value() argument
1218 cik_read_register(struct amdgpu_device *adev, u32 se_num, u32 sh_num, u32 reg_offset, u32 *value) cik_read_register() argument
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| H A D | soc15.c | 380 soc15_read_indexed_register(struct amdgpu_device *adev, u32 se_num, u32 sh_num, u32 reg_offset) soc15_read_indexed_register() argument
397 soc15_get_register_value(struct amdgpu_device *adev, bool indexed, u32 se_num, u32 sh_num, u32 reg_offset) soc15_get_register_value() argument
412 soc15_read_register(struct amdgpu_device *adev, u32 se_num, u32 sh_num, u32 reg_offset, u32 *value) soc15_read_register() argument
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| H A D | gfx_v6_0.c | 1287 gfx_v6_0_select_se_sh(struct amdgpu_device *adev, u32 se_num, u32 sh_num, u32 instance, int xcc_id) gfx_v6_0_select_se_sh() argument
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| H A D | si.c | 1164 si_get_register_value(struct amdgpu_device *adev, bool indexed, u32 se_num, u32 sh_num, u32 reg_offset) si_get_register_value() argument
1239 si_read_register(struct amdgpu_device *adev, u32 se_num, u32 sh_num, u32 reg_offset, u32 *value) si_read_register() argument
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| H A D | vi.c | 745 vi_get_register_value(struct amdgpu_device *adev, bool indexed, u32 se_num, u32 sh_num, u32 reg_offset) vi_get_register_value() argument
841 vi_read_register(struct amdgpu_device *adev, u32 se_num, u32 sh_num, u32 reg_offset, u32 *value) vi_read_register() argument
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| H A D | gfx_v7_0.c | 1552 gfx_v7_0_select_se_sh(struct amdgpu_device *adev, u32 se_num, u32 sh_num, u32 instance, int xcc_id) gfx_v7_0_select_se_sh() argument
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| H A D | gfx_v8_0.c | 3397 gfx_v8_0_select_se_sh(struct amdgpu_device *adev, u32 se_num, u32 sh_num, u32 instance, int xcc_id) gfx_v8_0_select_se_sh() argument
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| H A D | gfx_v11_0.c | 1531 gfx_v11_0_select_se_sh(struct amdgpu_device *adev, u32 se_num, u32 sh_num, u32 instance, int xcc_id) gfx_v11_0_select_se_sh() argument
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| /third_party/mesa3d/src/imagination/rogue/ |
| H A D | rogue.c | 609 size_t sh_num = rogue_ubo_reg(ubo_data, desc_set, binding, offset); in trans_nir_intrinsic_load_ubo() local
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| /kernel/linux/linux-5.10/drivers/gpu/drm/radeon/ |
| H A D | si.c | 2951 si_select_se_sh(struct radeon_device *rdev, u32 se_num, u32 sh_num) si_select_se_sh() argument
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