| /third_party/mesa3d/src/compiler/glsl/ |
| H A D | ir_reader.cpp | 80 _mesa_glsl_read_ir(_mesa_glsl_parse_state *state, exec_list *instructions, in _mesa_glsl_read_ir() argument
88 ir_reader::read(exec_list *instructions, const char *src, bool scan_for_protos) in read() argument
166 ir_reader::scan_for_prototypes(exec_list *instructions, s_expression *expr) in scan_for_prototypes() argument
310 ir_reader::read_instructions(exec_list *instructions, s_expressio argument
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| H A D | ast_function.cpp | 37 process_parameters(exec_list *instructions, exec_list *actual_parameters, in process_parameters() argument
546 generate_call(exec_list *instructions, ir_function_signature *sig, in generate_call() argument
758 generate_array_index(void *mem_ctx, exec_list *instructions, in generate_array_index() argument
1181 process_vec_mat_constructor(exec_list *instructions, const glsl_type *constructor_type, YYLTYPE *loc, exec_list *parameters, struct _mesa_glsl_parse_state *state) process_vec_mat_constructor() argument
1432 emit_inline_vector_constructor(const glsl_type *type, exec_list *instructions, exec_list *parameters, void *ctx) emit_inline_vector_constructor() argument
1636 emit_inline_matrix_constructor(const glsl_type *type, exec_list *instructions, exec_list *parameters, void *ctx) emit_inline_matrix_constructor() argument
1904 emit_inline_record_constructor(const glsl_type *type, exec_list *instructions, exec_list *parameters, void *mem_ctx) emit_inline_record_constructor() argument
1938 process_record_constructor(exec_list *instructions, const glsl_type *constructor_type, YYLTYPE *loc, exec_list *parameters, struct _mesa_glsl_parse_state *state) process_record_constructor() argument
2018 handle_method(exec_list *instructions, struct _mesa_glsl_parse_state *state) handle_method() argument
2104 hir(exec_list *instructions, struct _mesa_glsl_parse_state *state) hir() argument
2531 hir(exec_list *instructions, struct _mesa_glsl_parse_state *state) hir() argument
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| H A D | linker.cpp | 1371 exec_list *instructions; in remap_variables() member in __anon7179::find_assignment_visitor::remap_visitor
1403 move_non_declarations(exec_list *instructions, exec_node *last, in move_non_declarations() argument
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| /third_party/node/deps/v8/src/wasm/ |
| H A D | wasm-code-manager.h | 254 base::Vector<byte> instructions() const { in instructions() function in v8::internal::wasm::final
388 WasmCode(NativeModule* native_module, int index, base::Vector<byte> instructions, int stack_slots, uint32_t tagged_parameter_slots, int safepoint_table_offset, int handler_table_offset, int constant_pool_offset, int code_comments_offset, int unpadded_binary_size, base::Vector<const byte> protected_instructions_data, base::Vector<const byte> reloc_info, base::Vector<const byte> source_position_table, Kind kind, ExecutionTier tier, ForDebugging for_debugging) WasmCode() argument
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| H A D | wasm-serialization.cc | 753 base::Vector<uint8_t> instructions = ReadCode() local
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| /third_party/mesa3d/src/panfrost/midgard/ |
| H A D | midgard_schedule.c | 66 add_dependency(struct util_dynarray *table, unsigned index, uint16_t mask, midgard_instruction **instructions, unsigned child) in add_dependency() argument
99 mir_create_dependency_graph(midgard_instruction **instructions, unsigne argument
296 mir_initialize_worklist(BITSET_WORD *worklist, midgard_instruction **instructions, unsigned count) mir_initialize_worklist() argument
309 mir_update_worklist( BITSET_WORD *worklist, unsigned count, midgard_instruction **instructions, midgard_instruction *done) mir_update_worklist() argument
655 mir_choose_instruction( midgard_instruction **instructions, uint16_t *liveness, BITSET_WORD *worklist, unsigned count, struct midgard_predicate *predicate) mir_choose_instruction() argument
793 mir_choose_bundle( midgard_instruction **instructions, uint16_t *liveness, BITSET_WORD *worklist, unsigned count, unsigned num_ldst) mir_choose_bundle() argument
841 mir_choose_alu(midgard_instruction **slot, midgard_instruction **instructions, uint16_t *liveness, BITSET_WORD *worklist, unsigned len, struct midgard_predicate *predicate, unsigned unit) mir_choose_alu() argument
876 mir_comparison_mobile( compiler_context *ctx, midgard_instruction **instructions, struct midgard_predicate *predicate, unsigned count, unsigned cond) mir_comparison_mobile() argument
931 mir_schedule_comparison( compiler_context *ctx, midgard_instruction **instructions, struct midgard_predicate *predicate, BITSET_WORD *worklist, unsigned count, unsigned cond, bool vector, unsigned *swizzle, midgard_instruction *user) mir_schedule_comparison() argument
964 mir_schedule_condition(compiler_context *ctx, struct midgard_predicate *predicate, BITSET_WORD *worklist, unsigned count, midgard_instruction **instructions, midgard_instruction *last) mir_schedule_condition() argument
1019 mir_schedule_texture( midgard_instruction **instructions, uint16_t *liveness, BITSET_WORD *worklist, unsigned len, bool is_vertex) mir_schedule_texture() argument
1049 mir_schedule_ldst( midgard_instruction **instructions, uint16_t *liveness, BITSET_WORD *worklist, unsigned len, unsigned *num_ldst) mir_schedule_ldst() argument
1089 mir_schedule_zs_write( compiler_context *ctx, struct midgard_predicate *predicate, midgard_instruction **instructions, uint16_t *liveness, BITSET_WORD *worklist, unsigned len, midgard_instruction *branch, midgard_instruction **smul, midgard_instruction **vadd, midgard_instruction **vlut, bool stencil) mir_schedule_zs_write() argument
1157 mir_schedule_alu( compiler_context *ctx, midgard_instruction **instructions, uint16_t *liveness, BITSET_WORD *worklist, unsigned len) mir_schedule_alu() argument
1426 midgard_instruction **instructions = flatten_mir(block, &len); schedule_block() local
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| H A D | compiler.h | 215 midgard_instruction *instructions[6]; member
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| /third_party/mesa3d/src/nouveau/codegen/ |
| H A D | nv50_ir_driver.h | 148 uint32_t instructions; member
|
| /third_party/node/deps/v8/src/compiler/backend/ |
| H A D | code-generator.h | 142 InstructionSequence* instructions() const { return instructions_; } in instructions() function in v8::internal::compiler::final
|
| H A D | code-generator.cc | 44 CodeGenerator(Zone* codegen_zone, Frame* frame, Linkage* linkage, InstructionSequence* instructions, OptimizedCompilationInfo* info, Isolate* isolate, base::Optional<OsrHelper> osr_helper, int start_source_position, JumpOptimizationInfo* jump_opt, const AssemblerOptions& options, Builtin builtin, size_t max_unoptimized_frame_height, size_t max_pushed_argument_count, const char* debug_name) CodeGenerator() argument
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| /third_party/node/deps/v8/src/compiler/ |
| H A D | graph-visualizer.cc | 564 PrintSchedule(const char* phase, const Schedule* schedule, const SourcePositionTable* positions, const InstructionSequence* instructions) PrintSchedule() argument
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| /third_party/mesa3d/src/gallium/drivers/radeonsi/ |
| H A D | si_debug.c | 916 struct si_shader_inst *instructions = in si_print_annotated_shader() local
838 si_add_split_disasm(struct si_screen *screen, struct ac_rtld_binary *rtld_binary, struct si_shader_binary *binary, uint64_t *addr, unsigned *num, struct si_shader_inst *instructions, gl_shader_stage stage, unsigned wave_size) si_add_split_disasm() argument
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| H A D | radeon_uvd_enc.h | 243 } instructions[RENC_UVD_SLICE_HEADER_TEMPLATE_MAX_NUM_INSTRUCTIONS]; member
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| /third_party/mesa3d/src/gallium/auxiliary/gallivm/ |
| H A D | lp_bld_tgsi.h | 313 struct tgsi_full_instruction *instructions; member
402 struct tgsi_full_instruction *instructions; member
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| /third_party/mesa3d/src/amd/compiler/ |
| H A D | aco_lower_to_hw_instr.cpp | 38 std::vector<aco_ptr<Instruction>> instructions; member
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| H A D | aco_register_allocation.cpp | 1992 get_reg_phi(ra_ctx& ctx, IDSet& live_in, RegisterFile& register_file, std::vector<aco_ptr<Instruction>>& instructions, Block& block, aco_ptr<Instruction>& phi, Temp tmp) get_reg_phi() argument
2053 get_regs_for_phis(ra_ctx& ctx, Block& block, RegisterFile& register_file, std::vector<aco_ptr<Instruction>>& instructions, IDSet& live_in) get_regs_for_phis() argument
2676 std::vector<aco_ptr<Instruction>> instructions; register_allocation() local
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| H A D | aco_optimizer.cpp | 503 std::vector<aco_ptr<Instruction>> instructions; member
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| /third_party/mesa3d/src/asahi/compiler/ |
| H A D | agx_compiler.h | 347 struct list_head instructions; member
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| /third_party/mesa3d/src/panfrost/bifrost/ |
| H A D | bi_schedule.c | 37 bi_instr **instructions; member
427 bi_instr **instructions = malloc(sizeof(bi_instr *) * (*len)); bi_flatten_block() local
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| /third_party/mesa3d/src/panfrost/util/ |
| H A D | pan_ir.h | 387 struct list_head instructions; member
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| /third_party/skia/src/core/ |
| H A D | SkVM.cpp | 157 std::vector<InterpreterInstruction> instructions; member
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| /third_party/python/Objects/ |
| H A D | codeobject.c | 1449 deopt_code(_Py_CODEUNIT *instructions, Py_ssize_t len) in deopt_code() argument
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| /third_party/mesa3d/src/gallium/drivers/vc4/ |
| H A D | vc4_qir.h | 357 struct list_head instructions; member
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| /third_party/skia/third_party/externals/freetype/include/freetype/internal/ |
| H A D | tttypes.h | 1753 FT_Byte* instructions; member
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| /third_party/python/Python/ |
| H A D | specialize.c | 264 _Py_CODEUNIT *instructions = _PyCode_CODE(code); in _PyCode_Quicken() local
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