Lines Matching defs:instructions

157         std::vector<InterpreterInstruction> instructions;
398 o->writeDecAsText(fImpl->instructions.size());
399 o->writeText(" instructions:\n");
400 for (Val i = 0; i < (Val)fImpl->instructions.size(); i++) {
405 const InterpreterInstruction& inst = fImpl->instructions[i];
507 // After removing non-live instructions, we can be left with redundant back-to-back
508 // trace_line instructions. (e.g. one line could have multiple statements on it.)
644 // Most instructions produce a value and return it by ID,
1837 // The REX prefix is used to extend most old 32-bit instructions to 64-bit.
1964 opcode |= 0b1000'0000; // top bit set for instructions with any immediate
1980 // These don't work quite like the other instructions with immediates:
2082 // Shift instructions encode their opcode extension as "dst", dst as x, and x as y.
2109 // A bit unusual among the instructions we use, this is 64-bit operation, so we set W.
2279 // Unlike most instructions, no aliasing is permitted here.
2523 // The instructions all currently point to l->offset.
2531 // ref points to a 32-bit instruction with 19-bit displacement in instructions.
2538 disp += delta/4; // delta is in bytes, we want instructions.
2612 SkOpts::interpret_skvm(fImpl->instructions.data(), (int)fImpl->instructions.size(),
2619 void Program::setupLLVM(const std::vector<OptimizedInstruction>& instructions,
2658 std::vector<llvm::Value*> vals(instructions.size());
2661 auto [op, x,y,z,w, immA,immB,immC, death,can_hoist] = instructions[i];
2865 // Hoisted instructions will need args (think, uniforms), so set that up now.
2875 for (size_t i = 0; i < instructions.size(); i++) {
2876 if (instructions[i].can_hoist && !emit(i, false, &b)) {
2906 for (size_t i = 0; i < instructions.size(); i++) {
2907 if (!instructions[i].can_hoist && !emit(i, false, &b)) {
2931 for (size_t i = 0; i < instructions.size(); i++) {
2932 if (instructions[i].can_hoist && !emit(i, true, &b)) {
2960 for (size_t i = 0; i < instructions.size(); i++) {
2961 if (!instructions[i].can_hoist && !emit(i, true, &b)) {
3084 Program::Program(const std::vector<OptimizedInstruction>& instructions,
3090 this->setupLLVM(instructions, debug_name);
3092 this->setupJIT(instructions, debug_name);
3097 this->setupInterpreter(instructions);
3100 std::vector<InterpreterInstruction> Program::instructions() const { return fImpl->instructions; }
3104 bool Program::empty() const { return fImpl->instructions.empty(); }
3107 void Program::setupInterpreter(const std::vector<OptimizedInstruction>& instructions) {
3109 std::vector<Reg> reg(instructions.size());
3125 const OptimizedInstruction& inst = instructions[id];
3130 if (input != NA && instructions[input].death == id) {
3155 for (Val id = 0; id < (Val)instructions.size(); id++) {
3156 if ( instructions[id].can_hoist) { assign_register(id); }
3158 for (Val id = 0; id < (Val)instructions.size(); id++) {
3159 if (!instructions[id].can_hoist) { assign_register(id); }
3163 // registers. This will be two passes, first hoisted instructions, then inside the loop.
3167 fImpl->instructions.reserve(instructions.size());
3188 fImpl->instructions.push_back(pinst);
3191 for (Val id = 0; id < (Val)instructions.size(); id++) {
3192 const OptimizedInstruction& inst = instructions[id];
3198 for (Val id = 0; id < (Val)instructions.size(); id++) {
3199 const OptimizedInstruction& inst = instructions[id];
3216 bool Program::jit(const std::vector<OptimizedInstruction>& instructions,
3236 std::vector<int> stack_slot(instructions.size(), NA);
3348 if (instructions[v].op == Op::splat) {
3349 if (instructions[v].immA == 0) {
3352 a->vmovups(r, constants.find(instructions[v].immA));
3384 if (instructions[v].op == Op::splat) {
3385 if (instructions[v].immA == 0) {
3388 a->ldrq(r, constants.find(instructions[v].immA));
3410 const OptimizedInstruction& inst = instructions[id];
3426 && instructions[v].op != Op::splat; // No need to spill constants.
3548 return instructions[v].death == id;
3588 if (instructions[v].op == Op::splat) {
3589 return constants.find(instructions[v].immA);
3837 // We can swap the arguments of symmetric instructions to make better use of any().
4266 for (Val id = 0; id < (Val)instructions.size(); id++) {
4267 if (instructions[id].can_hoist && !emit(id, /*scalar=*/false)) {
4294 for (Val id = 0; id < (Val)instructions.size(); id++) {
4295 if (!instructions[id].can_hoist && !emit(id, /*scalar=*/false)) {
4313 for (Val id = 0; id < (Val)instructions.size(); id++) {
4314 if (!instructions[id].can_hoist && !emit(id, /*scalar=*/true)) {
4333 // Except for explicit aligned load and store instructions, AVX allows
4364 void Program::setupJIT(const std::vector<OptimizedInstruction>& instructions,
4371 if (!this->jit(instructions, &stack_hint, &registers_used, &a)) {
4381 SkAssertResult(this->jit(instructions, &stack_hint, &registers_used, &a));