| /third_party/mesa3d/src/microsoft/vulkan/ |
| H A D | dzn_pipeline.c | 275 adjust_resource_index_binding(struct nir_builder *builder, nir_instr *instr, in adjust_resource_index_binding() argument
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| /third_party/mesa3d/src/panfrost/bifrost/ |
| H A D | bi_schedule.c | 875 bi_tuple_is_new_src(bi_instr *instr, struct bi_reg_state *reg, unsigned src_idx) in bi_tuple_is_new_src() argument 983 bi_write_count(bi_instr *instr, uint64_ argument 786 bi_update_fau(struct bi_clause_state *clause, struct bi_tuple_state *tuple, bi_instr *instr, bool fma, bool destructive) bi_update_fau() argument 1021 bi_numerically_incompatible(struct bi_clause_state *clause, bi_instr *instr) bi_numerically_incompatible() argument 1035 bi_instr_schedulable(bi_instr *instr, struct bi_clause_state *clause, struct bi_tuple_state *tuple, uint64_t live_after_temp, bool fma) bi_instr_schedulable() argument 1151 bi_instr_cost(bi_instr *instr, struct bi_tuple_state *tuple) bi_instr_cost() argument 1185 bi_instr *instr = st.instructions[i]; bi_choose_index() local 1207 bi_pop_instr(struct bi_clause_state *clause, struct bi_tuple_state *tuple, bi_instr *instr, uint64_t live_after_temp, bool fma) bi_pop_instr() argument [all...] |
| /third_party/mesa3d/src/gallium/auxiliary/gallivm/ |
| H A D | lp_bld_nir.c | 669 do_alu_action(struct lp_build_nir_context *bld_base, const nir_alu_instr *instr, unsigned src_bit_size[NIR_MAX_VEC_COMPONENTS], LLVMValueRef src[NIR_MAX_VEC_COMPONENTS]) do_alu_action() argument 1185 visit_alu(struct lp_build_nir_context *bld_base, const nir_alu_instr *instr) visit_alu() argument 1300 visit_load_const(struct lp_build_nir_context *bld_base, const nir_load_const_instr *instr) visit_load_const() argument 1310 get_deref_offset(struct lp_build_nir_context *bld_base, nir_deref_instr *instr, bool vs_in, unsigned *vertex_index_out, LLVMValueRef *vertex_index_ref, unsigned *const_out, LLVMValueRef *indir_out) get_deref_offset() argument 1382 visit_load_input(struct lp_build_nir_context *bld_base, nir_intrinsic_instr *instr, LLVMValueRef result[NIR_MAX_VEC_COMPONENTS]) visit_load_input() argument 1405 visit_store_output(struct lp_build_nir_context *bld_base, nir_intrinsic_instr *instr) visit_store_output() argument 1435 visit_load_var(struct lp_build_nir_context *bld_base, nir_intrinsic_instr *instr, LLVMValueRef result[NIR_MAX_VEC_COMPONENTS]) visit_load_var() argument 1474 visit_store_var(struct lp_build_nir_context *bld_base, nir_intrinsic_instr *instr) visit_store_var() argument 1500 visit_load_ubo(struct lp_build_nir_context *bld_base, nir_intrinsic_instr *instr, LLVMValueRef result[NIR_MAX_VEC_COMPONENTS]) visit_load_ubo() argument 1518 visit_load_push_constant(struct lp_build_nir_context *bld_base, nir_intrinsic_instr *instr, LLVMValueRef result[4]) visit_load_push_constant() argument 1534 visit_load_ssbo(struct lp_build_nir_context *bld_base, nir_intrinsic_instr *instr, LLVMValueRef result[NIR_MAX_VEC_COMPONENTS]) visit_load_ssbo() argument 1547 visit_store_ssbo(struct lp_build_nir_context *bld_base, nir_intrinsic_instr *instr) visit_store_ssbo() argument 1562 visit_get_ssbo_size(struct lp_build_nir_context *bld_base, nir_intrinsic_instr *instr, LLVMValueRef result[NIR_MAX_VEC_COMPONENTS]) visit_get_ssbo_size() argument 1574 visit_ssbo_atomic(struct lp_build_nir_context *bld_base, nir_intrinsic_instr *instr, LLVMValueRef result[NIR_MAX_VEC_COMPONENTS]) visit_ssbo_atomic() argument 1593 visit_load_image(struct lp_build_nir_context *bld_base, nir_intrinsic_instr *instr, LLVMValueRef result[NIR_MAX_VEC_COMPONENTS]) visit_load_image() argument 1633 visit_store_image(struct lp_build_nir_context *bld_base, nir_intrinsic_instr *instr) visit_store_image() argument 1675 visit_atomic_image(struct lp_build_nir_context *bld_base, nir_intrinsic_instr *instr, LLVMValueRef result[NIR_MAX_VEC_COMPONENTS]) visit_atomic_image() argument 1761 visit_image_size(struct lp_build_nir_context *bld_base, nir_intrinsic_instr *instr, LLVMValueRef result[NIR_MAX_VEC_COMPONENTS]) visit_image_size() argument 1784 visit_image_samples(struct lp_build_nir_context *bld_base, nir_intrinsic_instr *instr, LLVMValueRef result[NIR_MAX_VEC_COMPONENTS]) visit_image_samples() argument 1808 visit_shared_load(struct lp_build_nir_context *bld_base, nir_intrinsic_instr *instr, LLVMValueRef result[NIR_MAX_VEC_COMPONENTS]) visit_shared_load() argument 1820 visit_shared_store(struct lp_build_nir_context *bld_base, nir_intrinsic_instr *instr) visit_shared_store() argument 1834 visit_shared_atomic(struct lp_build_nir_context *bld_base, nir_intrinsic_instr *instr, LLVMValueRef result[NIR_MAX_VEC_COMPONENTS]) visit_shared_atomic() argument 1857 visit_discard(struct lp_build_nir_context *bld_base, nir_intrinsic_instr *instr) visit_discard() argument 1870 visit_load_kernel_input(struct lp_build_nir_context *bld_base, nir_intrinsic_instr *instr, LLVMValueRef result[NIR_MAX_VEC_COMPONENTS]) visit_load_kernel_input() argument 1885 visit_load_global(struct lp_build_nir_context *bld_base, nir_intrinsic_instr *instr, LLVMValueRef result[NIR_MAX_VEC_COMPONENTS]) visit_load_global() argument 1898 visit_store_global(struct lp_build_nir_context *bld_base, nir_intrinsic_instr *instr) visit_store_global() argument 1913 visit_global_atomic(struct lp_build_nir_context *bld_base, nir_intrinsic_instr *instr, LLVMValueRef result[NIR_MAX_VEC_COMPONENTS]) visit_global_atomic() argument 1930 visit_shuffle(struct lp_build_nir_context *bld_base, nir_intrinsic_instr *instr, LLVMValueRef dst[4]) visit_shuffle() argument 1945 visit_interp(struct lp_build_nir_context *bld_base, nir_intrinsic_instr *instr, LLVMValueRef result[NIR_MAX_VEC_COMPONENTS]) visit_interp() argument 1977 visit_load_scratch(struct lp_build_nir_context *bld_base, nir_intrinsic_instr *instr, LLVMValueRef result[NIR_MAX_VEC_COMPONENTS]) visit_load_scratch() argument 1989 visit_store_scratch(struct lp_build_nir_context *bld_base, nir_intrinsic_instr *instr) visit_store_scratch() argument 2002 visit_intrinsic(struct lp_build_nir_context *bld_base, nir_intrinsic_instr *instr) visit_intrinsic() argument 2220 visit_txs(struct lp_build_nir_context *bld_base, nir_tex_instr *instr) visit_txs() argument 2278 visit_tex(struct lp_build_nir_context *bld_base, nir_tex_instr *instr) visit_tex() argument 2502 visit_ssa_undef(struct lp_build_nir_context *bld_base, const nir_ssa_undef_instr *instr) visit_ssa_undef() argument 2517 visit_jump(struct lp_build_nir_context *bld_base, const nir_jump_instr *instr) visit_jump() argument 2534 visit_deref(struct lp_build_nir_context *bld_base, nir_deref_instr *instr) visit_deref() argument [all...] |
| /third_party/mesa3d/src/gallium/drivers/r600/sfn/ |
| H A D | sfn_instr_alu.cpp | 681 auto instr = new AluInstr(m_opcode, dst, src, {}, 1); in split() local 703 sfn_log << SfnLog::instr << " " << *instr << "\\n"; split() local 1070 visit(AluGroup *instr) visit() argument 1078 visit(Block *instr) visit() argument 1084 visit(IfInstr *instr) visit() argument 2157 emit_create_vec(const nir_alu_instr& instr, unsigned nc, Shader& shader) emit_create_vec() argument [all...] |
| /third_party/skia/third_party/externals/spirv-tools/source/opt/ |
| H A D | ir_context.h | 279 BasicBlock* get_instr_block(Instruction* instr) { in get_instr_block() argument
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| /third_party/skia/third_party/externals/swiftshader/third_party/SPIRV-Tools/source/opt/ |
| H A D | ir_context.h | 279 BasicBlock* get_instr_block(Instruction* instr) { in get_instr_block() argument
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AMDGPU/ |
| H A D | AMDILCFGStructurizer.cpp | 601 MachineInstr *instr = &(*It); in getLastDebugLocInBB() local 636 MachineInstr *instr = &(*It); in getReturnInstr() local [all...] |
| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/NVPTX/ |
| H A D | NVPTXAsmPrinter.cpp | 738 const Instruction *instr = cast<Instruction>(U); in emitDeclarations() local
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| /third_party/spirv-tools/source/opt/ |
| H A D | ir_context.h | 307 BasicBlock* get_instr_block(Instruction* instr) { in get_instr_block() argument
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| /third_party/spirv-tools/source/val/ |
| H A D | validate_extensions.cpp | 1005 IsConstIntScalarTypeWith32Or64Bits(ValidationState_t& _, Instruction* instr) IsConstIntScalarTypeWith32Or64Bits() argument
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| /third_party/mesa3d/src/freedreno/ir3/ |
| H A D | ir3_ra.c | 757 struct ir3_instruction *instr = dst->instr; in check_dst_overlap() local 1453 assign_reg(struct ir3_instruction *instr, struct ir3_register *reg, unsigned num) assign_reg() argument 1563 assign_src(struct ra_ctx *ctx, struct ir3_instruction *instr, struct ir3_register *src) assign_src() argument 1588 insert_parallel_copy_instr(struct ra_ctx *ctx, struct ir3_instruction *instr) insert_parallel_copy_instr() argument 1625 handle_normal_instr(struct ra_ctx *ctx, struct ir3_instruction *instr) handle_normal_instr() argument 1659 handle_split(struct ra_ctx *ctx, struct ir3_instruction *instr) handle_split() argument 1680 handle_collect(struct ra_ctx *ctx, struct ir3_instruction *instr) handle_collect() argument 1781 handle_pcopy(struct ra_ctx *ctx, struct ir3_instruction *instr) handle_pcopy() argument 1795 handle_precolored_input(struct ra_ctx *ctx, struct ir3_instruction *instr) handle_precolored_input() argument 1813 handle_input(struct ra_ctx *ctx, struct ir3_instruction *instr) handle_input() argument 1826 assign_input(struct ra_ctx *ctx, struct ir3_instruction *instr) assign_input() argument 1887 handle_chmask(struct ra_ctx *ctx, struct ir3_instruction *instr) handle_chmask() argument [all...] |
| H A D | ir3_compiler_nir.c | 43 ir3_handle_nonuniform(struct ir3_instruction *instr, in ir3_handle_nonuniform() argument 53 ir3_handle_bindless_cat6(struct ir3_instruction *instr, nir_src rsrc) in ir3_handle_bindless_cat6() argument 82 struct ir3_instruction *instr; in create_frag_input() local 1727 add_sysval_input_compmask(struct ir3_context *ctx, gl_system_value slot, unsigned compmask, struct ir3_instruction *instr) add_sysval_input_compmask() argument 2646 struct ir3_instruction *instr = ir3_SHPE(ctx->block); emit_intrinsic() local 2691 emit_load_const(struct ir3_context *ctx, nir_load_const_instr *instr) emit_load_const() argument 3485 emit_instr(struct ir3_context *ctx, nir_instr *instr) emit_instr() argument [all...] |
| /third_party/mesa3d/src/compiler/nir/ |
| H A D | nir_serialize.c | 762 read_dest(read_ctx *ctx, nir_dest *dst, nir_instr *instr, in read_dest() argument 1734 write_instr(write_ctx *ctx, const nir_instr *instr) write_instr() argument 1782 nir_instr *instr; read_instr() local [all...] |
| H A D | nir.c | 660 instr_init(nir_instr *instr, nir_instr_type type) in instr_init() argument 698 nir_alu_instr *instr = calloc(1, sizeof(nir_alu_instr) + num_srcs * sizeof(nir_alu_src)); in nir_alu_instr_create() local 714 nir_deref_instr *instr = calloc(1, sizeof(*instr)); nir_deref_instr_create() local 736 nir_jump_instr *instr = malloc(sizeof(*instr)); nir_jump_instr_create() local 752 nir_load_const_instr *instr = nir_load_const_instr_create() local 768 nir_intrinsic_instr *instr = nir_intrinsic_instr_create() local 789 nir_call_instr *instr = nir_call_instr_create() local 814 nir_tex_instr *instr = calloc(1, sizeof(*instr)); nir_tex_instr_create() local 883 nir_phi_instr *instr = malloc(sizeof(*instr)); nir_phi_instr_create() local 903 nir_phi_instr_add_src(nir_phi_instr *instr, nir_block *pred, nir_src src) nir_phi_instr_add_src() argument 919 nir_parallel_copy_instr *instr = malloc(sizeof(*instr)); nir_parallel_copy_instr_create() local 934 nir_ssa_undef_instr *instr = malloc(sizeof(*instr)); nir_ssa_undef_instr_create() local 1080 nir_instr *instr = state; add_use_cb() local 1092 nir_instr *instr = state; add_ssa_def_cb() local 1109 nir_instr *instr = state; add_reg_def_cb() local 1120 add_defs_uses(nir_instr *instr) add_defs_uses() argument 1128 nir_instr_insert(nir_cursor cursor, nir_instr *instr) nir_instr_insert() argument 1179 nir_instr_move(nir_cursor cursor, nir_instr *instr) nir_instr_move() argument 1223 remove_defs_uses(nir_instr *instr) remove_defs_uses() argument 1229 nir_instr_remove_v(nir_instr *instr) nir_instr_remove_v() argument 1252 nir_instr_free(nir_instr *instr) nir_instr_free() argument 1300 nir_instr_free_and_dce_is_live(nir_instr *instr) nir_instr_free_and_dce_is_live() argument 1335 nir_instr_dce_add_dead_ssa_srcs(nir_instr_worklist *wl, nir_instr *instr) nir_instr_dce_add_dead_ssa_srcs() argument 1345 nir_instr_free_and_dce(nir_instr *instr) nir_instr_free_and_dce() argument 1407 nir_foreach_ssa_def(nir_instr *instr, nir_foreach_ssa_def_cb cb, void *state) nir_foreach_ssa_def() argument 1433 nir_instr_ssa_def(nir_instr *instr) nir_instr_ssa_def() argument 1480 nir_instr_def_is_register(nir_instr *instr) nir_instr_def_is_register() argument 1678 nir_instr_rewrite_src(nir_instr *instr, nir_src *src, nir_src new_src) nir_instr_rewrite_src() argument 1712 nir_instr_rewrite_dest(nir_instr *instr, nir_dest *dest, nir_dest new_dest) nir_instr_rewrite_dest() argument 1737 nir_ssa_def_init(nir_instr *instr, nir_ssa_def *def, unsigned num_components, unsigned bit_size) nir_ssa_def_init() argument 1762 nir_ssa_dest_init(nir_instr *instr, nir_dest *dest, unsigned num_components, unsigned bit_size, const char *name) nir_ssa_dest_init() argument 2223 nir_instr *instr = nir_block_first_instr(block); cursor_next_instr() local 2273 nir_instr *instr; nir_function_impl_lower_instructions() local 2779 nir_image_intrinsic_coord_components(const nir_intrinsic_instr *instr) nir_image_intrinsic_coord_components() argument 2925 nir_alu_instr_is_copy(nir_alu_instr *instr) nir_alu_instr_is_copy() argument 3087 nir_alu_instr_channel_used(const nir_alu_instr *instr, unsigned src, unsigned channel) nir_alu_instr_channel_used() argument 3097 nir_alu_instr_src_read_mask(const nir_alu_instr *instr, unsigned src) nir_alu_instr_src_read_mask() argument 3110 nir_ssa_alu_instr_src_components(const nir_alu_instr *instr, unsigned src) nir_ssa_alu_instr_src_components() argument 3125 nir_alu_instr_is_comparison(const nir_alu_instr *instr) nir_alu_instr_is_comparison() argument 3209 nir_tex_instr_need_sampler(const nir_tex_instr *instr) nir_tex_instr_need_sampler() argument 3225 nir_tex_instr_result_size(const nir_tex_instr *instr) nir_tex_instr_result_size() argument 3272 nir_tex_instr_is_query(const nir_tex_instr *instr) nir_tex_instr_is_query() argument 3296 nir_tex_instr_has_implicit_derivative(const nir_tex_instr *instr) nir_tex_instr_has_implicit_derivative() argument 3309 nir_tex_instr_src_type(const nir_tex_instr *instr, unsigned src) nir_tex_instr_src_type() argument 3372 nir_tex_instr_src_size(const nir_tex_instr *instr, unsigned src) nir_tex_instr_src_size() argument 3414 nir_instr_xfb_write_mask(nir_intrinsic_instr *instr) nir_instr_xfb_write_mask() argument [all...] |
| /third_party/mesa3d/src/amd/vulkan/ |
| H A D | radv_shader.c | 127 vectorize_vec2_16bit(const nir_instr *instr, const void *_) in vectorize_vec2_16bit() argument 646 is_sincos(const nir_instr *instr, const void *_) is_sincos() argument 653 lower_sincos(struct nir_builder *b, nir_instr *instr, void *_) lower_sincos() argument [all...] |
| /third_party/mesa3d/src/broadcom/vulkan/ |
| H A D | v3dv_pipeline.c | 544 lower_load_push_constant(nir_builder *b, nir_intrinsic_instr *instr, in lower_load_push_constant() argument 591 lower_vulkan_resource_index(nir_builder *b, nir_intrinsic_instr *instr, struct lower_pipeline_layout_state *state) lower_vulkan_resource_index() argument 668 lower_tex_src_to_offset(nir_builder *b, nir_tex_instr *instr, unsigned src_idx, struct lower_pipeline_layout_state *state) lower_tex_src_to_offset() argument 774 lower_sampler(nir_builder *b, nir_tex_instr *instr, struct lower_pipeline_layout_state *state) lower_sampler() argument 809 lower_image_deref(nir_builder *b, nir_intrinsic_instr *instr, struct lower_pipeline_layout_state *state) lower_image_deref() argument 884 lower_intrinsic(nir_builder *b, nir_intrinsic_instr *instr, struct lower_pipeline_layout_state *state) lower_intrinsic() argument 929 lower_pipeline_layout_cb(nir_builder *b, nir_instr *instr, void *_state) lower_pipeline_layout_cb() argument [all...] |
| /third_party/mesa3d/src/amd/compiler/ |
| H A D | aco_register_allocation.cpp | 493 get_subdword_operand_stride(amd_gfx_level gfx_level, const aco_ptr<Instruction>& instr, unsigned idx, RegClass rc) get_subdword_operand_stride() argument 534 add_subdword_operand(ra_ctx& ctx, aco_ptr<Instruction>& instr, unsigned idx, unsigned byte, RegClass rc) add_subdword_operand() argument 601 get_subdword_definition_info(Program* program, const aco_ptr<Instruction>& instr, RegClass rc) get_subdword_definition_info() argument 675 add_subdword_definition(Program* program, aco_ptr<Instruction>& instr, PhysReg reg) add_subdword_definition() argument 766 update_renames(ra_ctx& ctx, RegisterFile& reg_file, std::vector<std::pair<Operand, Definition>>& parallelcopies, aco_ptr<Instruction>& instr, UpdateRenames flags) update_renames() argument 1040 get_reg_for_create_vector_copy(ra_ctx& ctx, RegisterFile& reg_file, std::vector<std::pair<Operand, Definition>>& parallelcopies, aco_ptr<Instruction>& instr, const PhysRegInterval def_reg, DefInfo info, unsigned id) get_reg_for_create_vector_copy() argument 1089 get_regs_for_copies(ra_ctx& ctx, RegisterFile& reg_file, std::vector<std::pair<Operand, Definition>>& parallelcopies, const std::vector<unsigned>& vars, const PhysRegInterval bounds, aco_ptr<Instruction>& instr, const PhysRegInterval def_reg) get_regs_for_copies() argument 1236 get_reg_impl(ra_ctx& ctx, RegisterFile& reg_file, std::vector<std::pair<Operand, Definition>>& parallelcopies, const DefInfo& info, aco_ptr<Instruction>& instr) get_reg_impl() argument 1384 get_reg_specified(ra_ctx& ctx, RegisterFile& reg_file, RegClass rc, aco_ptr<Instruction>& instr, PhysReg reg) get_reg_specified() argument 1520 is_mimg_vaddr_intact(ra_ctx& ctx, RegisterFile& reg_file, Instruction* instr) is_mimg_vaddr_intact() argument 1552 get_reg_vector(ra_ctx& ctx, RegisterFile& reg_file, Temp temp, aco_ptr<Instruction>& instr) get_reg_vector() argument 1605 get_reg(ra_ctx& ctx, RegisterFile& reg_file, Temp temp, std::vector<std::pair<Operand, Definition>>& parallelcopies, aco_ptr<Instruction>& instr, int operand_index = -1) get_reg() argument 1714 get_reg_create_vector(ra_ctx& ctx, RegisterFile& reg_file, Temp temp, std::vector<std::pair<Operand, Definition>>& parallelcopies, aco_ptr<Instruction>& instr) get_reg_create_vector() argument 1858 handle_pseudo(ra_ctx& ctx, const RegisterFile& reg_file, Instruction* instr) handle_pseudo() argument 1913 operand_can_use_reg(amd_gfx_level gfx_level, aco_ptr<Instruction>& instr, unsigned idx, PhysReg reg, RegClass rc) operand_can_use_reg() argument 1951 get_reg_for_operand(ra_ctx& ctx, RegisterFile& register_file, std::vector<std::pair<Operand, Definition>>& parallelcopy, aco_ptr<Instruction>& instr, Operand& operand, unsigned operand_index) get_reg_for_operand() argument 2378 aco_ptr<Instruction>& instr = *rit; get_affinities() local 2474 aco_ptr<Instruction>& instr = *rit; get_affinities() local 2545 optimize_encoding_vop2(Program* program, ra_ctx& ctx, RegisterFile& register_file, aco_ptr<Instruction>& instr) optimize_encoding_vop2() argument 2596 optimize_encoding_sopk(Program* program, ra_ctx& ctx, RegisterFile& register_file, aco_ptr<Instruction>& instr) optimize_encoding_sopk() argument 2652 optimize_encoding(Program* program, ra_ctx& ctx, RegisterFile& register_file, aco_ptr<Instruction>& instr) optimize_encoding() argument 2707 aco_ptr<Instruction>& instr = *instr_it; register_allocation() local [all...] |
| /third_party/mesa3d/src/gallium/drivers/vc4/ |
| H A D | vc4_program.c | 269 ntq_get_alu_src(struct vc4_compile *c, nir_alu_instr *instr, in ntq_get_alu_src() argument 352 ntq_emit_txf(struct vc4_compile *c, nir_tex_instr *instr) in ntq_emit_txf() argument 396 ntq_emit_tex(struct vc4_compile *c, nir_tex_instr *instr) ntq_emit_tex() argument 823 ntq_emit_pack_unorm_4x8(struct vc4_compile *c, nir_alu_instr *instr) ntq_emit_pack_unorm_4x8() argument 995 ntq_emit_bcsel(struct vc4_compile *c, nir_alu_instr *instr, struct qreg *src) ntq_emit_bcsel() argument 1057 ntq_emit_alu(struct vc4_compile *c, nir_alu_instr *instr) ntq_emit_alu() argument 1654 ntq_emit_load_const(struct vc4_compile *c, nir_load_const_instr *instr) ntq_emit_load_const() argument 1664 ntq_emit_ssa_undef(struct vc4_compile *c, nir_ssa_undef_instr *instr) ntq_emit_ssa_undef() argument 1676 ntq_emit_color_read(struct vc4_compile *c, nir_intrinsic_instr *instr) ntq_emit_color_read() argument 1696 ntq_emit_load_input(struct vc4_compile *c, nir_intrinsic_instr *instr) ntq_emit_load_input() argument 1716 ntq_emit_intrinsic(struct vc4_compile *c, nir_intrinsic_instr *instr) ntq_emit_intrinsic() argument 1990 ntq_emit_instr(struct vc4_compile *c, nir_instr *instr) ntq_emit_instr() argument [all...] |
| /third_party/node/deps/v8/src/compiler/backend/x64/ |
| H A D | code-generator-x64.cc | 40 X64OperandConverter(CodeGenerator* gen, Instruction* instr) in X64OperandConverter() argument 166 bool HasAddressingMode(Instruction* instr) { in HasAddressingMode() argument 170 bool HasImmediateInput(Instruction* instr, size_t index) { in HasImmediateInput() argument 174 bool HasRegisterInput(Instruction* instr, size_t index) { in HasRegisterInput() argument 652 WasmOutOfLineTrap(CodeGenerator* gen, Instruction* instr) in WasmOutOfLineTrap() argument 699 WasmProtectedInstructionTrap(CodeGenerator* gen, int pc, Instruction* instr) WasmProtectedInstructionTrap() argument 712 EmitOOLTrapIfNeeded(Zone* zone, CodeGenerator* codegen, InstructionCode opcode, Instruction* instr, int pc) EmitOOLTrapIfNeeded() argument 723 EmitOOLTrapIfNeeded(Zone* zone, CodeGenerator* codegen, InstructionCode opcode, Instruction* instr, int pc) EmitOOLTrapIfNeeded() argument 1065 AdjustStackPointerForTailCall(Instruction* instr, TurboAssembler* assembler, Linkage* linkage, OptimizedCompilationInfo* info, FrameAccessState* state, int new_slot_above_sp, bool allow_shrinkage = true) AdjustStackPointerForTailCall() argument 1110 AssembleTailCallBeforeGap(Instruction* instr, int first_unused_slot_offset) AssembleTailCallBeforeGap() argument 1149 AssembleTailCallAfterGap(Instruction* instr, int first_unused_slot_offset) AssembleTailCallAfterGap() argument 1164 ShouldClearOutputRegisterBeforeInstruction(CodeGenerator* g, Instruction* instr) ShouldClearOutputRegisterBeforeInstruction() argument 1184 AssembleArchInstruction( Instruction* instr) AssembleArchInstruction() argument 2324 EmitOOLTrapIfNeeded(zone(), this, opcode, instr, __ pc_offset()); AssembleArchInstruction() local 2329 EmitOOLTrapIfNeeded(zone(), this, opcode, instr, __ pc_offset()); AssembleArchInstruction() local 2334 EmitOOLTrapIfNeeded(zone(), this, opcode, instr, __ pc_offset()); AssembleArchInstruction() local 2338 EmitOOLTrapIfNeeded(zone(), this, opcode, instr, __ pc_offset()); AssembleArchInstruction() local 2343 EmitOOLTrapIfNeeded(zone(), this, opcode, instr, __ pc_offset()); AssembleArchInstruction() local 2360 EmitOOLTrapIfNeeded(zone(), this, opcode, instr, __ pc_offset()); AssembleArchInstruction() local 2365 EmitOOLTrapIfNeeded(zone(), this, opcode, instr, __ pc_offset()); AssembleArchInstruction() local 2370 EmitOOLTrapIfNeeded(zone(), this, opcode, instr, __ pc_offset()); AssembleArchInstruction() local 2374 EmitOOLTrapIfNeeded(zone(), this, opcode, instr, __ pc_offset()); AssembleArchInstruction() local 2379 EmitOOLTrapIfNeeded(zone(), this, opcode, instr, __ pc_offset()); AssembleArchInstruction() local 2396 EmitOOLTrapIfNeeded(zone(), this, opcode, instr, __ pc_offset()); AssembleArchInstruction() local 2428 EmitOOLTrapIfNeeded(zone(), this, opcode, instr, __ pc_offset()); AssembleArchInstruction() local 2495 EmitOOLTrapIfNeeded(zone(), this, opcode, instr, __ pc_offset()); AssembleArchInstruction() local 2518 EmitOOLTrapIfNeeded(zone(), this, opcode, instr, __ pc_offset()); AssembleArchInstruction() local 2528 EmitOOLTrapIfNeeded(zone(), this, opcode, instr, __ pc_offset()); AssembleArchInstruction() local 2539 EmitOOLTrapIfNeeded(zone(), this, opcode, instr, __ pc_offset()); AssembleArchInstruction() local 2833 EmitOOLTrapIfNeeded(zone(), this, opcode, instr, __ pc_offset()); AssembleArchInstruction() local 3563 EmitOOLTrapIfNeeded(zone(), this, opcode, instr, __ pc_offset()); AssembleArchInstruction() local 3576 EmitOOLTrapIfNeeded(zone(), this, opcode, instr, __ pc_offset()); AssembleArchInstruction() local 3875 EmitOOLTrapIfNeeded(zone(), this, opcode, instr, __ pc_offset()); AssembleArchInstruction() local 3881 EmitOOLTrapIfNeeded(zone(), this, opcode, instr, __ pc_offset()); AssembleArchInstruction() local 3887 EmitOOLTrapIfNeeded(zone(), this, opcode, instr, __ pc_offset()); AssembleArchInstruction() local 3892 EmitOOLTrapIfNeeded(zone(), this, opcode, instr, __ pc_offset()); AssembleArchInstruction() local 3897 EmitOOLTrapIfNeeded(zone(), this, opcode, instr, __ pc_offset()); AssembleArchInstruction() local 3902 EmitOOLTrapIfNeeded(zone(), this, opcode, instr, __ pc_offset()); AssembleArchInstruction() local 3907 EmitOOLTrapIfNeeded(zone(), this, opcode, instr, __ pc_offset()); AssembleArchInstruction() local 3912 EmitOOLTrapIfNeeded(zone(), this, opcode, instr, __ pc_offset()); AssembleArchInstruction() local 3917 EmitOOLTrapIfNeeded(zone(), this, opcode, instr, __ pc_offset()); AssembleArchInstruction() local 3922 EmitOOLTrapIfNeeded(zone(), this, opcode, instr, __ pc_offset()); AssembleArchInstruction() local 3927 EmitOOLTrapIfNeeded(zone(), this, opcode, instr, __ pc_offset()); AssembleArchInstruction() local 3935 EmitOOLTrapIfNeeded(zone(), this, opcode, instr, __ pc_offset()); AssembleArchInstruction() local 4458 AssembleArchBranch(Instruction* instr, BranchInfo* branch) AssembleArchBranch() argument 4473 AssembleArchDeoptBranch(Instruction* instr, BranchInfo* branch) AssembleArchDeoptBranch() argument 4520 AssembleArchTrap(Instruction* instr, FlagsCondition condition) AssembleArchTrap() argument 4536 AssembleArchBoolean(Instruction* instr, FlagsCondition condition) AssembleArchBoolean() argument 4563 AssembleArchBinarySearchSwitch(Instruction* instr) AssembleArchBinarySearchSwitch() argument 4574 AssembleArchTableSwitch(Instruction* instr) AssembleArchTableSwitch() argument 4589 AssembleArchSelect(Instruction* instr, FlagsCondition condition) AssembleArchSelect() argument [all...] |
| /third_party/node/deps/v8/src/compiler/backend/s390/ |
| H A D | code-generator-s390.cc | 32 S390OperandConverter(CodeGenerator* gen, Instruction* instr) in S390OperandConverter() argument 141 static inline bool HasRegisterOutput(Instruction* instr, int index = 0) { in HasRegisterOutput() argument 145 static inline bool HasFPRegisterInput(Instruction* instr, int index) { in HasFPRegisterInput() argument 149 static inline bool HasRegisterInput(Instruction* instr, int index) { in HasRegisterInput() argument 154 HasImmediateInput(Instruction* instr, size_t index) HasImmediateInput() argument 158 HasFPStackSlotInput(Instruction* instr, size_t index) HasFPStackSlotInput() argument 162 HasStackSlotInput(Instruction* instr, size_t index) HasStackSlotInput() argument 473 AssembleOp(Instruction* instr, RType r, MType m, IType i) AssembleOp() argument 487 AssembleBinOp(Instruction* instr, _RR _rr, _RM _rm, _RI _ri) AssembleBinOp() argument 492 AssembleUnaryOp(Instruction* instr, _R _r, _M _m, _I _i) AssembleUnaryOp() argument 1079 AssembleTailCallBeforeGap(Instruction* instr, int first_unused_slot_offset) AssembleTailCallBeforeGap() argument 1115 AssembleTailCallAfterGap(Instruction* instr, int first_unused_slot_offset) AssembleTailCallAfterGap() argument 1155 AssembleArchInstruction( Instruction* instr) AssembleArchInstruction() argument 3204 AssembleArchBranch(Instruction* instr, BranchInfo* branch) AssembleArchBranch() argument 3225 AssembleArchDeoptBranch(Instruction* instr, BranchInfo* branch) AssembleArchDeoptBranch() argument 3236 AssembleArchTrap(Instruction* instr, FlagsCondition condition) AssembleArchTrap() argument 3240 OutOfLineTrap(CodeGenerator* gen, Instruction* instr) AssembleArchTrap() argument 3303 AssembleArchBoolean(Instruction* instr, FlagsCondition condition) AssembleArchBoolean() argument 3334 AssembleArchBinarySearchSwitch(Instruction* instr) AssembleArchBinarySearchSwitch() argument 3345 AssembleArchTableSwitch(Instruction* instr) AssembleArchTableSwitch() argument 3362 AssembleArchSelect(Instruction* instr, FlagsCondition condition) AssembleArchSelect() argument [all...] |
| /third_party/node/deps/v8/src/codegen/s390/ |
| H A D | constants-s390.h | 1891 static inline int Bit(Instr instr, int nr) { return (instr >> nr) & 1; } in Bit() argument 1894 static inline int Bits(Instr instr, int hi, int lo) { in Bits() argument 1899 static inline int BitField(Instr instr, int hi, int lo) { in BitField() argument 1904 static inline int InstructionLength(const byte* instr) { in InstructionLength() argument 1918 static inline uint64_t InstructionBits(const byte* instr) { in InstructionBits() argument 1930 InstructionBits(const byte* instr) InstructionBits() argument 1961 SetInstructionBits(byte* instr, T value) SetInstructionBits() argument 2003 getOpcodeFormatType(const byte* instr) getOpcodeFormatType() argument 2009 S390OpcodeValue(const byte* instr) S390OpcodeValue() argument [all...] |
| /third_party/node/deps/v8/src/codegen/arm/ |
| H A D | constants-arm.h | 33 inline int DecodeConstantPoolLength(int instr) { in DecodeConstantPoolLength() argument [all...] |
| /third_party/node/deps/v8/src/codegen/riscv64/ |
| H A D | assembler-riscv64.h | 1252 instr_at_put(Address pc, Instr instr) instr_at_put() argument 1258 instr_at_put(int pos, Instr instr) instr_at_put() argument 1262 instr_at_put(int pos, ShortInstr instr) instr_at_put() argument [all...] |
| /third_party/mesa3d/src/gallium/drivers/lima/ir/pp/ |
| H A D | ppir.h | 162 struct ppir_instr *instr; member 724 ppir_instr_is_root(ppir_instr *instr) ppir_instr_is_root() argument 729 ppir_instr_is_leaf(ppir_instr *instr) ppir_instr_is_leaf() argument [all...] |
| /third_party/mesa3d/src/panfrost/midgard/ |
| H A D | midgard_compile.c | 218 midgard_nir_lower_global_load_instr(nir_builder *b, nir_instr *instr, void *data) in midgard_nir_lower_global_load_instr() argument 286 mdg_should_scalarize(const nir_instr *instr, const void *_unused) in mdg_should_scalarize() argument 310 midgard_vectorize_filter(const nir_instr *instr, const void *data) in midgard_vectorize_filter() argument 473 emit_load_const(compiler_context *ctx, nir_load_const_instr *instr) emit_load_const() argument 637 mir_copy_src(midgard_instruction *ins, nir_alu_instr *instr, unsigned i, unsigned to, bool *abs, bool *neg, bool *not, enum midgard_roundmode *roundmode, bool is_int, unsigned bcast_count) mir_copy_src() argument 684 mir_is_bcsel_float(nir_alu_instr *instr) mir_is_bcsel_float() argument 730 emit_alu(compiler_context *ctx, nir_alu_instr *instr) emit_alu() argument 1166 mir_set_intr_mask(nir_instr *instr, midgard_instruction *ins, bool is_read) mir_set_intr_mask() argument 1193 emit_ubo_read( compiler_context *ctx, nir_instr *instr, unsigned dest, unsigned offset, nir_src *indirect_offset, unsigned indirect_shift, unsigned index, unsigned nr_comps) emit_ubo_read() argument 1254 emit_global( compiler_context *ctx, nir_instr *instr, bool is_read, unsigned srcdest, nir_src *offset, unsigned seg) emit_global() argument 1348 emit_atomic( compiler_context *ctx, nir_intrinsic_instr *instr, bool is_shared, midgard_load_store_op op, unsigned image_direct_address) emit_atomic() argument 1483 emit_image_op(compiler_context *ctx, nir_intrinsic_instr *instr, bool is_atomic) emit_image_op() argument 1577 emit_sysval_read(compiler_context *ctx, nir_instr *instr, unsigned nr_components, unsigned offset) emit_sysval_read() argument 1672 emit_compute_builtin(compiler_context *ctx, nir_intrinsic_instr *instr) emit_compute_builtin() argument 1696 emit_vertex_builtin(compiler_context *ctx, nir_intrinsic_instr *instr) emit_vertex_builtin() argument 1703 emit_special(compiler_context *ctx, nir_intrinsic_instr *instr, unsigned idx) emit_special() argument 1745 output_load_rt_addr(compiler_context *ctx, nir_intrinsic_instr *instr) output_load_rt_addr() argument 1768 emit_intrinsic(compiler_context *ctx, nir_intrinsic_instr *instr) emit_intrinsic() argument 2260 mdg_texture_mode(nir_tex_instr *instr) mdg_texture_mode() argument 2273 set_tex_coord(compiler_context *ctx, nir_tex_instr *instr, midgard_instruction *ins) set_tex_coord() argument 2417 emit_texop_native(compiler_context *ctx, nir_tex_instr *instr, unsigned midgard_texop) emit_texop_native() argument 2512 emit_tex(compiler_context *ctx, nir_tex_instr *instr) emit_tex() argument 2538 emit_jump(compiler_context *ctx, nir_jump_instr *instr) emit_jump() argument 2556 emit_instr(compiler_context *ctx, struct nir_instr *instr) emit_instr() argument [all...] |