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Searched defs:insn (Results 76 - 100 of 101) sorted by relevance

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/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/Mips/Disassembler/
H A DMipsDisassembler.cpp587 DecodeINSVE_DF(MCInst &MI, InsnType insn, uint64_t Address, const void *Decoder) DecodeINSVE_DF() argument
634 DecodeDAHIDATIMMR6(MCInst &MI, InsnType insn, uint64_t Address, const void *Decoder) DecodeDAHIDATIMMR6() argument
648 DecodeDAHIDATI(MCInst &MI, InsnType insn, uint64_t Address, const void *Decoder) DecodeDAHIDATI() argument
662 DecodeAddiGroupBranch(MCInst &MI, InsnType insn, uint64_t Address, const void *Decoder) DecodeAddiGroupBranch() argument
701 DecodePOP35GroupBranchMMR6(MCInst &MI, InsnType insn, uint64_t Address, const void *Decoder) DecodePOP35GroupBranchMMR6() argument
735 DecodeDaddiGroupBranch(MCInst &MI, InsnType insn, uint64_t Address, const void *Decoder) DecodeDaddiGroupBranch() argument
774 DecodePOP37GroupBranchMMR6(MCInst &MI, InsnType insn, uint64_t Address, const void *Decoder) DecodePOP37GroupBranchMMR6() argument
808 DecodePOP65GroupBranchMMR6(MCInst &MI, InsnType insn, uint64_t Address, const void *Decoder) DecodePOP65GroupBranchMMR6() argument
847 DecodePOP75GroupBranchMMR6(MCInst &MI, InsnType insn, uint64_t Address, const void *Decoder) DecodePOP75GroupBranchMMR6() argument
886 DecodeBlezlGroupBranch(MCInst &MI, InsnType insn, uint64_t Address, const void *Decoder) DecodeBlezlGroupBranch() argument
929 DecodeBgtzlGroupBranch(MCInst &MI, InsnType insn, uint64_t Address, const void *Decoder) DecodeBgtzlGroupBranch() argument
973 DecodeBgtzGroupBranch(MCInst &MI, InsnType insn, uint64_t Address, const void *Decoder) DecodeBgtzGroupBranch() argument
1022 DecodeBlezGroupBranch(MCInst &MI, InsnType insn, uint64_t Address, const void *Decoder) DecodeBlezGroupBranch() argument
2550 DecodeBgtzGroupBranchMMR6(MCInst &MI, InsnType insn, uint64_t Address, const void *Decoder) DecodeBgtzGroupBranchMMR6() argument
2599 DecodeBlezGroupBranchMMR6(MCInst &MI, InsnType insn, uint64_t Address, const void *Decoder) DecodeBlezGroupBranchMMR6() argument
[all...]
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/X86/Disassembler/
H A DX86Disassembler.cpp178 static bool peek(struct InternalInstruction *insn, uint8_t &byte) { in peek() argument
186 template <typename T> static bool consume(InternalInstruction *insn, T &ptr) { in consume() argument
199 isREX(struct InternalInstruction *insn, uint8_t prefix) isREX() argument
208 readPrefixes(struct InternalInstruction *insn) readPrefixes() argument
507 readSIB(struct InternalInstruction *insn) readSIB() argument
569 readDisplacement(struct InternalInstruction *insn) readDisplacement() argument
600 readModRM(struct InternalInstruction *insn) readModRM() argument
831 fixupReg(struct InternalInstruction *insn, const struct OperandSpecifier *op) fixupReg() argument
867 readOpcode(struct InternalInstruction *insn) readOpcode() argument
1010 getInstructionIDWithAttrMask(uint16_t *instructionID, struct InternalInstruction *insn, uint16_t attrMask) getInstructionIDWithAttrMask() argument
1059 getInstructionID(struct InternalInstruction *insn, const MCInstrInfo *mii) getInstructionID() argument
1350 readOpcodeRegister(struct InternalInstruction *insn, uint8_t size) readOpcodeRegister() argument
1393 readImmediate(struct InternalInstruction *insn, uint8_t size) readImmediate() argument
1437 readVVVV(struct InternalInstruction *insn) readVVVV() argument
1464 readMaskRegister(struct InternalInstruction *insn) readMaskRegister() argument
1477 readOperands(struct InternalInstruction *insn) readOperands() argument
1819 translateSrcIndex(MCInst &mcInst, InternalInstruction &insn) translateSrcIndex() argument
1844 translateDstIndex(MCInst &mcInst, InternalInstruction &insn) translateDstIndex() argument
1866 translateImmediate(MCInst &mcInst, uint64_t immediate, const OperandSpecifier &operand, InternalInstruction &insn, const MCDisassembler *Dis) translateImmediate() argument
1972 translateRMRegister(MCInst &mcInst, InternalInstruction &insn) translateRMRegister() argument
2010 translateRMMemory(MCInst &mcInst, InternalInstruction &insn, const MCDisassembler *Dis) translateRMMemory() argument
2170 translateRM(MCInst &mcInst, const OperandSpecifier &operand, InternalInstruction &insn, const MCDisassembler *Dis) translateRM() argument
2233 translateOperand(MCInst &mcInst, const OperandSpecifier &operand, InternalInstruction &insn, const MCDisassembler *Dis) translateOperand() argument
2295 translateInstruction(MCInst &mcInst, InternalInstruction &insn, const MCDisassembler *Dis) translateInstruction() argument
[all...]
/third_party/spirv-tools/source/opt/
H A Dir_builder.h597 Instruction* AddInstruction(std::unique_ptr<Instruction>&& insn) { in AddInstruction() argument
652 inline void UpdateDefUseMgr(Instruction* insn) { in UpdateDefUseMgr() argument
659 inline void UpdateInstrToBlockMapping(Instruction* insn) { in UpdateInstrToBlockMapping() argument
/third_party/libbpf/src/
H A Dlinker.c2073 struct bpf_insn *insn; in linker_append_elf_relos() local
H A Dlibbpf_internal.h602 static inline bool is_ldimm64_insn(struct bpf_insn *insn) in is_ldimm64_insn() argument
/third_party/mesa3d/src/gallium/drivers/svga/
H A Dsvga_tgsi_insn.c87 translate_dst_register( struct svga_shader_emitter *emit, const struct tgsi_full_instruction *insn, unsigned idx ) translate_dst_register() argument
1026 emit_fake_arl(struct svga_shader_emitter *emit, const struct tgsi_full_instruction *insn) emit_fake_arl() argument
1052 emit_if(struct svga_shader_emitter *emit, const struct tgsi_full_instruction *insn) emit_if() argument
1083 emit_else(struct svga_shader_emitter *emit, const struct tgsi_full_instruction *insn) emit_else() argument
1091 emit_endif(struct svga_shader_emitter *emit, const struct tgsi_full_instruction *insn) emit_endif() argument
1137 emit_ceil(struct svga_shader_emitter *emit, const struct tgsi_full_instruction *insn) emit_ceil() argument
1284 emit_cos(struct svga_shader_emitter *emit, const struct tgsi_full_instruction *insn) emit_cos() argument
1310 emit_ssg(struct svga_shader_emitter *emit, const struct tgsi_full_instruction *insn) emit_ssg() argument
1351 emit_cond_discard(struct svga_shader_emitter *emit, const struct tgsi_full_instruction *insn) emit_cond_discard() argument
1395 emit_discard(struct svga_shader_emitter *emit, const struct tgsi_full_instruction *insn) emit_discard() argument
1558 emit_select_op(struct svga_shader_emitter *emit, unsigned compare, const struct tgsi_full_instruction *insn) emit_select_op() argument
1577 emit_cmp(struct svga_shader_emitter *emit, const struct tgsi_full_instruction *insn) emit_cmp() argument
1612 emit_tex2(struct svga_shader_emitter *emit, const struct tgsi_full_instruction *insn, SVGA3dShaderDestToken dst) emit_tex2() argument
1697 emit_tex4(struct svga_shader_emitter *emit, const struct tgsi_full_instruction *insn, SVGA3dShaderDestToken dst ) emit_tex4() argument
1800 emit_tex(struct svga_shader_emitter *emit, const struct tgsi_full_instruction *insn) emit_tex() argument
1925 emit_bgnloop(struct svga_shader_emitter *emit, const struct tgsi_full_instruction *insn) emit_bgnloop() argument
1941 emit_endloop(struct svga_shader_emitter *emit, const struct tgsi_full_instruction *insn) emit_endloop() argument
1956 emit_brk(struct svga_shader_emitter *emit, const struct tgsi_full_instruction *insn) emit_brk() argument
1969 emit_scalar_op1(struct svga_shader_emitter *emit, SVGA3dShaderOpCodeType opcode, const struct tgsi_full_instruction *insn) emit_scalar_op1() argument
1991 emit_simple_instruction(struct svga_shader_emitter *emit, SVGA3dShaderOpCodeType opcode, const struct tgsi_full_instruction *insn) emit_simple_instruction() argument
2029 emit_mov(struct svga_shader_emitter *emit, const struct tgsi_full_instruction *insn) emit_mov() argument
2057 emit_sqrt(struct svga_shader_emitter *emit, const struct tgsi_full_instruction *insn) emit_sqrt() argument
2181 emit_arl(struct svga_shader_emitter *emit, const struct tgsi_full_instruction *insn) emit_arl() argument
2203 emit_pow(struct svga_shader_emitter *emit, const struct tgsi_full_instruction *insn) emit_pow() argument
2284 emit_lrp(struct svga_shader_emitter *emit, const struct tgsi_full_instruction *insn) emit_lrp() argument
2302 emit_dst_insn(struct svga_shader_emitter *emit, const struct tgsi_full_instruction *insn) emit_dst_insn() argument
2379 emit_exp(struct svga_shader_emitter *emit, const struct tgsi_full_instruction *insn) emit_exp() argument
2447 emit_lit(struct svga_shader_emitter *emit, const struct tgsi_full_instruction *insn) emit_lit() argument
2546 emit_ex2(struct svga_shader_emitter *emit, const struct tgsi_full_instruction *insn) emit_ex2() argument
2574 emit_log(struct svga_shader_emitter *emit, const struct tgsi_full_instruction *insn) emit_log() argument
2685 emit_trunc_round(struct svga_shader_emitter *emit, const struct tgsi_full_instruction *insn, boolean round) emit_trunc_round() argument
2757 emit_bgnsub(struct svga_shader_emitter *emit, unsigned position, const struct tgsi_full_instruction *insn) emit_bgnsub() argument
2786 emit_call(struct svga_shader_emitter *emit, const struct tgsi_full_instruction *insn) emit_call() argument
2830 svga_emit_instruction(struct svga_shader_emitter *emit, unsigned position, const struct tgsi_full_instruction *insn) svga_emit_instruction() argument
3640 pre_parse_instruction( struct svga_shader_emitter *emit, const struct tgsi_full_instruction *insn, int current_arl) pre_parse_instruction() argument
[all...]
/third_party/mesa3d/src/nouveau/codegen/
H A Dnv50_ir_lowering_nvc0.cpp2000 Instruction *insn; processSurfaceCoordsNVE4() local
3287 checkPredicate(Instruction *insn) checkPredicate() argument
[all...]
H A Dnv50_ir_ra.cpp315 void removeDefsOfInstruction(Instruction *insn) { in removeDefsOfInstruction() argument
366 Instruction *insn = val->getUniqueInsn(); in addLiveRange() local
894 isShortRegOp(Instruction *insn) in isShortRegOp() argument
1095 makeCompound(Instruction *insn, bool split) makeCompound() argument
1135 Instruction *insn = reinterpret_cast<Instruction *>(insns.get(n)); doCoalesce() local
1277 Instruction *insn = reinterpret_cast<Instruction *>(insns.get(i)); buildRIG() local
1546 Instruction *insn = lval->getInsn(); allocateRegisters() local
2131 condenseDefs(Instruction *insn) condenseDefs() argument
2139 condenseDefs(Instruction *insn, const int a, const int b) condenseDefs() argument
2173 condenseSrcs(Instruction *insn, const int a, const int b) condenseSrcs() argument
[all...]
H A Dnv50_ir_emit_gm107.cpp50 const Instruction *insn; member in nv50_ir::CodeEmitterGM107
530 const FlowInstruction *insn = this->insn->asFlow(); emitBRA() local
567 const FlowInstruction *insn = this->insn->asFlow(); emitCAL() local
596 const FlowInstruction *insn = this->insn->asFlow(); emitPCNT() local
618 const FlowInstruction *insn = this->insn->asFlow(); emitPBK() local
640 const FlowInstruction *insn = this->insn->asFlow(); emitPRET() local
662 const FlowInstruction *insn = this->insn->asFlow(); emitSSY() local
1190 const CmpInstruction *insn = this->insn->asCmp(); emitDSET() local
1238 const CmpInstruction *insn = this->insn->asCmp(); emitDSETP() local
1531 const CmpInstruction *insn = this->insn->asCmp(); emitFCMP() local
1577 const CmpInstruction *insn = this->insn->asCmp(); emitFSET() local
1626 const CmpInstruction *insn = this->insn->asCmp(); emitFSETP() local
2030 const CmpInstruction *insn = this->insn->asCmp(); emitICMP() local
2076 const CmpInstruction *insn = this->insn->asCmp(); emitISET() local
2122 const CmpInstruction *insn = this->insn->asCmp(); emitISETP() local
2888 const TexInstruction *insn = this->insn->asTex(); emitTEX() local
2930 const TexInstruction *insn = this->insn->asTex(); emitTEXS() local
2974 const TexInstruction *insn = this->insn->asTex(); emitTLD() local
2999 const TexInstruction *insn = this->insn->asTex(); emitTLD4() local
3029 const TexInstruction *insn = this->insn->asTex(); emitTXD() local
3052 const TexInstruction *insn = this->insn->asTex(); emitTMML() local
3075 const TexInstruction *insn = this->insn->asTex(); emitTXQ() local
3263 const TexInstruction *insn = this->insn->asTex(); emitSUTarget() local
3290 const TexInstruction *insn = this->insn->asTex(); emitSUHandle() local
3307 const TexInstruction *insn = this->insn->asTex(); emitSUSTx() local
3325 const TexInstruction *insn = this->insn->asTex(); emitSULDx() local
3355 const TexInstruction *insn = this->insn->asTex(); emitSUREDx() local
3787 emitStall(Instruction *insn, uint8_t cnt) emitStall() argument
[all...]
H A Dnv50_ir_emit_gk110.cpp188 void CodeEmitterGK110::srcId(const Instruction *insn, int s, int pos) in srcId() argument
2474 CodeEmitterGK110::emitInstruction(Instruction *insn) in emitInstruction() argument
[all...]
H A Dnv50_ir_lowering_nv50.cpp604 Instruction *insn, *next; in visit() local
2163 checkPredicate(Instruction *insn) checkPredicate() argument
[all...]
H A Dnv50_ir_peephole.cpp191 LoadPropagation::checkSwapSrc01(Instruction *insn) in checkSwapSrc01() argument
318 Instruction *insn; visit() local
910 Instruction *insn; tryCollapseChainedMULs() local
1026 Instruction *insn = bld.mkOp3(OP_SHLADD, TYPE_U32, res, a, bld.mkImm(shl), a); createMul() local
2092 Instruction *insn = cvt->getSrc(0)->getInsn(); handleCVT_NEG() local
2132 Instruction *insn = cvt->getSrc(0)->getInsn(); handleCVT_CVT() local
2178 Instruction *insn = cvt->getSrc(0)->getInsn(); handleCVT_EXTBF() local
2270 handleSUCLAMP(Instruction *insn) handleSUCLAMP() argument
2524 Instruction *insn = bld.mkOp3(OP_XMAD, TYPE_U32, tmp0, b, a, c); handleMULMAD() local
2698 Instruction *insn; global() member in nv50_ir::MemoryOpt::Record
2942 getList(const Instruction *insn) getList() argument
2962 findRecord(const Instruction *insn, bool load, bool& isAdj) const findRecord() argument
3297 Instruction *insn = pred->getUniqueInsn(); isConstantCondition() local
3330 removeFlow(Instruction *insn) removeFlow() argument
3370 mayPredicate(const Instruction *insn, const Value *pred) const mayPredicate() argument
3442 Instruction *insn = bb->getExit(); visit() local
3473 Instruction *insn; tryPredicateConditional() local
[all...]
H A Dnv50_ir_from_tgsi.cpp249 const struct tgsi_full_instruction *insn; global() member in tgsi::Instruction
1481 scanInstructionSrc(const Instruction& insn, const Instruction::SrcRegister& src, unsigned mask) scanInstructionSrc() argument
1842 Instruction *insn = new_Instruction(func, op, TYPE_F32); interpolate() local
2286 Instruction *insn = proj->getUniqueInsn(); loadProjTexCoords() local
2948 Instruction *insn; handleATOM() local
3041 Instruction *insn; handleINTERP() local
3172 handleInstruction(const struct tgsi_full_instruction *insn) handleInstruction() argument
[all...]
H A Dnv50_ir.h690 Instruction *insn; member in nv50_ir::ValueRef
720 Instruction *insn; member in nv50_ir::ValueDef
[all...]
/third_party/ltp/tools/sparse/sparse-src/
H A Dexample.c887 static void do_binop(struct bb_state *state, struct instruction *insn, pseudo_t val1, pseudo_t val2) in do_binop() argument
901 static void generate_binop(struct bb_state *state, struct instruction *insn) in generate_binop() argument
922 generate_commutative_binop(struct bb_state *state, struct instruction *insn) generate_commutative_binop() argument
980 generate_store(struct instruction *insn, struct bb_state *state) generate_store() argument
985 generate_load(struct instruction *insn, struct bb_state *state) generate_load() argument
1018 generate_copy(struct bb_state *state, struct instruction *insn) generate_copy() argument
1025 generate_cast(struct bb_state *state, struct instruction *insn) generate_cast() argument
1094 generate_switch(struct bb_state *state, struct instruction *insn) generate_switch() argument
1117 generate_call(struct bb_state *state, struct instruction *insn) generate_call() argument
1136 generate_select(struct bb_state *state, struct instruction *insn) generate_select() argument
1327 generate_asm(struct bb_state *state, struct instruction *insn) generate_asm() argument
1341 generate_compare(struct bb_state *state, struct instruction *insn) generate_compare() argument
1362 generate_one_insn(struct instruction *insn, struct bb_state *state) generate_one_insn() argument
1687 struct instruction *insn; generate() local
1874 set_up_arch_switch(struct basic_block *bb, struct instruction *insn) set_up_arch_switch() argument
1894 struct instruction *insn = last_instruction(bb->insns); arch_set_up_storage() local
[all...]
H A Dsimplify.c89 static int get_phisources(struct instruction *sources[], int nbr, struct instruction *insn) in get_phisources() argument
108 static int if_convert_phi(struct instruction *insn) in if_convert_phi() argument
199 static pseudo_t trivial_phi(pseudo_t pseudo, struct instruction *insn, struc argument
238 clean_up_phi(struct instruction *insn) clean_up_phi() argument
311 kill_asm(struct instruction *insn) kill_asm() argument
330 kill_insn(struct instruction *insn, int force) kill_insn() argument
407 has_target(struct instruction *insn) has_target() argument
417 struct instruction *insn; remove_dead_insns() local
470 replace_pseudo(struct instruction *insn, pseudo_t *pp, pseudo_t new) replace_pseudo() argument
478 replace_with_pseudo(struct instruction *insn, pseudo_t pseudo) replace_with_pseudo() argument
484 replace_with_value(struct instruction *insn, long long val) replace_with_value() argument
495 replace_with_unop(struct instruction *insn, int op, pseudo_t src) replace_with_unop() argument
509 replace_binop_value(struct instruction *insn, int op, long long val) replace_binop_value() argument
521 replace_binop(struct instruction *insn, int op, pseudo_t *pa, pseudo_t a, pseudo_t *pb, pseudo_t b) replace_binop() argument
536 replace_opcode(struct instruction *insn, int op) replace_opcode() argument
609 operand_size(struct instruction *insn, pseudo_t pseudo) operand_size() argument
777 simplify_mask_or_and(struct instruction *insn, unsigned long long mask, pseudo_t ora, pseudo_t orb) simplify_mask_or_and() argument
816 simplify_mask_or(struct instruction *insn, unsigned long long mask, struct instruction *or) simplify_mask_or() argument
883 eval_insn(struct instruction *insn) eval_insn() argument
892 check_shift_count(struct instruction *insn, unsigned long long uval) check_shift_count() argument
911 simplify_shift(struct instruction *insn, pseudo_t pseudo, long long value) simplify_shift() argument
1057 simplify_mul_div(struct instruction *insn, long long value) simplify_mul_div() argument
1084 simplify_seteq_setne(struct instruction *insn, long long value) simplify_seteq_setne() argument
1170 simplify_compare_constant(struct instruction *insn, long long value) simplify_compare_constant() argument
1468 simplify_constant_mask(struct instruction *insn, unsigned long long mask) simplify_constant_mask() argument
1504 simplify_const_rightadd(struct instruction *def, struct instruction *insn) simplify_const_rightadd() argument
1522 simplify_constant_rightside(struct instruction *insn) simplify_constant_rightside() argument
1590 simplify_const_leftsub(struct instruction *insn, struct instruction *def) simplify_const_leftsub() argument
1614 simplify_constant_leftside(struct instruction *insn) simplify_constant_leftside() argument
1641 simplify_constant_binop(struct instruction *insn) simplify_constant_binop() argument
1651 simplify_binop_same_args(struct instruction *insn, pseudo_t arg) simplify_binop_same_args() argument
1681 simplify_binop(struct instruction *insn) simplify_binop() argument
1738 canonicalize_commutative(struct instruction *insn) canonicalize_commutative() argument
1747 canonicalize_compare(struct instruction *insn) canonicalize_compare() argument
1766 struct instruction *insn; insn_before() local
1800 simplify_associative_binop(struct instruction *insn) simplify_associative_binop() argument
1827 simplify_add_one_side(struct instruction *insn, pseudo_t *p1, pseudo_t *p2) simplify_add_one_side() argument
1866 simplify_add(struct instruction *insn) simplify_add() argument
1872 simplify_sub(struct instruction *insn) simplify_sub() argument
1902 simplify_compare(struct instruction *insn) simplify_compare() argument
1926 simplify_and_one_side(struct instruction *insn, pseudo_t *p1, pseudo_t *p2) simplify_and_one_side() argument
1985 simplify_and(struct instruction *insn) simplify_and() argument
1991 simplify_ior_one_side(struct instruction *insn, pseudo_t *p1, pseudo_t *p2) simplify_ior_one_side() argument
2039 simplify_ior(struct instruction *insn) simplify_ior() argument
2045 simplify_xor_one_side(struct instruction *insn, pseudo_t *p1, pseudo_t *p2) simplify_xor_one_side() argument
2093 simplify_xor(struct instruction *insn) simplify_xor() argument
2099 simplify_constant_unop(struct instruction *insn) simplify_constant_unop() argument
2129 simplify_unop(struct instruction *insn) simplify_unop() argument
2194 simplify_one_memop(struct instruction *insn, pseudo_t orig) simplify_one_memop() argument
2248 simplify_memop(struct instruction *insn) simplify_memop() argument
2260 simplify_cast(struct instruction *insn) simplify_cast() argument
2426 simplify_select(struct instruction *insn) simplify_select() argument
2573 simplify_range(struct instruction *insn) simplify_range() argument
2602 simplify_branch(struct instruction *insn) simplify_branch() argument
2646 simplify_switch(struct instruction *insn) simplify_switch() argument
2679 simplify_cgoto(struct instruction *insn) simplify_cgoto() argument
2714 simplify_setval(struct instruction *insn) simplify_setval() argument
2729 simplify_instruction(struct instruction *insn) simplify_instruction() argument
[all...]
H A Dlinearize.c43 struct instruction * insn = __alloc_instruction(0); in alloc_instruction() local
57 struct instruction *insn = alloc_instruction(opcode, type_size(type)); in alloc_typed_instruction() local
296 static char *show_asm(char *buf, struct instruction *insn) in show_asm() argument
307 show_instruction(struct instruction *insn) show_instruction() argument
509 struct instruction *insn; show_bb() local
566 show_insn_bb(struct instruction *insn) show_insn_bb() argument
622 show_insn_entry(struct instruction *insn) show_insn_entry() argument
668 add_one_insn(struct entrypoint *ep, struct instruction *insn) add_one_insn() argument
680 struct instruction *insn = alloc_instruction(OP_UNREACH, 0); add_unreachable() local
833 struct instruction *insn = alloc_typed_instruction(OP_PHISOURCE, type); alloc_phisrc() local
848 struct instruction *insn; alloc_phi() local
874 struct instruction *insn; add_phi_node() local
968 struct instruction *insn; add_load() local
1040 taint_undefined_behaviour(struct instruction *insn) taint_undefined_behaviour() argument
1059 struct instruction *insn = alloc_typed_instruction(op, ctype); add_binary_op() local
1077 struct instruction *insn = alloc_typed_instruction(OP_SETVAL, ctype); add_setval() local
1087 struct instruction *insn = alloc_typed_instruction(OP_SETFVAL, ctype); add_setfval() local
1097 struct instruction *insn = alloc_typed_instruction(OP_SYMADDR, expr->ctype); add_symbol_address() local
1172 struct instruction *insn = alloc_typed_instruction(op, ctype); add_unop() local
1192 struct instruction *insn = alloc_typed_instruction(OP_SLICE, expr->ctype); linearize_slice() local
1364 struct instruction *insn; cast_pseudo() local
1495 struct instruction *insn; linearize_call_expression() local
1611 struct instruction *insn; linearize_select() local
2034 struct instruction *insn = alloc_instruction(OP_INLINED_CALL, 0); linearize_inlined_call() local
2062 struct instruction *insn = alloc_instruction(OP_CONTEXT, 0); linearize_context() local
2073 struct instruction *insn = alloc_instruction(OP_RANGE, 0); linearize_range() local
2085 add_asm_rule(struct instruction *insn, struct asm_constraint_list **list, struct asm_operand *op, pseudo_t pseudo) add_asm_rule() argument
2095 add_asm_input(struct entrypoint *ep, struct instruction *insn, struct asm_operand *op) add_asm_input() argument
2102 add_asm_output_address(struct entrypoint *ep, struct instruction *insn, struct asm_operand *op) add_asm_output_address() argument
2114 add_asm_output(struct entrypoint *ep, struct instruction *insn, struct asm_operand *op) add_asm_output() argument
2132 struct instruction *insn; linearize_asm_statement() local
2195 sort_switch_cases(struct instruction *insn) sort_switch_cases() argument
2483 check_tainted_insn(struct instruction *insn) check_tainted_insn() argument
2516 struct instruction *insn; late_warnings() local
2603 struct instruction *insn = alloc_typed_instruction(OP_FMADD, expr->ctype); linearize_fma() local
2620 struct instruction *insn; linearize_isdigit() local
[all...]
H A Dcompile-i386.c173 char insn[32]; member
625 static void insn(const char *insn, struct storage *op1, struct storage *op2, in insn() argument
1136 opbits(const char *insn, unsigned int bits) opbits() argument
[all...]
/third_party/mesa3d/src/intel/compiler/
H A Dbrw_eu_emit.c517 brw_set_ff_sync_message(struct brw_codegen *p, brw_inst *insn, bool allocate, unsigned response_length, bool end_of_thread) brw_set_ff_sync_message() argument
539 brw_set_urb_message( struct brw_codegen *p, brw_inst *insn, enum brw_urb_write_flags flags, unsigned msg_length, unsigned response_length, unsigned offset, unsigned swizzle_control ) brw_set_urb_message() argument
613 brw_inst_set_state(const struct brw_isa_info *isa, brw_inst *insn, const struct brw_insn_state *state) brw_inst_set_state() argument
699 brw_inst *insn = brw_append_insns(p, 1, sizeof(brw_inst)); brw_next_insn() local
733 brw_inst *insn = next_insn(p, opcode); brw_alu1() local
747 brw_inst *insn = next_insn(p, opcode); brw_alu2() local
1335 brw_inst *insn = next_insn(p, BRW_OPCODE_NOP); brw_NOP() local
1342 brw_inst *insn = next_insn(p, BRW_OPCODE_SYNC); brw_SYNC() local
1425 brw_inst *insn; brw_IF() local
1474 brw_inst *insn; gfx6_IF() local
1628 brw_inst *insn; brw_ELSE() local
1667 brw_inst *insn = NULL; brw_ENDIF() local
1748 brw_inst *insn; brw_BREAK() local
1775 brw_inst *insn; brw_CONT() local
1799 brw_inst *insn; brw_HALT() local
1849 brw_inst *insn = next_insn(p, BRW_OPCODE_DO); brw_DO() local
1903 brw_inst *insn, *do_insn; brw_WHILE() local
1991 brw_inst *insn = next_insn(p, BRW_OPCODE_CMP); brw_CMP() local
2020 brw_inst *insn = next_insn(p, BRW_OPCODE_CMPN); brw_CMPN() local
2057 brw_inst *insn = next_insn(p, BRW_OPCODE_SEND); gfx4_math() local
2090 brw_inst *insn = next_insn(p, BRW_OPCODE_MATH); gfx6_math() local
2209 brw_inst *insn = next_insn(p, BRW_OPCODE_SEND); brw_oword_block_write_scratch() local
2322 brw_inst *insn = next_insn(p, BRW_OPCODE_SEND); brw_oword_block_read_scratch() local
2351 brw_inst *insn = next_insn(p, BRW_OPCODE_SEND); gfx7_block_read_scratch() local
2425 brw_inst *insn = next_insn(p, BRW_OPCODE_SEND); brw_oword_block_read() local
2466 brw_inst *insn; brw_fb_WRITE() local
2515 brw_inst *insn = next_insn(p, BRW_OPCODE_SENDC); gfx9_fb_READ() local
2549 brw_inst *insn; brw_SAMPLE() local
2648 brw_inst *insn; brw_urb_WRITE() local
2893 while_jumps_before_offset(const struct intel_device_info *devinfo, brw_inst *insn, int while_offset, int start_offset) while_jumps_before_offset() argument
2916 brw_inst *insn = store + offset; brw_find_next_block_end() local
2966 brw_inst *insn = store + offset; brw_find_loop_end() local
2993 brw_inst *insn = store + offset; brw_set_uip_jip() local
3069 brw_inst *insn; brw_ff_sync() local
3110 brw_inst *insn; brw_svb_write() local
3226 brw_set_memory_fence_message(struct brw_codegen *p, struct brw_inst *insn, enum brw_message_target sfid, bool commit_enable, unsigned bti) brw_set_memory_fence_message() argument
3258 gfx12_set_memory_fence_message(struct brw_codegen *p, struct brw_inst *insn, enum brw_message_target sfid, uint32_t desc) gfx12_set_memory_fence_message() argument
3322 struct brw_inst *insn = next_insn(p, send_op); brw_memory_fence() local
3618 struct brw_inst *insn; brw_WAIT() local
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H A Dbrw_eu.h1861 brw_set_desc(struct brw_codegen *p, brw_inst *insn, unsigned desc) in brw_set_desc() argument
1894 brw_inst *insn = (brw_inst *)((char *)store + offset); in next_offset() local
/third_party/mesa3d/src/gallium/auxiliary/tgsi/
H A Dtgsi_ureg.c63 struct tgsi_instruction insn; member
1301 union tgsi_any_token *out, *insn; in ureg_emit_label() local
1344 union tgsi_any_token *out, *insn; ureg_emit_texture() local
1376 union tgsi_any_token *out, *insn; ureg_emit_memory() local
1409 struct ureg_emit_insn_result insn; ureg_insn() local
1447 struct ureg_emit_insn_result insn; ureg_tex_insn() local
1491 struct ureg_emit_insn_result insn; ureg_memory_insn() local
[all...]
/third_party/skia/third_party/externals/swiftshader/src/Pipeline/
H A DSpirvShader.cpp790 DeclareType(InsnIterator insn) DeclareType() argument
840 CreateConstant(InsnIterator insn) CreateConstant() argument
953 ProcessExecutionMode(InsnIterator insn) ProcessExecutionMode() argument
995 ComputeTypeSize(InsnIterator insn) ComputeTypeSize() argument
1561 DefineResult(const InsnIterator &insn) DefineResult() argument
1711 EmitInstruction(InsnIterator insn, EmitState *state) const EmitInstruction() argument
2081 EmitAccessChain(InsnIterator insn, EmitState *state) const EmitAccessChain() argument
2108 EmitCompositeConstruct(InsnIterator insn, EmitState *state) const EmitCompositeConstruct() argument
2130 EmitCompositeInsert(InsnIterator insn, EmitState *state) const EmitCompositeInsert() argument
2161 EmitCompositeExtract(InsnIterator insn, EmitState *state) const EmitCompositeExtract() argument
2178 EmitVectorShuffle(InsnIterator insn, EmitState *state) const EmitVectorShuffle() argument
2212 EmitVectorExtractDynamic(InsnIterator insn, EmitState *state) const EmitVectorExtractDynamic() argument
2232 EmitVectorInsertDynamic(InsnIterator insn, EmitState *state) const EmitVectorInsertDynamic() argument
2249 EmitSelect(InsnIterator insn, EmitState *state) const EmitSelect() argument
2272 EmitAny(InsnIterator insn, EmitState *state) const EmitAny() argument
2291 EmitAll(InsnIterator insn, EmitState *state) const EmitAll() argument
2310 EmitAtomicOp(InsnIterator insn, EmitState *state) const EmitAtomicOp() argument
2385 EmitAtomicCompareExchange(InsnIterator insn, EmitState *state) const EmitAtomicCompareExchange() argument
2420 EmitCopyObject(InsnIterator insn, EmitState *state) const EmitCopyObject() argument
2432 EmitArrayLength(InsnIterator insn, EmitState *state) const EmitArrayLength() argument
2465 EmitExtendedInstruction(InsnIterator insn, EmitState *state) const EmitExtendedInstruction() argument
[all...]
/third_party/mesa3d/src/gallium/drivers/nouveau/nv30/
H A Dnvfx_shader.h452 struct nvfx_insn insn = { in nvfx_insn() local
/third_party/mesa3d/src/gallium/frontends/nine/
H A Dnine_shader.c380 sm1_dump_instruction(struct sm1_instruction *insn, unsigned indent) in sm1_dump_instruction() argument
461 struct sm1_instruction insn; /* current instruction */ global() member
536 sm1_instruction_check(const struct sm1_instruction *insn) sm1_instruction_check() argument
3459 struct sm1_instruction *insn = &tx->insn; sm1_parse_instruction() local
[all...]
/third_party/mesa3d/src/gallium/auxiliary/nir/
H A Dnir_to_tgsi.c138 struct ntt_insn insn = { in ntt_insn() local
1694 struct ntt_insn *insn = ntt_insn(c, TGSI_OPCODE_DFRACEXP, ntt_emit_alu() local
1843 struct ntt_insn *insn = ntt_emit_load_ubo() local
2031 struct ntt_insn *insn = ntt_insn(c, opcode, dst, src[0], src[1], src[2], src[3]); ntt_emit_mem() local
2134 struct ntt_insn *insn = ntt_insn(c, op, opcode_dst, srcs[0], srcs[1], srcs[2], srcs[3]); ntt_emit_image_load_store() local
2748 struct ntt_insn *insn = ntt_insn(c, tex_opcode, tex_dst, s.srcs[0], s.srcs[1], s.srcs[2], s.srcs[3]); ntt_emit_texture() local
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