Lines Matching defs:insn
887 static void do_binop(struct bb_state *state, struct instruction *insn, pseudo_t val1, pseudo_t val2)
889 const char *op = opcodes[insn->opcode];
890 struct operand *src = get_register_operand(state, val1, insn->target);
894 dst = target_copy_reg(state, src->reg, insn->target);
895 output_insn(state, "%s.%d %s,%s", op, insn->size, show_op(state, src2), dst->name);
898 add_pseudo_reg(state, insn->target, dst);
901 static void generate_binop(struct bb_state *state, struct instruction *insn)
904 do_binop(state, insn, insn->src1, insn->src2);
922 static void generate_commutative_binop(struct bb_state *state, struct instruction *insn)
928 src1 = insn->src1;
929 src2 = insn->src2;
942 if (reg2 != preferred_reg(state, insn->target))
947 src2 = insn->src1;
949 do_binop(state, insn, src1, src2);
980 static void generate_store(struct instruction *insn, struct bb_state *state)
982 output_insn(state, "mov.%d %s,%s", insn->size, reg_or_imm(state, insn->target), address(state, insn));
985 static void generate_load(struct instruction *insn, struct bb_state *state)
987 const char *input = address(state, insn);
991 dst = target_reg(state, insn->target, NULL);
992 output_insn(state, "mov.%d %s,%s", insn->size, input, dst->name);
1018 static void generate_copy(struct bb_state *state, struct instruction *insn)
1020 struct hardreg *src = getreg(state, insn->src, insn->target);
1021 kill_pseudo(state, insn->target);
1022 add_pseudo_reg(state, insn->target, src);
1025 static void generate_cast(struct bb_state *state, struct instruction *insn)
1027 struct hardreg *src = getreg(state, insn->src, insn->target);
1029 unsigned int old = insn->orig_type ? insn->orig_type->bit_size : 0;
1030 unsigned int new = insn->size;
1037 add_pseudo_reg(state, insn->target, src);
1041 dst = target_copy_reg(state, src, insn->target);
1043 if (insn->orig_type && (insn->orig_type->ctype.modifiers & MOD_SIGNED)) {
1049 output_insn(state, "andl.%d $%#llx,%s", insn->size, mask, dst->name);
1051 add_pseudo_reg(state, insn->target, dst);
1094 static void generate_switch(struct bb_state *state, struct instruction *insn)
1100 output_insn(state, "unimplemented: %s", show_instruction(insn));
1117 static void generate_call(struct bb_state *state, struct instruction *insn)
1122 FOR_EACH_PTR(insn->arguments, arg) {
1129 output_insn(state, "call %s", show_pseudo(insn->func));
1132 if (insn->target && insn->target != VOID)
1133 add_pseudo_reg(state, insn->target, hardregs+0);
1136 static void generate_select(struct bb_state *state, struct instruction *insn)
1141 src1 = getreg(state, insn->src2, NULL);
1142 dst = copy_reg(state, src1, insn->target);
1143 add_pseudo_reg(state, insn->target, dst);
1144 src2 = getreg(state, insn->src3, insn->target);
1146 if (state->cc_target == insn->src1) {
1149 struct hardreg *reg = getreg(state, insn->src1, NULL);
1327 static void generate_asm(struct bb_state *state, struct instruction *insn)
1329 const char *str = insn->string;
1331 if (insn->asm_rules->outputs || insn->asm_rules->inputs) {
1334 arg = generate_asm_outputs(state, insn->asm_rules->outputs, asm_arguments);
1335 arg = generate_asm_inputs(state, insn->asm_rules->inputs, arg);
1341 static void generate_compare(struct bb_state *state, struct instruction *insn)
1348 opcode = insn->opcode;
1354 src = getreg(state, insn->src1, insn->target);
1355 src2 = generic(state, insn->src2);
1357 output_insn(state, "cmp.%d %s,%s", insn->size, src2, src->name);
1359 add_cc_cache(state, opcode, insn->target);
1362 static void generate_one_insn(struct instruction *insn, struct bb_state *state)
1365 output_comment(state, "%s", show_instruction(insn));
1367 switch (insn->opcode) {
1369 struct symbol *sym = insn->bb->ep->name;
1388 generate_store(insn, state);
1392 generate_load(insn, state);
1396 mark_pseudo_dead(state, insn->target);
1400 generate_copy(state, insn);
1405 generate_commutative_binop(state, insn);
1411 generate_binop(state, insn);
1415 generate_compare(state, insn);
1426 generate_cast(state, insn);
1430 generate_select(state, insn);
1435 generate_branch(state, insn);
1439 generate_switch(state, insn);
1443 generate_call(state, insn);
1447 generate_ret(state, insn);
1451 generate_asm(state, insn);
1457 output_insn(state, "unimplemented: %s", show_instruction(insn));
1687 struct instruction *insn;
1708 FOR_EACH_PTR(bb->insns, insn) {
1709 if (!insn->bb)
1711 generate_one_insn(insn, state);
1712 } END_FOR_EACH_PTR(insn);
1874 static void set_up_arch_switch(struct basic_block *bb, struct instruction *insn)
1876 pseudo_t pseudo = insn->cond;
1894 struct instruction *insn = last_instruction(bb->insns);
1895 if (!insn)
1897 switch (insn->opcode) {
1899 set_up_arch_exit(bb, insn);
1902 set_up_arch_switch(bb, insn);