| /kernel/linux/linux-6.6/drivers/gpu/drm/amd/amdgpu/ |
| H A D | ih_v6_1.c | 46 static void ih_v6_1_init_register_offset(struct amdgpu_device *adev) in ih_v6_1_init_register_offset() argument
93 force_update_wptr_for_self_int(struct amdgpu_device *adev, in force_update_wptr_for_self_int() argument
127 ih_v6_1_toggle_ring_interrupts(struct amdgpu_device *adev, struct amdgpu_ih_ring *ih, bool enable) ih_v6_1_toggle_ring_interrupts() argument
170 ih_v6_1_toggle_interrupts(struct amdgpu_device *adev, bool enable) ih_v6_1_toggle_interrupts() argument
237 ih_v6_1_enable_ring(struct amdgpu_device *adev, struct amdgpu_ih_ring *ih) ih_v6_1_enable_ring() argument
293 ih_v6_1_irq_init(struct amdgpu_device *adev) ih_v6_1_irq_init() argument
371 ih_v6_1_irq_disable(struct amdgpu_device *adev) ih_v6_1_irq_disable() argument
391 ih_v6_1_get_wptr(struct amdgpu_device *adev, struct amdgpu_ih_ring *ih) ih_v6_1_get_wptr() argument
439 ih_v6_1_irq_rearm(struct amdgpu_device *adev, struct amdgpu_ih_ring *ih) ih_v6_1_irq_rearm() argument
466 ih_v6_1_set_rptr(struct amdgpu_device *adev, struct amdgpu_ih_ring *ih) ih_v6_1_set_rptr() argument
493 ih_v6_1_self_irq(struct amdgpu_device *adev, struct amdgpu_irq_src *source, struct amdgpu_iv_entry *entry) ih_v6_1_self_irq() argument
514 ih_v6_1_set_self_irq_funcs(struct amdgpu_device *adev) ih_v6_1_set_self_irq_funcs() argument
522 struct amdgpu_device *adev = (struct amdgpu_device *)handle; ih_v6_1_early_init() local
532 struct amdgpu_device *adev = (struct amdgpu_device *)handle; ih_v6_1_sw_init() local
570 struct amdgpu_device *adev = (struct amdgpu_device *)handle; ih_v6_1_sw_fini() local
580 struct amdgpu_device *adev = (struct amdgpu_device *)handle; ih_v6_1_hw_init() local
591 struct amdgpu_device *adev = (struct amdgpu_device *)handle; ih_v6_1_hw_fini() local
600 struct amdgpu_device *adev = (struct amdgpu_device *)handle; ih_v6_1_suspend() local
607 struct amdgpu_device *adev = (struct amdgpu_device *)handle; ih_v6_1_resume() local
630 ih_v6_1_update_clockgating_state(struct amdgpu_device *adev, bool enable) ih_v6_1_update_clockgating_state() argument
658 struct amdgpu_device *adev = (struct amdgpu_device *)handle; ih_v6_1_set_clockgating_state() local
665 ih_v6_1_update_ih_mem_power_gating(struct amdgpu_device *adev, bool enable) ih_v6_1_update_ih_mem_power_gating() argument
721 struct amdgpu_device *adev = (struct amdgpu_device *)handle; ih_v6_1_set_powergating_state() local
732 struct amdgpu_device *adev = (struct amdgpu_device *)handle; ih_v6_1_get_clockgating_state() local
765 ih_v6_1_set_interrupt_funcs(struct amdgpu_device *adev) ih_v6_1_set_interrupt_funcs() argument
[all...] |
| H A D | amdgpu_xcp.c | 122 struct amdgpu_device *adev = xcp_mgr->adev; in amdgpu_xcp_init() local
229 static int amdgpu_xcp_dev_alloc(struct amdgpu_device *adev) in amdgpu_xcp_dev_alloc() argument
265 amdgpu_xcp_mgr_init(struct amdgpu_device *adev, int init_mode, int init_num_xcps, struct amdgpu_xcp_mgr_funcs *xcp_funcs) amdgpu_xcp_mgr_init() argument
327 amdgpu_xcp_dev_register(struct amdgpu_device *adev, const struct pci_device_id *ent) amdgpu_xcp_dev_register() argument
347 amdgpu_xcp_dev_unplug(struct amdgpu_device *adev) amdgpu_xcp_dev_unplug() argument
368 amdgpu_xcp_open_device(struct amdgpu_device *adev, struct amdgpu_fpriv *fpriv, struct drm_file *file_priv) amdgpu_xcp_open_device() argument
400 amdgpu_xcp_release_sched(struct amdgpu_device *adev, struct amdgpu_ctx_entity *entity) amdgpu_xcp_release_sched() argument
[all...] |
| H A D | mmhub_v9_4.c | 39 static u64 mmhub_v9_4_get_fb_location(struct amdgpu_device *adev) in mmhub_v9_4_get_fb_location() argument
57 static void mmhub_v9_4_setup_hubid_vm_pt_regs(struct amdgpu_device *adev, int hubid, in mmhub_v9_4_setup_hubid_vm_pt_regs() argument
74 static void mmhub_v9_4_init_gart_aperture_regs(struct amdgpu_device *adev, in mmhub_v9_4_init_gart_aperture_regs() argument
100 mmhub_v9_4_setup_vm_pt_regs(struct amdgpu_device *adev, uint32_t vmid, uint64_t page_table_base) mmhub_v9_4_setup_vm_pt_regs() argument
110 mmhub_v9_4_init_system_aperture_regs(struct amdgpu_device *adev, int hubid) mmhub_v9_4_init_system_aperture_regs() argument
175 mmhub_v9_4_init_tlb_regs(struct amdgpu_device *adev, int hubid) mmhub_v9_4_init_tlb_regs() argument
201 mmhub_v9_4_init_cache_regs(struct amdgpu_device *adev, int hubid) mmhub_v9_4_init_cache_regs() argument
255 mmhub_v9_4_enable_system_domain(struct amdgpu_device *adev, int hubid) mmhub_v9_4_enable_system_domain() argument
270 mmhub_v9_4_disable_identity_aperture(struct amdgpu_device *adev, int hubid) mmhub_v9_4_disable_identity_aperture() argument
295 mmhub_v9_4_setup_vmid_config(struct amdgpu_device *adev, int hubid) mmhub_v9_4_setup_vmid_config() argument
363 mmhub_v9_4_program_invalidation(struct amdgpu_device *adev, int hubid) mmhub_v9_4_program_invalidation() argument
383 mmhub_v9_4_gart_enable(struct amdgpu_device *adev) mmhub_v9_4_gart_enable() argument
405 mmhub_v9_4_gart_disable(struct amdgpu_device *adev) mmhub_v9_4_gart_disable() argument
450 mmhub_v9_4_set_fault_enable_default(struct amdgpu_device *adev, bool value) mmhub_v9_4_set_fault_enable_default() argument
508 mmhub_v9_4_init(struct amdgpu_device *adev) mmhub_v9_4_init() argument
559 mmhub_v9_4_update_medium_grain_clock_gating(struct amdgpu_device *adev, bool enable) mmhub_v9_4_update_medium_grain_clock_gating() argument
616 mmhub_v9_4_update_medium_grain_light_sleep(struct amdgpu_device *adev, bool enable) mmhub_v9_4_update_medium_grain_light_sleep() argument
638 mmhub_v9_4_set_clockgating(struct amdgpu_device *adev, enum amd_clockgating_state state) mmhub_v9_4_set_clockgating() argument
658 mmhub_v9_4_get_clockgating(struct amdgpu_device *adev, u64 *flags) mmhub_v9_4_get_clockgating() argument
1561 mmhub_v9_4_get_ras_error_count(struct amdgpu_device *adev, const struct soc15_reg_entry *reg, uint32_t value, uint32_t *sec_count, uint32_t *ded_count) mmhub_v9_4_get_ras_error_count() argument
1598 mmhub_v9_4_query_ras_error_count(struct amdgpu_device *adev, void *ras_error_status) mmhub_v9_4_query_ras_error_count() argument
1621 mmhub_v9_4_reset_ras_error_count(struct amdgpu_device *adev) mmhub_v9_4_reset_ras_error_count() argument
1643 mmhub_v9_4_query_ras_error_status(struct amdgpu_device *adev) mmhub_v9_4_query_ras_error_status() argument
[all...] |
| H A D | mmhub_v3_0_1.c | 96 mmhub_v3_0_1_print_l2_protection_fault_status(struct amdgpu_device *adev, in mmhub_v3_0_1_print_l2_protection_fault_status() argument
137 static void mmhub_v3_0_1_setup_vm_pt_regs(struct amdgpu_device *adev, in mmhub_v3_0_1_setup_vm_pt_regs() argument
152 mmhub_v3_0_1_init_gart_aperture_regs(struct amdgpu_device *adev) mmhub_v3_0_1_init_gart_aperture_regs() argument
169 mmhub_v3_0_1_init_system_aperture_regs(struct amdgpu_device *adev) mmhub_v3_0_1_init_system_aperture_regs() argument
210 mmhub_v3_0_1_init_tlb_regs(struct amdgpu_device *adev) mmhub_v3_0_1_init_tlb_regs() argument
230 mmhub_v3_0_1_init_cache_regs(struct amdgpu_device *adev) mmhub_v3_0_1_init_cache_regs() argument
275 mmhub_v3_0_1_enable_system_domain(struct amdgpu_device *adev) mmhub_v3_0_1_enable_system_domain() argument
287 mmhub_v3_0_1_disable_identity_aperture(struct amdgpu_device *adev) mmhub_v3_0_1_disable_identity_aperture() argument
307 mmhub_v3_0_1_setup_vmid_config(struct amdgpu_device *adev) mmhub_v3_0_1_setup_vmid_config() argument
357 mmhub_v3_0_1_program_invalidation(struct amdgpu_device *adev) mmhub_v3_0_1_program_invalidation() argument
370 mmhub_v3_0_1_gart_enable(struct amdgpu_device *adev) mmhub_v3_0_1_gart_enable() argument
386 mmhub_v3_0_1_gart_disable(struct amdgpu_device *adev) mmhub_v3_0_1_gart_disable() argument
417 mmhub_v3_0_1_set_fault_enable_default(struct amdgpu_device *adev, bool value) mmhub_v3_0_1_set_fault_enable_default() argument
460 mmhub_v3_0_1_init(struct amdgpu_device *adev) mmhub_v3_0_1_init() argument
502 mmhub_v3_0_1_get_fb_location(struct amdgpu_device *adev) mmhub_v3_0_1_get_fb_location() argument
513 mmhub_v3_0_1_get_mc_fb_offset(struct amdgpu_device *adev) mmhub_v3_0_1_get_mc_fb_offset() argument
518 mmhub_v3_0_1_update_medium_grain_clock_gating(struct amdgpu_device *adev, bool enable) mmhub_v3_0_1_update_medium_grain_clock_gating() argument
534 mmhub_v3_0_1_update_medium_grain_light_sleep(struct amdgpu_device *adev, bool enable) mmhub_v3_0_1_update_medium_grain_light_sleep() argument
550 mmhub_v3_0_1_set_clockgating(struct amdgpu_device *adev, enum amd_clockgating_state state) mmhub_v3_0_1_set_clockgating() argument
563 mmhub_v3_0_1_get_clockgating(struct amdgpu_device *adev, u64 *flags) mmhub_v3_0_1_get_clockgating() argument
[all...] |
| H A D | mmhub_v3_0_2.c | 96 mmhub_v3_0_2_print_l2_protection_fault_status(struct amdgpu_device *adev, in mmhub_v3_0_2_print_l2_protection_fault_status() argument
129 static void mmhub_v3_0_2_setup_vm_pt_regs(struct amdgpu_device *adev, uint32_t vmid, in mmhub_v3_0_2_setup_vm_pt_regs() argument
143 mmhub_v3_0_2_init_gart_aperture_regs(struct amdgpu_device *adev) mmhub_v3_0_2_init_gart_aperture_regs() argument
160 mmhub_v3_0_2_init_system_aperture_regs(struct amdgpu_device *adev) mmhub_v3_0_2_init_system_aperture_regs() argument
203 mmhub_v3_0_2_init_tlb_regs(struct amdgpu_device *adev) mmhub_v3_0_2_init_tlb_regs() argument
223 mmhub_v3_0_2_init_cache_regs(struct amdgpu_device *adev) mmhub_v3_0_2_init_cache_regs() argument
274 mmhub_v3_0_2_enable_system_domain(struct amdgpu_device *adev) mmhub_v3_0_2_enable_system_domain() argument
286 mmhub_v3_0_2_disable_identity_aperture(struct amdgpu_device *adev) mmhub_v3_0_2_disable_identity_aperture() argument
312 mmhub_v3_0_2_setup_vmid_config(struct amdgpu_device *adev) mmhub_v3_0_2_setup_vmid_config() argument
362 mmhub_v3_0_2_program_invalidation(struct amdgpu_device *adev) mmhub_v3_0_2_program_invalidation() argument
375 mmhub_v3_0_2_gart_enable(struct amdgpu_device *adev) mmhub_v3_0_2_gart_enable() argument
391 mmhub_v3_0_2_gart_disable(struct amdgpu_device *adev) mmhub_v3_0_2_gart_disable() argument
422 mmhub_v3_0_2_set_fault_enable_default(struct amdgpu_device *adev, bool value) mmhub_v3_0_2_set_fault_enable_default() argument
470 mmhub_v3_0_2_init(struct amdgpu_device *adev) mmhub_v3_0_2_init() argument
515 mmhub_v3_0_2_get_fb_location(struct amdgpu_device *adev) mmhub_v3_0_2_get_fb_location() argument
526 mmhub_v3_0_2_get_mc_fb_offset(struct amdgpu_device *adev) mmhub_v3_0_2_get_mc_fb_offset() argument
531 mmhub_v3_0_2_update_medium_grain_clock_gating(struct amdgpu_device *adev, bool enable) mmhub_v3_0_2_update_medium_grain_clock_gating() argument
537 mmhub_v3_0_2_update_medium_grain_light_sleep(struct amdgpu_device *adev, bool enable) mmhub_v3_0_2_update_medium_grain_light_sleep() argument
543 mmhub_v3_0_2_set_clockgating(struct amdgpu_device *adev, enum amd_clockgating_state state) mmhub_v3_0_2_set_clockgating() argument
556 mmhub_v3_0_2_get_clockgating(struct amdgpu_device *adev, u64 *flags) mmhub_v3_0_2_get_clockgating() argument
[all...] |
| H A D | amdgpu_irq.c | 124 void amdgpu_irq_disable_all(struct amdgpu_device *adev) in amdgpu_irq_disable_all() argument
167 struct amdgpu_device *adev = drm_to_adev(dev); in amdgpu_irq_handler() local
188 struct amdgpu_device *adev = container_of(work, struct amdgpu_device, amdgpu_irq_handle_ih1() local
203 struct amdgpu_device *adev = container_of(work, struct amdgpu_device, amdgpu_irq_handle_ih2() local
218 struct amdgpu_device *adev = container_of(work, struct amdgpu_device, amdgpu_irq_handle_ih_soft() local
235 amdgpu_msi_ok(struct amdgpu_device *adev) amdgpu_msi_ok() argument
245 amdgpu_restore_msix(struct amdgpu_device *adev) amdgpu_restore_msix() argument
271 amdgpu_irq_init(struct amdgpu_device *adev) amdgpu_irq_init() argument
322 amdgpu_irq_fini_hw(struct amdgpu_device *adev) amdgpu_irq_fini_hw() argument
346 amdgpu_irq_fini_sw(struct amdgpu_device *adev) amdgpu_irq_fini_sw() argument
381 amdgpu_irq_add_id(struct amdgpu_device *adev, unsigned int client_id, unsigned int src_id, struct amdgpu_irq_src *source) amdgpu_irq_add_id() argument
429 amdgpu_irq_dispatch(struct amdgpu_device *adev, struct amdgpu_ih_ring *ih) amdgpu_irq_dispatch() argument
492 amdgpu_irq_delegate(struct amdgpu_device *adev, struct amdgpu_iv_entry *entry, unsigned int num_dw) amdgpu_irq_delegate() argument
509 amdgpu_irq_update(struct amdgpu_device *adev, struct amdgpu_irq_src *src, unsigned int type) amdgpu_irq_update() argument
539 amdgpu_irq_gpu_reset_resume_helper(struct amdgpu_device *adev) amdgpu_irq_gpu_reset_resume_helper() argument
573 amdgpu_irq_get(struct amdgpu_device *adev, struct amdgpu_irq_src *src, unsigned int type) amdgpu_irq_get() argument
603 amdgpu_irq_put(struct amdgpu_device *adev, struct amdgpu_irq_src *src, unsigned int type) amdgpu_irq_put() argument
637 amdgpu_irq_enabled(struct amdgpu_device *adev, struct amdgpu_irq_src *src, unsigned int type) amdgpu_irq_enabled() argument
710 amdgpu_irq_add_domain(struct amdgpu_device *adev) amdgpu_irq_add_domain() argument
730 amdgpu_irq_remove_domain(struct amdgpu_device *adev) amdgpu_irq_remove_domain() argument
751 amdgpu_irq_create_mapping(struct amdgpu_device *adev, unsigned int src_id) amdgpu_irq_create_mapping() argument
[all...] |
| H A D | amdgpu_pll.c | 84 static void amdgpu_pll_get_fb_ref_div(struct amdgpu_device *adev, unsigned int nom, in amdgpu_pll_get_fb_ref_div() argument
122 void amdgpu_pll_compute(struct amdgpu_device *adev, in amdgpu_pll_compute() argument
|
| H A D | gfxhub_v2_1.c | 79 gfxhub_v2_1_print_l2_protection_fault_status(struct amdgpu_device *adev, in gfxhub_v2_1_print_l2_protection_fault_status() argument
108 static u64 gfxhub_v2_1_get_fb_location(struct amdgpu_device *adev) in gfxhub_v2_1_get_fb_location() argument
118 static u64 gfxhub_v2_1_get_mc_fb_offset(struct amdgpu_device *adev) in gfxhub_v2_1_get_mc_fb_offset() argument
123 gfxhub_v2_1_setup_vm_pt_regs(struct amdgpu_device *adev, uint32_t vmid, uint64_t page_table_base) gfxhub_v2_1_setup_vm_pt_regs() argument
137 gfxhub_v2_1_init_gart_aperture_regs(struct amdgpu_device *adev) gfxhub_v2_1_init_gart_aperture_regs() argument
154 gfxhub_v2_1_init_system_aperture_regs(struct amdgpu_device *adev) gfxhub_v2_1_init_system_aperture_regs() argument
187 gfxhub_v2_1_init_tlb_regs(struct amdgpu_device *adev) gfxhub_v2_1_init_tlb_regs() argument
206 gfxhub_v2_1_init_cache_regs(struct amdgpu_device *adev) gfxhub_v2_1_init_cache_regs() argument
257 gfxhub_v2_1_enable_system_domain(struct amdgpu_device *adev) gfxhub_v2_1_enable_system_domain() argument
269 gfxhub_v2_1_disable_identity_aperture(struct amdgpu_device *adev) gfxhub_v2_1_disable_identity_aperture() argument
292 gfxhub_v2_1_setup_vmid_config(struct amdgpu_device *adev) gfxhub_v2_1_setup_vmid_config() argument
341 gfxhub_v2_1_program_invalidation(struct amdgpu_device *adev) gfxhub_v2_1_program_invalidation() argument
354 gfxhub_v2_1_gart_enable(struct amdgpu_device *adev) gfxhub_v2_1_gart_enable() argument
382 gfxhub_v2_1_gart_disable(struct amdgpu_device *adev) gfxhub_v2_1_gart_disable() argument
414 gfxhub_v2_1_set_fault_enable_default(struct amdgpu_device *adev, bool value) gfxhub_v2_1_set_fault_enable_default() argument
463 gfxhub_v2_1_init(struct amdgpu_device *adev) gfxhub_v2_1_init() argument
505 gfxhub_v2_1_get_xgmi_info(struct amdgpu_device *adev) gfxhub_v2_1_get_xgmi_info() argument
541 gfxhub_v2_1_utcl2_harvest(struct amdgpu_device *adev) gfxhub_v2_1_utcl2_harvest() argument
582 gfxhub_v2_1_save_regs(struct amdgpu_device *adev) gfxhub_v2_1_save_regs() argument
617 gfxhub_v2_1_restore_regs(struct amdgpu_device *adev) gfxhub_v2_1_restore_regs() argument
654 gfxhub_v2_1_halt(struct amdgpu_device *adev) gfxhub_v2_1_halt() argument
[all...] |
| H A D | jpeg_v2_0.c | 49 struct amdgpu_device *adev = (struct amdgpu_device *)handle; in jpeg_v2_0_early_init() local
69 struct amdgpu_device *adev = (struct amdgpu_device *)handle; in jpeg_v2_0_sw_init() local
113 struct amdgpu_device *adev = (struct amdgpu_device *)handle; jpeg_v2_0_sw_fini() local
132 struct amdgpu_device *adev = (struct amdgpu_device *)handle; jpeg_v2_0_hw_init() local
155 struct amdgpu_device *adev = (struct amdgpu_device *)handle; jpeg_v2_0_hw_fini() local
175 struct amdgpu_device *adev = (struct amdgpu_device *)handle; jpeg_v2_0_suspend() local
197 struct amdgpu_device *adev = (struct amdgpu_device *)handle; jpeg_v2_0_resume() local
208 jpeg_v2_0_disable_power_gating(struct amdgpu_device *adev) jpeg_v2_0_disable_power_gating() argument
234 jpeg_v2_0_enable_power_gating(struct amdgpu_device *adev) jpeg_v2_0_enable_power_gating() argument
261 jpeg_v2_0_disable_clock_gating(struct amdgpu_device *adev) jpeg_v2_0_disable_clock_gating() argument
284 jpeg_v2_0_enable_clock_gating(struct amdgpu_device *adev) jpeg_v2_0_enable_clock_gating() argument
314 jpeg_v2_0_start(struct amdgpu_device *adev) jpeg_v2_0_start() argument
363 jpeg_v2_0_stop(struct amdgpu_device *adev) jpeg_v2_0_stop() argument
395 struct amdgpu_device *adev = ring->adev; jpeg_v2_0_dec_ring_get_rptr() local
409 struct amdgpu_device *adev = ring->adev; jpeg_v2_0_dec_ring_get_wptr() local
426 struct amdgpu_device *adev = ring->adev; jpeg_v2_0_dec_ring_set_wptr() local
662 struct amdgpu_device *adev = (struct amdgpu_device *)handle; jpeg_v2_0_is_idle() local
671 struct amdgpu_device *adev = (struct amdgpu_device *)handle; jpeg_v2_0_wait_for_idle() local
683 struct amdgpu_device *adev = (struct amdgpu_device *)handle; jpeg_v2_0_set_clockgating_state() local
700 struct amdgpu_device *adev = (struct amdgpu_device *)handle; jpeg_v2_0_set_powergating_state() local
717 jpeg_v2_0_set_interrupt_state(struct amdgpu_device *adev, struct amdgpu_irq_src *source, unsigned type, enum amdgpu_interrupt_state state) jpeg_v2_0_set_interrupt_state() argument
725 jpeg_v2_0_process_interrupt(struct amdgpu_device *adev, struct amdgpu_irq_src *source, struct amdgpu_iv_entry *entry) jpeg_v2_0_process_interrupt() argument
793 jpeg_v2_0_set_dec_ring_funcs(struct amdgpu_device *adev) jpeg_v2_0_set_dec_ring_funcs() argument
804 jpeg_v2_0_set_irq_funcs(struct amdgpu_device *adev) jpeg_v2_0_set_irq_funcs() argument
[all...] |
| H A D | jpeg_v1_0.c | 40 struct amdgpu_device *adev = ring->adev; in jpeg_v1_0_decode_ring_patch_wreg() local
55 struct amdgpu_device *adev = ring->adev; in jpeg_v1_0_decode_ring_set_patch_ring() local
138 struct amdgpu_device *adev = ring->adev; in jpeg_v1_0_decode_ring_get_rptr() local
152 struct amdgpu_device *adev = ring->adev; in jpeg_v1_0_decode_ring_get_wptr() local
166 struct amdgpu_device *adev = ring->adev; jpeg_v1_0_decode_ring_set_wptr() local
180 struct amdgpu_device *adev = ring->adev; jpeg_v1_0_decode_ring_insert_start() local
199 struct amdgpu_device *adev = ring->adev; jpeg_v1_0_decode_ring_insert_end() local
222 struct amdgpu_device *adev = ring->adev; jpeg_v1_0_decode_ring_emit_fence() local
298 struct amdgpu_device *adev = ring->adev; jpeg_v1_0_decode_ring_emit_ib() local
350 struct amdgpu_device *adev = ring->adev; jpeg_v1_0_decode_ring_emit_reg_wait() local
394 struct amdgpu_device *adev = ring->adev; jpeg_v1_0_decode_ring_emit_wreg() local
424 jpeg_v1_0_set_interrupt_state(struct amdgpu_device *adev, struct amdgpu_irq_src *source, unsigned type, enum amdgpu_interrupt_state state) jpeg_v1_0_set_interrupt_state() argument
432 jpeg_v1_0_process_interrupt(struct amdgpu_device *adev, struct amdgpu_irq_src *source, struct amdgpu_iv_entry *entry) jpeg_v1_0_process_interrupt() argument
460 struct amdgpu_device *adev = (struct amdgpu_device *)handle; jpeg_v1_0_early_init() local
479 struct amdgpu_device *adev = (struct amdgpu_device *)handle; jpeg_v1_0_sw_init() local
511 struct amdgpu_device *adev = (struct amdgpu_device *)handle; jpeg_v1_0_sw_fini() local
524 jpeg_v1_0_start(struct amdgpu_device *adev, int mode) jpeg_v1_0_start() argument
581 jpeg_v1_0_set_dec_ring_funcs(struct amdgpu_device *adev) jpeg_v1_0_set_dec_ring_funcs() argument
592 jpeg_v1_0_set_irq_funcs(struct amdgpu_device *adev) jpeg_v1_0_set_irq_funcs() argument
599 struct amdgpu_device *adev = ring->adev; jpeg_v1_0_ring_begin_use() local
[all...] |
| H A D | mmhub_v1_7.c | 37 static u64 mmhub_v1_7_get_fb_location(struct amdgpu_device *adev) in mmhub_v1_7_get_fb_location() argument
54 static void mmhub_v1_7_setup_vm_pt_regs(struct amdgpu_device *adev, uint32_t vmid, in mmhub_v1_7_setup_vm_pt_regs() argument
66 static void mmhub_v1_7_init_gart_aperture_regs(struct amdgpu_device *adev) in mmhub_v1_7_init_gart_aperture_regs() argument
104 mmhub_v1_7_init_system_aperture_regs(struct amdgpu_device *adev) mmhub_v1_7_init_system_aperture_regs() argument
155 mmhub_v1_7_init_tlb_regs(struct amdgpu_device *adev) mmhub_v1_7_init_tlb_regs() argument
175 mmhub_v1_7_init_cache_regs(struct amdgpu_device *adev) mmhub_v1_7_init_cache_regs() argument
226 mmhub_v1_7_enable_system_domain(struct amdgpu_device *adev) mmhub_v1_7_enable_system_domain() argument
241 mmhub_v1_7_disable_identity_aperture(struct amdgpu_device *adev) mmhub_v1_7_disable_identity_aperture() argument
262 mmhub_v1_7_setup_vmid_config(struct amdgpu_device *adev) mmhub_v1_7_setup_vmid_config() argument
320 mmhub_v1_7_program_invalidation(struct amdgpu_device *adev) mmhub_v1_7_program_invalidation() argument
333 mmhub_v1_7_gart_enable(struct amdgpu_device *adev) mmhub_v1_7_gart_enable() argument
349 mmhub_v1_7_gart_disable(struct amdgpu_device *adev) mmhub_v1_7_gart_disable() argument
384 mmhub_v1_7_set_fault_enable_default(struct amdgpu_device *adev, bool value) mmhub_v1_7_set_fault_enable_default() argument
426 mmhub_v1_7_init(struct amdgpu_device *adev) mmhub_v1_7_init() argument
456 mmhub_v1_7_update_medium_grain_clock_gating(struct amdgpu_device *adev, bool enable) mmhub_v1_7_update_medium_grain_clock_gating() argument
510 mmhub_v1_7_update_medium_grain_light_sleep(struct amdgpu_device *adev, bool enable) mmhub_v1_7_update_medium_grain_light_sleep() argument
526 mmhub_v1_7_set_clockgating(struct amdgpu_device *adev, enum amd_clockgating_state state) mmhub_v1_7_set_clockgating() argument
545 mmhub_v1_7_get_clockgating(struct amdgpu_device *adev, u64 *flags) mmhub_v1_7_get_clockgating() argument
1206 mmhub_v1_7_get_ras_error_count(struct amdgpu_device *adev, const struct soc15_reg_entry *reg, uint32_t value, uint32_t *sec_count, uint32_t *ded_count) mmhub_v1_7_get_ras_error_count() argument
1243 mmhub_v1_7_query_ras_error_count(struct amdgpu_device *adev, void *ras_error_status) mmhub_v1_7_query_ras_error_count() argument
1266 mmhub_v1_7_reset_ras_error_count(struct amdgpu_device *adev) mmhub_v1_7_reset_ras_error_count() argument
1286 mmhub_v1_7_query_ras_error_status(struct amdgpu_device *adev) mmhub_v1_7_query_ras_error_status() argument
1306 mmhub_v1_7_reset_ras_error_status(struct amdgpu_device *adev) mmhub_v1_7_reset_ras_error_status() argument
[all...] |
| H A D | mmhub_v1_0.c | 37 static u64 mmhub_v1_0_get_fb_location(struct amdgpu_device *adev) in mmhub_v1_0_get_fb_location() argument
54 static void mmhub_v1_0_setup_vm_pt_regs(struct amdgpu_device *adev, uint32_t vmid, in mmhub_v1_0_setup_vm_pt_regs() argument
68 static void mmhub_v1_0_init_gart_aperture_regs(struct amdgpu_device *adev) in mmhub_v1_0_init_gart_aperture_regs() argument
85 mmhub_v1_0_init_system_aperture_regs(struct amdgpu_device *adev) mmhub_v1_0_init_system_aperture_regs() argument
137 mmhub_v1_0_init_tlb_regs(struct amdgpu_device *adev) mmhub_v1_0_init_tlb_regs() argument
157 mmhub_v1_0_init_cache_regs(struct amdgpu_device *adev) mmhub_v1_0_init_cache_regs() argument
199 mmhub_v1_0_enable_system_domain(struct amdgpu_device *adev) mmhub_v1_0_enable_system_domain() argument
211 mmhub_v1_0_disable_identity_aperture(struct amdgpu_device *adev) mmhub_v1_0_disable_identity_aperture() argument
232 mmhub_v1_0_setup_vmid_config(struct amdgpu_device *adev) mmhub_v1_0_setup_vmid_config() argument
288 mmhub_v1_0_program_invalidation(struct amdgpu_device *adev) mmhub_v1_0_program_invalidation() argument
301 mmhub_v1_0_update_power_gating(struct amdgpu_device *adev, bool enable) mmhub_v1_0_update_power_gating() argument
313 mmhub_v1_0_gart_enable(struct amdgpu_device *adev) mmhub_v1_0_gart_enable() argument
341 mmhub_v1_0_gart_disable(struct amdgpu_device *adev) mmhub_v1_0_gart_disable() argument
376 mmhub_v1_0_set_fault_enable_default(struct amdgpu_device *adev, bool value) mmhub_v1_0_set_fault_enable_default() argument
418 mmhub_v1_0_init(struct amdgpu_device *adev) mmhub_v1_0_init() argument
449 mmhub_v1_0_update_medium_grain_clock_gating(struct amdgpu_device *adev, bool enable) mmhub_v1_0_update_medium_grain_clock_gating() argument
512 mmhub_v1_0_update_medium_grain_light_sleep(struct amdgpu_device *adev, bool enable) mmhub_v1_0_update_medium_grain_light_sleep() argument
528 mmhub_v1_0_set_clockgating(struct amdgpu_device *adev, enum amd_clockgating_state state) mmhub_v1_0_set_clockgating() argument
552 mmhub_v1_0_get_clockgating(struct amdgpu_device *adev, u64 *flags) mmhub_v1_0_get_clockgating() argument
708 mmhub_v1_0_get_ras_error_count(struct amdgpu_device *adev, const struct soc15_reg_entry *reg, uint32_t value, uint32_t *sec_count, uint32_t *ded_count) mmhub_v1_0_get_ras_error_count() argument
745 mmhub_v1_0_query_ras_error_count(struct amdgpu_device *adev, void *ras_error_status) mmhub_v1_0_query_ras_error_count() argument
769 mmhub_v1_0_reset_ras_error_count(struct amdgpu_device *adev) mmhub_v1_0_reset_ras_error_count() argument
[all...] |
| H A D | amdgpu_bios.c | 91 static bool igp_read_bios_from_vram(struct amdgpu_device *adev) in igp_read_bios_from_vram() argument
128 amdgpu_read_bios(struct amdgpu_device *adev) amdgpu_read_bios() argument
156 amdgpu_read_bios_from_rom(struct amdgpu_device *adev) amdgpu_read_bios_from_rom() argument
196 amdgpu_read_platform_bios(struct amdgpu_device *adev) amdgpu_read_platform_bios() argument
277 amdgpu_atrm_get_bios(struct amdgpu_device *adev) amdgpu_atrm_get_bios() argument
348 amdgpu_atrm_get_bios(struct amdgpu_device *adev) amdgpu_atrm_get_bios() argument
354 amdgpu_read_disabled_bios(struct amdgpu_device *adev) amdgpu_read_disabled_bios() argument
364 amdgpu_acpi_vfct_bios(struct amdgpu_device *adev) amdgpu_acpi_vfct_bios() argument
421 amdgpu_acpi_vfct_bios(struct amdgpu_device *adev) amdgpu_acpi_vfct_bios() argument
427 amdgpu_get_bios(struct amdgpu_device *adev) amdgpu_get_bios() argument
473 amdgpu_soc15_read_bios_from_rom(struct amdgpu_device *adev, u8 *bios, u32 length_bytes) amdgpu_soc15_read_bios_from_rom() argument
[all...] |
| H A D | amdgpu_ids.c | 161 bool amdgpu_vmid_had_gpu_reset(struct amdgpu_device *adev, in amdgpu_vmid_had_gpu_reset() argument
204 struct amdgpu_device *adev = ring->adev; in amdgpu_vmid_grab_idle() local
279 struct amdgpu_device *adev in amdgpu_vmid_grab_reserved() local
340 struct amdgpu_device *adev = ring->adev; amdgpu_vmid_grab_used() local
400 struct amdgpu_device *adev = ring->adev; amdgpu_vmid_grab() local
462 amdgpu_vmid_alloc_reserved(struct amdgpu_device *adev, unsigned vmhub) amdgpu_vmid_alloc_reserved() argument
484 amdgpu_vmid_free_reserved(struct amdgpu_device *adev, unsigned vmhub) amdgpu_vmid_free_reserved() argument
508 amdgpu_vmid_reset(struct amdgpu_device *adev, unsigned vmhub, unsigned vmid) amdgpu_vmid_reset() argument
532 amdgpu_vmid_reset_all(struct amdgpu_device *adev) amdgpu_vmid_reset_all() argument
552 amdgpu_vmid_mgr_init(struct amdgpu_device *adev) amdgpu_vmid_mgr_init() argument
587 amdgpu_vmid_mgr_fini(struct amdgpu_device *adev) amdgpu_vmid_mgr_fini() argument
[all...] |
| H A D | amdgpu_ib.c | 64 int amdgpu_ib_get(struct amdgpu_device *adev, struct amdgpu_vm *vm, in amdgpu_ib_get() argument
98 void amdgpu_ib_free(struct amdgpu_device *adev, struct amdgpu_ib *ib, in amdgpu_ib_free() argument
130 struct amdgpu_device *adev = ring->adev; in amdgpu_ib_schedule() local
330 amdgpu_ib_pool_init(struct amdgpu_device *adev) amdgpu_ib_pool_init() argument
362 amdgpu_ib_pool_fini(struct amdgpu_device *adev) amdgpu_ib_pool_fini() argument
384 amdgpu_ib_ring_tests(struct amdgpu_device *adev) amdgpu_ib_ring_tests() argument
466 struct amdgpu_device *adev = m->private; amdgpu_debugfs_sa_info_show() local
484 amdgpu_debugfs_sa_init(struct amdgpu_device *adev) amdgpu_debugfs_sa_init() argument
[all...] |
| H A D | amdgpu_ring_mux.c | 319 struct amdgpu_device *adev = ring->adev; in amdgpu_sw_ring_get_rptr_gfx() local
328 struct amdgpu_device *adev = ring->adev; in amdgpu_sw_ring_get_wptr_gfx() local
337 struct amdgpu_device *adev = ring->adev; in amdgpu_sw_ring_set_wptr_gfx() local
396 struct amdgpu_device *adev in amdgpu_sw_ring_ib_begin() local
411 struct amdgpu_device *adev = ring->adev; amdgpu_sw_ring_ib_end() local
422 struct amdgpu_device *adev = ring->adev; amdgpu_sw_ring_ib_mark_offset() local
[all...] |
| H A D | mmhub_v1_8.c | 37 static u64 mmhub_v1_8_get_fb_location(struct amdgpu_device *adev) in mmhub_v1_8_get_fb_location() argument
54 static void mmhub_v1_8_setup_vm_pt_regs(struct amdgpu_device *adev, uint32_t vmid, in mmhub_v1_8_setup_vm_pt_regs() argument
76 static void mmhub_v1_8_init_gart_aperture_regs(struct amdgpu_device *adev) in mmhub_v1_8_init_gart_aperture_regs() argument
127 mmhub_v1_8_init_system_aperture_regs(struct amdgpu_device *adev) mmhub_v1_8_init_system_aperture_regs() argument
190 mmhub_v1_8_init_tlb_regs(struct amdgpu_device *adev) mmhub_v1_8_init_tlb_regs() argument
216 mmhub_v1_8_init_cache_regs(struct amdgpu_device *adev) mmhub_v1_8_init_cache_regs() argument
277 mmhub_v1_8_enable_system_domain(struct amdgpu_device *adev) mmhub_v1_8_enable_system_domain() argument
297 mmhub_v1_8_disable_identity_aperture(struct amdgpu_device *adev) mmhub_v1_8_disable_identity_aperture() argument
328 mmhub_v1_8_setup_vmid_config(struct amdgpu_device *adev) mmhub_v1_8_setup_vmid_config() argument
395 mmhub_v1_8_program_invalidation(struct amdgpu_device *adev) mmhub_v1_8_program_invalidation() argument
414 mmhub_v1_8_gart_enable(struct amdgpu_device *adev) mmhub_v1_8_gart_enable() argument
430 mmhub_v1_8_gart_disable(struct amdgpu_device *adev) mmhub_v1_8_gart_disable() argument
469 mmhub_v1_8_set_fault_enable_default(struct amdgpu_device *adev, bool value) mmhub_v1_8_set_fault_enable_default() argument
514 mmhub_v1_8_init(struct amdgpu_device *adev) mmhub_v1_8_init() argument
550 mmhub_v1_8_set_clockgating(struct amdgpu_device *adev, enum amd_clockgating_state state) mmhub_v1_8_set_clockgating() argument
556 mmhub_v1_8_get_clockgating(struct amdgpu_device *adev, u64 *flags) mmhub_v1_8_get_clockgating() argument
624 mmhub_v1_8_inst_query_ras_error_count(struct amdgpu_device *adev, uint32_t mmhub_inst, void *ras_err_status) mmhub_v1_8_inst_query_ras_error_count() argument
648 mmhub_v1_8_query_ras_error_count(struct amdgpu_device *adev, void *ras_err_status) mmhub_v1_8_query_ras_error_count() argument
664 mmhub_v1_8_inst_reset_ras_error_count(struct amdgpu_device *adev, uint32_t mmhub_inst) mmhub_v1_8_inst_reset_ras_error_count() argument
677 mmhub_v1_8_reset_ras_error_count(struct amdgpu_device *adev) mmhub_v1_8_reset_ras_error_count() argument
700 mmhub_v1_8_inst_query_ras_err_status(struct amdgpu_device *adev, uint32_t mmhub_inst) mmhub_v1_8_inst_query_ras_err_status() argument
733 mmhub_v1_8_query_ras_error_status(struct amdgpu_device *adev) mmhub_v1_8_query_ras_error_status() argument
748 mmhub_v1_8_inst_reset_ras_err_status(struct amdgpu_device *adev, uint32_t mmhub_inst) mmhub_v1_8_inst_reset_ras_err_status() argument
818 mmhub_v1_8_reset_ras_error_status(struct amdgpu_device *adev) mmhub_v1_8_reset_ras_error_status() argument
[all...] |
| H A D | mmhub_v3_0.c | 96 mmhub_v3_0_print_l2_protection_fault_status(struct amdgpu_device *adev, in mmhub_v3_0_print_l2_protection_fault_status() argument
136 static void mmhub_v3_0_setup_vm_pt_regs(struct amdgpu_device *adev, uint32_ argument
150 mmhub_v3_0_init_gart_aperture_regs(struct amdgpu_device *adev) mmhub_v3_0_init_gart_aperture_regs() argument
167 mmhub_v3_0_init_system_aperture_regs(struct amdgpu_device *adev) mmhub_v3_0_init_system_aperture_regs() argument
211 mmhub_v3_0_init_tlb_regs(struct amdgpu_device *adev) mmhub_v3_0_init_tlb_regs() argument
231 mmhub_v3_0_init_cache_regs(struct amdgpu_device *adev) mmhub_v3_0_init_cache_regs() argument
282 mmhub_v3_0_enable_system_domain(struct amdgpu_device *adev) mmhub_v3_0_enable_system_domain() argument
294 mmhub_v3_0_disable_identity_aperture(struct amdgpu_device *adev) mmhub_v3_0_disable_identity_aperture() argument
320 mmhub_v3_0_setup_vmid_config(struct amdgpu_device *adev) mmhub_v3_0_setup_vmid_config() argument
370 mmhub_v3_0_program_invalidation(struct amdgpu_device *adev) mmhub_v3_0_program_invalidation() argument
383 mmhub_v3_0_gart_enable(struct amdgpu_device *adev) mmhub_v3_0_gart_enable() argument
399 mmhub_v3_0_gart_disable(struct amdgpu_device *adev) mmhub_v3_0_gart_disable() argument
430 mmhub_v3_0_set_fault_enable_default(struct amdgpu_device *adev, bool value) mmhub_v3_0_set_fault_enable_default() argument
478 mmhub_v3_0_init(struct amdgpu_device *adev) mmhub_v3_0_init() argument
526 mmhub_v3_0_get_fb_location(struct amdgpu_device *adev) mmhub_v3_0_get_fb_location() argument
538 mmhub_v3_0_get_mc_fb_offset(struct amdgpu_device *adev) mmhub_v3_0_get_mc_fb_offset() argument
543 mmhub_v3_0_update_medium_grain_clock_gating(struct amdgpu_device *adev, bool enable) mmhub_v3_0_update_medium_grain_clock_gating() argument
604 mmhub_v3_0_update_medium_grain_light_sleep(struct amdgpu_device *adev, bool enable) mmhub_v3_0_update_medium_grain_light_sleep() argument
620 mmhub_v3_0_set_clockgating(struct amdgpu_device *adev, enum amd_clockgating_state state) mmhub_v3_0_set_clockgating() argument
637 mmhub_v3_0_get_clockgating(struct amdgpu_device *adev, u64 *flags) mmhub_v3_0_get_clockgating() argument
[all...] |
| H A D | mmhub_v2_3.c | 79 mmhub_v2_3_print_l2_protection_fault_status(struct amdgpu_device *adev, in mmhub_v2_3_print_l2_protection_fault_status() argument
120 static void mmhub_v2_3_setup_vm_pt_regs(struct amdgpu_device *adev, in mmhub_v2_3_setup_vm_pt_regs() argument
133 mmhub_v2_3_init_gart_aperture_regs(struct amdgpu_device *adev) mmhub_v2_3_init_gart_aperture_regs() argument
150 mmhub_v2_3_init_system_aperture_regs(struct amdgpu_device *adev) mmhub_v2_3_init_system_aperture_regs() argument
185 mmhub_v2_3_init_tlb_regs(struct amdgpu_device *adev) mmhub_v2_3_init_tlb_regs() argument
204 mmhub_v2_3_init_cache_regs(struct amdgpu_device *adev) mmhub_v2_3_init_cache_regs() argument
249 mmhub_v2_3_enable_system_domain(struct amdgpu_device *adev) mmhub_v2_3_enable_system_domain() argument
261 mmhub_v2_3_disable_identity_aperture(struct amdgpu_device *adev) mmhub_v2_3_disable_identity_aperture() argument
281 mmhub_v2_3_setup_vmid_config(struct amdgpu_device *adev) mmhub_v2_3_setup_vmid_config() argument
331 mmhub_v2_3_program_invalidation(struct amdgpu_device *adev) mmhub_v2_3_program_invalidation() argument
346 mmhub_v2_3_gart_enable(struct amdgpu_device *adev) mmhub_v2_3_gart_enable() argument
374 mmhub_v2_3_gart_disable(struct amdgpu_device *adev) mmhub_v2_3_gart_disable() argument
405 mmhub_v2_3_set_fault_enable_default(struct amdgpu_device *adev, bool value) mmhub_v2_3_set_fault_enable_default() argument
448 mmhub_v2_3_init(struct amdgpu_device *adev) mmhub_v2_3_init() argument
492 mmhub_v2_3_update_medium_grain_clock_gating(struct amdgpu_device *adev, bool enable) mmhub_v2_3_update_medium_grain_clock_gating() argument
526 mmhub_v2_3_update_medium_grain_light_sleep(struct amdgpu_device *adev, bool enable) mmhub_v2_3_update_medium_grain_light_sleep() argument
569 mmhub_v2_3_set_clockgating(struct amdgpu_device *adev, enum amd_clockgating_state state) mmhub_v2_3_set_clockgating() argument
583 mmhub_v2_3_get_clockgating(struct amdgpu_device *adev, u64 *flags) mmhub_v2_3_get_clockgating() argument
[all...] |
| H A D | mmhub_v2_0.c | 140 mmhub_v2_0_print_l2_protection_fault_status(struct amdgpu_device *adev, in mmhub_v2_0_print_l2_protection_fault_status() argument
187 static void mmhub_v2_0_setup_vm_pt_regs(struct amdgpu_device *adev, uint32_ argument
201 mmhub_v2_0_init_gart_aperture_regs(struct amdgpu_device *adev) mmhub_v2_0_init_gart_aperture_regs() argument
218 mmhub_v2_0_init_system_aperture_regs(struct amdgpu_device *adev) mmhub_v2_0_init_system_aperture_regs() argument
255 mmhub_v2_0_init_tlb_regs(struct amdgpu_device *adev) mmhub_v2_0_init_tlb_regs() argument
274 mmhub_v2_0_init_cache_regs(struct amdgpu_device *adev) mmhub_v2_0_init_cache_regs() argument
325 mmhub_v2_0_enable_system_domain(struct amdgpu_device *adev) mmhub_v2_0_enable_system_domain() argument
337 mmhub_v2_0_disable_identity_aperture(struct amdgpu_device *adev) mmhub_v2_0_disable_identity_aperture() argument
363 mmhub_v2_0_setup_vmid_config(struct amdgpu_device *adev) mmhub_v2_0_setup_vmid_config() argument
413 mmhub_v2_0_program_invalidation(struct amdgpu_device *adev) mmhub_v2_0_program_invalidation() argument
426 mmhub_v2_0_gart_enable(struct amdgpu_device *adev) mmhub_v2_0_gart_enable() argument
442 mmhub_v2_0_gart_disable(struct amdgpu_device *adev) mmhub_v2_0_gart_disable() argument
473 mmhub_v2_0_set_fault_enable_default(struct amdgpu_device *adev, bool value) mmhub_v2_0_set_fault_enable_default() argument
521 mmhub_v2_0_init(struct amdgpu_device *adev) mmhub_v2_0_init() argument
563 mmhub_v2_0_update_medium_grain_clock_gating(struct amdgpu_device *adev, bool enable) mmhub_v2_0_update_medium_grain_clock_gating() argument
620 mmhub_v2_0_update_medium_grain_light_sleep(struct amdgpu_device *adev, bool enable) mmhub_v2_0_update_medium_grain_light_sleep() argument
648 mmhub_v2_0_set_clockgating(struct amdgpu_device *adev, enum amd_clockgating_state state) mmhub_v2_0_set_clockgating() argument
672 mmhub_v2_0_get_clockgating(struct amdgpu_device *adev, u64 *flags) mmhub_v2_0_get_clockgating() argument
[all...] |
| H A D | mxgpu_vi.c | 279 void xgpu_vi_init_golden_registers(struct amdgpu_device *adev) in xgpu_vi_init_golden_registers() argument
319 static void xgpu_vi_mailbox_send_ack(struct amdgpu_device *adev) in xgpu_vi_mailbox_send_ack() argument
343 static void xgpu_vi_mailbox_set_valid(struct amdgpu_device *adev, boo argument
353 xgpu_vi_mailbox_trans_msg(struct amdgpu_device *adev, enum idh_request req) xgpu_vi_mailbox_trans_msg() argument
366 xgpu_vi_mailbox_rcv_msg(struct amdgpu_device *adev, enum idh_event event) xgpu_vi_mailbox_rcv_msg() argument
389 xgpu_vi_poll_ack(struct amdgpu_device *adev) xgpu_vi_poll_ack() argument
411 xgpu_vi_poll_msg(struct amdgpu_device *adev, enum idh_event event) xgpu_vi_poll_msg() argument
431 xgpu_vi_send_access_requests(struct amdgpu_device *adev, enum idh_request request) xgpu_vi_send_access_requests() argument
459 xgpu_vi_request_reset(struct amdgpu_device *adev) xgpu_vi_request_reset() argument
464 xgpu_vi_wait_reset_cmpl(struct amdgpu_device *adev) xgpu_vi_wait_reset_cmpl() argument
469 xgpu_vi_request_full_gpu_access(struct amdgpu_device *adev, bool init) xgpu_vi_request_full_gpu_access() argument
478 xgpu_vi_release_full_gpu_access(struct amdgpu_device *adev, bool init) xgpu_vi_release_full_gpu_access() argument
491 xgpu_vi_mailbox_ack_irq(struct amdgpu_device *adev, struct amdgpu_irq_src *source, struct amdgpu_iv_entry *entry) xgpu_vi_mailbox_ack_irq() argument
499 xgpu_vi_set_mailbox_ack_irq(struct amdgpu_device *adev, struct amdgpu_irq_src *src, unsigned type, enum amdgpu_interrupt_state state) xgpu_vi_set_mailbox_ack_irq() argument
516 struct amdgpu_device *adev = container_of(virt, struct amdgpu_device, virt); xgpu_vi_mailbox_flr_work() local
537 xgpu_vi_set_mailbox_rcv_irq(struct amdgpu_device *adev, struct amdgpu_irq_src *src, unsigned type, enum amdgpu_interrupt_state state) xgpu_vi_set_mailbox_rcv_irq() argument
551 xgpu_vi_mailbox_rcv_irq(struct amdgpu_device *adev, struct amdgpu_irq_src *source, struct amdgpu_iv_entry *entry) xgpu_vi_mailbox_rcv_irq() argument
583 xgpu_vi_mailbox_set_irq_funcs(struct amdgpu_device *adev) xgpu_vi_mailbox_set_irq_funcs() argument
591 xgpu_vi_mailbox_add_irq_id(struct amdgpu_device *adev) xgpu_vi_mailbox_add_irq_id() argument
608 xgpu_vi_mailbox_get_irq(struct amdgpu_device *adev) xgpu_vi_mailbox_get_irq() argument
626 xgpu_vi_mailbox_put_irq(struct amdgpu_device *adev) xgpu_vi_mailbox_put_irq() argument
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| H A D | navi10_ih.c | 49 static void navi10_ih_init_register_offset(struct amdgpu_device *adev) in navi10_ih_init_register_offset() argument
105 force_update_wptr_for_self_int(struct amdgpu_device *adev, u32 threshold, u32 timeout, bool enabled) force_update_wptr_for_self_int() argument
152 navi10_ih_toggle_ring_interrupts(struct amdgpu_device *adev, struct amdgpu_ih_ring *ih, bool enable) navi10_ih_toggle_ring_interrupts() argument
196 navi10_ih_toggle_interrupts(struct amdgpu_device *adev, bool enable) navi10_ih_toggle_interrupts() argument
263 navi10_ih_enable_ring(struct amdgpu_device *adev, struct amdgpu_ih_ring *ih) navi10_ih_enable_ring() argument
317 navi10_ih_irq_init(struct amdgpu_device *adev) navi10_ih_irq_init() argument
386 navi10_ih_irq_disable(struct amdgpu_device *adev) navi10_ih_irq_disable() argument
406 navi10_ih_get_wptr(struct amdgpu_device *adev, struct amdgpu_ih_ring *ih) navi10_ih_get_wptr() argument
462 navi10_ih_irq_rearm(struct amdgpu_device *adev, struct amdgpu_ih_ring *ih) navi10_ih_irq_rearm() argument
489 navi10_ih_set_rptr(struct amdgpu_device *adev, struct amdgpu_ih_ring *ih) navi10_ih_set_rptr() argument
519 navi10_ih_self_irq(struct amdgpu_device *adev, struct amdgpu_irq_src *source, struct amdgpu_iv_entry *entry) navi10_ih_self_irq() argument
539 navi10_ih_set_self_irq_funcs(struct amdgpu_device *adev) navi10_ih_set_self_irq_funcs() argument
547 struct amdgpu_device *adev = (struct amdgpu_device *)handle; navi10_ih_early_init() local
557 struct amdgpu_device *adev = (struct amdgpu_device *)handle; navi10_ih_sw_init() local
598 struct amdgpu_device *adev = (struct amdgpu_device *)handle; navi10_ih_sw_fini() local
607 struct amdgpu_device *adev = (struct amdgpu_device *)handle; navi10_ih_hw_init() local
614 struct amdgpu_device *adev = (struct amdgpu_device *)handle; navi10_ih_hw_fini() local
623 struct amdgpu_device *adev = (struct amdgpu_device *)handle; navi10_ih_suspend() local
630 struct amdgpu_device *adev = (struct amdgpu_device *)handle; navi10_ih_resume() local
653 navi10_ih_update_clockgating_state(struct amdgpu_device *adev, bool enable) navi10_ih_update_clockgating_state() argument
681 struct amdgpu_device *adev = (struct amdgpu_device *)handle; navi10_ih_set_clockgating_state() local
696 struct amdgpu_device *adev = (struct amdgpu_device *)handle; navi10_ih_get_clockgating_state() local
729 navi10_ih_set_interrupt_funcs(struct amdgpu_device *adev) navi10_ih_set_interrupt_funcs() argument
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| H A D | mxgpu_ai.c | 37 static void xgpu_ai_mailbox_send_ack(struct amdgpu_device *adev) in xgpu_ai_mailbox_send_ack() argument
42 static void xgpu_ai_mailbox_set_valid(struct amdgpu_device *adev, bool val) in xgpu_ai_mailbox_set_valid() argument
56 static enum idh_event xgpu_ai_mailbox_peek_msg(struct amdgpu_device *adev) in xgpu_ai_mailbox_peek_msg() argument
63 static int xgpu_ai_mailbox_rcv_msg(struct amdgpu_device *adev, in xgpu_ai_mailbox_rcv_msg() argument
78 static uint8_t xgpu_ai_peek_ack(struct amdgpu_device *adev) { in xgpu_ai_peek_ack() argument
82 static int xgpu_ai_poll_ack(struct amdgpu_device *adev) in xgpu_ai_poll_ack() argument
101 static int xgpu_ai_poll_msg(struct amdgpu_device *adev, enum idh_event event) in xgpu_ai_poll_msg() argument
119 static void xgpu_ai_mailbox_trans_msg (struct amdgpu_device *adev, in xgpu_ai_mailbox_trans_msg() argument
163 xgpu_ai_send_access_requests(struct amdgpu_device *adev, enum idh_request req) xgpu_ai_send_access_requests() argument
195 xgpu_ai_request_reset(struct amdgpu_device *adev) xgpu_ai_request_reset() argument
209 xgpu_ai_request_full_gpu_access(struct amdgpu_device *adev, bool init) xgpu_ai_request_full_gpu_access() argument
218 xgpu_ai_release_full_gpu_access(struct amdgpu_device *adev, bool init) xgpu_ai_release_full_gpu_access() argument
230 xgpu_ai_mailbox_ack_irq(struct amdgpu_device *adev, struct amdgpu_irq_src *source, struct amdgpu_iv_entry *entry) xgpu_ai_mailbox_ack_irq() argument
238 xgpu_ai_set_mailbox_ack_irq(struct amdgpu_device *adev, struct amdgpu_irq_src *source, unsigned type, enum amdgpu_interrupt_state state) xgpu_ai_set_mailbox_ack_irq() argument
255 struct amdgpu_device *adev = container_of(virt, struct amdgpu_device, virt); xgpu_ai_mailbox_flr_work() local
298 xgpu_ai_set_mailbox_rcv_irq(struct amdgpu_device *adev, struct amdgpu_irq_src *src, unsigned type, enum amdgpu_interrupt_state state) xgpu_ai_set_mailbox_rcv_irq() argument
312 xgpu_ai_mailbox_rcv_irq(struct amdgpu_device *adev, struct amdgpu_irq_src *source, struct amdgpu_iv_entry *entry) xgpu_ai_mailbox_rcv_irq() argument
353 xgpu_ai_mailbox_set_irq_funcs(struct amdgpu_device *adev) xgpu_ai_mailbox_set_irq_funcs() argument
361 xgpu_ai_mailbox_add_irq_id(struct amdgpu_device *adev) xgpu_ai_mailbox_add_irq_id() argument
378 xgpu_ai_mailbox_get_irq(struct amdgpu_device *adev) xgpu_ai_mailbox_get_irq() argument
396 xgpu_ai_mailbox_put_irq(struct amdgpu_device *adev) xgpu_ai_mailbox_put_irq() argument
402 xgpu_ai_request_init_data(struct amdgpu_device *adev) xgpu_ai_request_init_data() argument
407 xgpu_ai_ras_poison_handler(struct amdgpu_device *adev) xgpu_ai_ras_poison_handler() argument
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| H A D | mxgpu_nv.c | 36 static void xgpu_nv_mailbox_send_ack(struct amdgpu_device *adev) in xgpu_nv_mailbox_send_ack() argument
41 static void xgpu_nv_mailbox_set_valid(struct amdgpu_device *adev, bool val) in xgpu_nv_mailbox_set_valid() argument
55 static enum idh_event xgpu_nv_mailbox_peek_msg(struct amdgpu_device *adev) in xgpu_nv_mailbox_peek_msg() argument
61 static int xgpu_nv_mailbox_rcv_msg(struct amdgpu_device *adev, in xgpu_nv_mailbox_rcv_msg() argument
75 static uint8_t xgpu_nv_peek_ack(struct amdgpu_device *adev) in xgpu_nv_peek_ack() argument
80 static int xgpu_nv_poll_ack(struct amdgpu_device *adev) in xgpu_nv_poll_ack() argument
99 static int xgpu_nv_poll_msg(struct amdgpu_device *adev, enum idh_event event) in xgpu_nv_poll_msg() argument
120 static void xgpu_nv_mailbox_trans_msg (struct amdgpu_device *adev, in xgpu_nv_mailbox_trans_msg() argument
155 xgpu_nv_send_access_requests(struct amdgpu_device *adev, enum idh_request req) xgpu_nv_send_access_requests() argument
209 xgpu_nv_request_reset(struct amdgpu_device *adev) xgpu_nv_request_reset() argument
223 xgpu_nv_request_full_gpu_access(struct amdgpu_device *adev, bool init) xgpu_nv_request_full_gpu_access() argument
232 xgpu_nv_release_full_gpu_access(struct amdgpu_device *adev, bool init) xgpu_nv_release_full_gpu_access() argument
244 xgpu_nv_request_init_data(struct amdgpu_device *adev) xgpu_nv_request_init_data() argument
249 xgpu_nv_mailbox_ack_irq(struct amdgpu_device *adev, struct amdgpu_irq_src *source, struct amdgpu_iv_entry *entry) xgpu_nv_mailbox_ack_irq() argument
257 xgpu_nv_set_mailbox_ack_irq(struct amdgpu_device *adev, struct amdgpu_irq_src *source, unsigned type, enum amdgpu_interrupt_state state) xgpu_nv_set_mailbox_ack_irq() argument
277 struct amdgpu_device *adev = container_of(virt, struct amdgpu_device, virt); xgpu_nv_mailbox_flr_work() local
323 xgpu_nv_set_mailbox_rcv_irq(struct amdgpu_device *adev, struct amdgpu_irq_src *src, unsigned type, enum amdgpu_interrupt_state state) xgpu_nv_set_mailbox_rcv_irq() argument
340 xgpu_nv_mailbox_rcv_irq(struct amdgpu_device *adev, struct amdgpu_irq_src *source, struct amdgpu_iv_entry *entry) xgpu_nv_mailbox_rcv_irq() argument
378 xgpu_nv_mailbox_set_irq_funcs(struct amdgpu_device *adev) xgpu_nv_mailbox_set_irq_funcs() argument
386 xgpu_nv_mailbox_add_irq_id(struct amdgpu_device *adev) xgpu_nv_mailbox_add_irq_id() argument
403 xgpu_nv_mailbox_get_irq(struct amdgpu_device *adev) xgpu_nv_mailbox_get_irq() argument
421 xgpu_nv_mailbox_put_irq(struct amdgpu_device *adev) xgpu_nv_mailbox_put_irq() argument
427 xgpu_nv_ras_poison_handler(struct amdgpu_device *adev) xgpu_nv_ras_poison_handler() argument
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| H A D | nbio_v4_3.c | 32 static void nbio_v4_3_remap_hdp_registers(struct amdgpu_device *adev) in nbio_v4_3_remap_hdp_registers() argument
40 static u32 nbio_v4_3_get_rev_id(struct amdgpu_device *adev) in nbio_v4_3_get_rev_id() argument
50 static void nbio_v4_3_mc_access_enable(struct amdgpu_device *adev, bool enable) in nbio_v4_3_mc_access_enable() argument
60 static u32 nbio_v4_3_get_memsize(struct amdgpu_device *adev) in nbio_v4_3_get_memsize() argument
65 static void nbio_v4_3_sdma_doorbell_range(struct amdgpu_device *adev, int instance, in nbio_v4_3_sdma_doorbell_range() argument
103 static void nbio_v4_3_vcn_doorbell_range(struct amdgpu_device *adev, bool use_doorbell, in nbio_v4_3_vcn_doorbell_range() argument
146 static void nbio_v4_3_gc_doorbell_init(struct amdgpu_device *adev) in nbio_v4_3_gc_doorbell_init() argument
152 static void nbio_v4_3_enable_doorbell_aperture(struct amdgpu_device *adev, in nbio_v4_3_enable_doorbell_aperture() argument
159 nbio_v4_3_enable_doorbell_selfring_aperture(struct amdgpu_device *adev, bool enable) nbio_v4_3_enable_doorbell_selfring_aperture() argument
182 nbio_v4_3_ih_doorbell_range(struct amdgpu_device *adev, bool use_doorbell, int doorbell_index) nbio_v4_3_ih_doorbell_range() argument
217 nbio_v4_3_ih_control(struct amdgpu_device *adev) nbio_v4_3_ih_control() argument
239 nbio_v4_3_update_medium_grain_clock_gating(struct amdgpu_device *adev, bool enable) nbio_v4_3_update_medium_grain_clock_gating() argument
268 nbio_v4_3_update_medium_grain_light_sleep(struct amdgpu_device *adev, bool enable) nbio_v4_3_update_medium_grain_light_sleep() argument
288 nbio_v4_3_get_clockgating_state(struct amdgpu_device *adev, u64 *flags) nbio_v4_3_get_clockgating_state() argument
304 nbio_v4_3_get_hdp_flush_req_offset(struct amdgpu_device *adev) nbio_v4_3_get_hdp_flush_req_offset() argument
309 nbio_v4_3_get_hdp_flush_done_offset(struct amdgpu_device *adev) nbio_v4_3_get_hdp_flush_done_offset() argument
314 nbio_v4_3_get_pcie_index_offset(struct amdgpu_device *adev) nbio_v4_3_get_pcie_index_offset() argument
319 nbio_v4_3_get_pcie_data_offset(struct amdgpu_device *adev) nbio_v4_3_get_pcie_data_offset() argument
339 nbio_v4_3_init_registers(struct amdgpu_device *adev) nbio_v4_3_init_registers() argument
353 nbio_v4_3_get_rom_offset(struct amdgpu_device *adev) nbio_v4_3_get_rom_offset() argument
364 nbio_v4_3_program_ltr(struct amdgpu_device *adev) nbio_v4_3_program_ltr() argument
390 nbio_v4_3_program_aspm(struct amdgpu_device *adev) nbio_v4_3_program_aspm() argument
503 nbio_v4_3_sriov_ih_doorbell_range(struct amdgpu_device *adev, bool use_doorbell, int doorbell_index) nbio_v4_3_sriov_ih_doorbell_range() argument
508 nbio_v4_3_sriov_sdma_doorbell_range(struct amdgpu_device *adev, int instance, bool use_doorbell, int doorbell_index, int doorbell_size) nbio_v4_3_sriov_sdma_doorbell_range() argument
514 nbio_v4_3_sriov_vcn_doorbell_range(struct amdgpu_device *adev, bool use_doorbell, int doorbell_index, int instance) nbio_v4_3_sriov_vcn_doorbell_range() argument
519 nbio_v4_3_sriov_gc_doorbell_init(struct amdgpu_device *adev) nbio_v4_3_sriov_gc_doorbell_init() argument
546 nbio_v4_3_set_ras_err_event_athub_irq_state(struct amdgpu_device *adev, struct amdgpu_irq_src *src, unsigned type, enum amdgpu_interrupt_state state) nbio_v4_3_set_ras_err_event_athub_irq_state() argument
567 nbio_v4_3_process_err_event_athub_irq(struct amdgpu_device *adev, struct amdgpu_irq_src *source, struct amdgpu_iv_entry *entry) nbio_v4_3_process_err_event_athub_irq() argument
583 nbio_v4_3_handle_ras_err_event_athub_intr_no_bifring(struct amdgpu_device *adev) nbio_v4_3_handle_ras_err_event_athub_intr_no_bifring() argument
600 nbio_v4_3_init_ras_err_event_athub_interrupt(struct amdgpu_device *adev) nbio_v4_3_init_ras_err_event_athub_interrupt() argument
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