/third_party/cmsis/CMSIS/Core/Include/a-profile/ |
H A D | cmsis_armclang_a.h | 189 \param [in] op2 Number of Bits to rotate 192 __STATIC_FORCEINLINE uint32_t __ROR(uint32_t op1, uint32_t op2) in __ROR() argument 194 op2 %= 32U; in __ROR() 195 if (op2 == 0U) in __ROR() 199 return (op1 >> op2) | (op1 << (32U - op2)); in __ROR() 502 __STATIC_FORCEINLINE int32_t __SMMLA (int32_t op1, int32_t op2, int32_t op3) in __SMMLA() argument 506 __ASM volatile ("smmla %0, %1, %2, %3" : "=r" (result): "r" (op1), "r" (op2), "r" (op3) ); in __SMMLA() 698 #define __get_CP(cp, op1, Rt, CRn, CRm, op2) __ASM volatile("MRC p" # cp ", " # op1 ", %0, c" # CRn ", c" # CRm ", " # op2 [all...] |
H A D | cmsis_gcc_a.h | 234 \param [in] op2 Number of Bits to rotate 237 __STATIC_FORCEINLINE uint32_t __ROR(uint32_t op1, uint32_t op2) in __ROR() argument 239 op2 %= 32U; in __ROR() 240 if (op2 == 0U) in __ROR() 244 return (op1 >> op2) | (op1 << (32U - op2)); in __ROR() 721 __STATIC_FORCEINLINE uint32_t __SXTAB16_RORn(uint32_t op1, uint32_t op2, uint32_t rotate) in __SXTAB16_RORn() argument 726 __ASM volatile("sxtab16 %0, %1, %2, ROR %3" : "=r"(result) : "r"(op1), "r"(op2), "i"(rotate)); in __SXTAB16_RORn() 730 result = __SXTAB16(op1, __ROR(op2, rotate)); in __SXTAB16_RORn() 735 __STATIC_FORCEINLINE int32_t __SMMLA (int32_t op1, int32_t op2, int32_ argument [all...] |
H A D | cmsis_clang_a.h | 227 \param [in] op2 Number of Bits to rotate 230 __STATIC_FORCEINLINE uint32_t __ROR(uint32_t op1, uint32_t op2) in __ROR() argument 232 op2 %= 32U; in __ROR() 233 if (op2 == 0U) in __ROR() 237 return (op1 >> op2) | (op1 << (32U - op2)); in __ROR() 698 __STATIC_FORCEINLINE uint32_t __SXTAB16_RORn(uint32_t op1, uint32_t op2, uint32_t rotate) in __SXTAB16_RORn() argument 703 __ASM volatile("sxtab16 %0, %1, %2, ROR %3" : "=r"(result) : "r"(op1), "r"(op2), "i"(rotate)); in __SXTAB16_RORn() 707 result = __SXTAB16(op1, __ROR(op2, rotate)); in __SXTAB16_RORn() 712 __STATIC_FORCEINLINE int32_t __SMMLA (int32_t op1, int32_t op2, int32_ argument [all...] |
H A D | cmsis_iccarm_a.h | 249 #define __get_CP(cp, op1, RT, CRn, CRm, op2) \ 250 ((RT) = __arm_rsr("p" # cp ":" # op1 ":c" # CRn ":c" # CRm ":" # op2)) 252 #define __set_CP(cp, op1, RT, CRn, CRm, op2) \ 253 (__arm_wsr("p" # cp ":" # op1 ":c" # CRn ":c" # CRm ":" # op2, (RT))) 415 __IAR_FT uint32_t __ROR(uint32_t op1, uint32_t op2) in __ROR() argument 417 return (op1 >> op2) | (op1 << ((sizeof(op1)*8)-op2)); in __ROR() 439 #define __get_CP(cp, op1, Rt, CRn, CRm, op2) \ 440 __ASM volatile("MRC p" # cp ", " # op1 ", %0, c" # CRn ", c" # CRm ", " # op2 : "=r" (Rt) : : "memory" ) 441 #define __set_CP(cp, op1, Rt, CRn, CRm, op2) \ [all...] |
/third_party/mesa3d/src/intel/compiler/ |
H A D | brw_nir_lower_conversions.c | 54 split_conversion(nir_builder *b, nir_alu_instr *alu, nir_op op1, nir_op op2) in split_conversion() argument 60 nir_ssa_def *res = nir_build_alu(b, op2, tmp, NULL, NULL, NULL); in split_conversion() 94 nir_op op2 = get_conversion_op(nir_type_float, 32, in lower_alu_instr() local 97 split_conversion(b, alu, op1, op2); in lower_alu_instr() 119 nir_op op2 = get_conversion_op(dst_type, 32, dst_type, dst_bit_size, in lower_alu_instr() local 121 split_conversion(b, alu, op1, op2); in lower_alu_instr()
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/third_party/mesa3d/src/panfrost/midgard/ |
H A D | midgard_address.c | 99 nir_ssa_scalar op2 = nir_ssa_scalar_chase_alu_src(address->B, 1); in mir_match_iadd() local 104 address->B = op2; in mir_match_iadd() 105 } else if (nir_ssa_scalar_is_const(op2) && in mir_match_iadd() 106 nir_ssa_scalar_as_uint(op2) <= MAX_POSITIVE_OFFSET) { in mir_match_iadd() 107 address->bias += nir_ssa_scalar_as_uint(op2); in mir_match_iadd() 110 !nir_ssa_scalar_is_const(op2) && in mir_match_iadd() 113 address->B = op2; in mir_match_iadd() 169 nir_ssa_scalar op2 = nir_ssa_scalar_chase_alu_src(address->B, 1); in mir_match_ishl() local 171 if (!nir_ssa_scalar_is_const(op2)) return; in mir_match_ishl() 173 unsigned shift = nir_ssa_scalar_as_uint(op2); in mir_match_ishl() [all...] |
/third_party/libunwind/libunwind/src/arm/ |
H A D | Gex_tables.c | 177 uint8_t op2 = READ_OP (); in arm_exidx_decode() local 178 if (op == 0x80 && op2 == 0x00) in arm_exidx_decode() 183 edata.data = ((op & 0xf) << 8) | op2; in arm_exidx_decode() 213 uint8_t op2 = READ_OP (); in arm_exidx_decode() local 214 if (op2 == 0 || (op2 & 0xf0)) in arm_exidx_decode() 219 edata.data = op2 & 0x0f; in arm_exidx_decode() 264 uint8_t op2 = READ_OP (); in arm_exidx_decode() local 265 if (op2 == 0 || (op2 in arm_exidx_decode() [all...] |
/third_party/node/deps/v8/src/codegen/arm64/ |
H A D | utils-arm64.h | 111 inline double FusedMultiplyAdd(double op1, double op2, double a) { in FusedMultiplyAdd() argument 112 return fma(op1, op2, a); in FusedMultiplyAdd() 115 inline float FusedMultiplyAdd(float op1, float op2, float a) { in FusedMultiplyAdd() argument 116 return fmaf(op1, op2, a); in FusedMultiplyAdd()
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/third_party/ffmpeg/libavcodec/ |
H A D | mpegaudiodsp_template.c | 94 #define SUM8P2(sum1, op1, sum2, op2, w1, w2, p) \ 99 op2(sum2, (w2)[0 * 64], tmp);\ 102 op2(sum2, (w2)[1 * 64], tmp);\ 105 op2(sum2, (w2)[2 * 64], tmp);\ 108 op2(sum2, (w2)[3 * 64], tmp);\ 111 op2(sum2, (w2)[4 * 64], tmp);\ 114 op2(sum2, (w2)[5 * 64], tmp);\ 117 op2(sum2, (w2)[6 * 64], tmp);\ 120 op2(sum2, (w2)[7 * 64], tmp);\
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/third_party/python/Tools/scripts/ |
H A D | analyze_dxp.py | 107 result = [((op1, op2), (opcode.opname[op1], opcode.opname[op2]), count) 110 for op2, count in enumerate(op1profile)
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/third_party/cmsis/CMSIS/Core/Include/m-profile/ |
H A D | cmsis_gcc_m.h | 327 \param [in] op2 Number of Bits to rotate 330 __STATIC_FORCEINLINE uint32_t __ROR(uint32_t op1, uint32_t op2) in __ROR() argument 332 op2 %= 32U; in __ROR() 333 if (op2 == 0U) in __ROR() 337 return (op1 >> op2) | (op1 << (32U - op2)); in __ROR() 1652 __STATIC_FORCEINLINE uint32_t __SXTAB16(uint32_t op1, uint32_t op2) in __SXTAB16() argument 1656 __ASM ("sxtab16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) ); in __SXTAB16() 1660 __STATIC_FORCEINLINE uint32_t __SXTAB16_RORn(uint32_t op1, uint32_t op2, uint32_t rotate) in __SXTAB16_RORn() argument 1665 __ASM volatile("sxtab16 %0, %1, %2, ROR %3" : "=r"(result) : "r"(op1), "r"(op2), " in __SXTAB16_RORn() 1674 __SMMLA(int32_t op1, int32_t op2, int32_t op3) __SMMLA() argument [all...] |
/third_party/skia/third_party/externals/spirv-tools/test/opt/loop_optimizations/ |
H A D | peeling_pass.cpp | 35 const std::string& op2) { in AssembleAndRunPeelingTest() 61 res_id + " = " + opcode_str + " %bool " + op1 + " " + op2 + "\n"; in AssembleAndRunPeelingTest() 73 const std::string& res_id, const std::string& op1, const std::string& op2, in RunPeelingTest() 76 text_head, text_tail, opcode, res_id, op1, op2); in RunPeelingTest() 91 const std::string& op2, in BuildAndCheckTrace() 94 auto stats = RunPeelingTest(text_head, text_tail, opcode, res_id, op1, op2, in BuildAndCheckTrace() 208 const std::string& op2) { in TEST_F() 210 RunPeelingTest(text_head, text_tail, opcode, "%22", op1, op2, 2); in TEST_F() 677 const std::string& op2, in TEST_F() 679 BuildAndCheckTrace(text_head, text_tail, opcode, "%22", op1, op2, in TEST_F() 32 AssembleAndRunPeelingTest( const std::string& text_head, const std::string& text_tail, SpvOp opcode, const std::string& res_id, const std::string& op1, const std::string& op2) AssembleAndRunPeelingTest() argument 71 RunPeelingTest( const std::string& text_head, const std::string& text_tail, SpvOp opcode, const std::string& res_id, const std::string& op1, const std::string& op2, size_t nb_of_loops) RunPeelingTest() argument 88 BuildAndCheckTrace(const std::string& text_head, const std::string& text_tail, SpvOp opcode, const std::string& res_id, const std::string& op1, const std::string& op2, const PeelTraceType& expected_peel_trace, size_t expected_nb_of_loops) BuildAndCheckTrace() argument [all...] |
/third_party/skia/third_party/externals/swiftshader/third_party/SPIRV-Tools/test/opt/loop_optimizations/ |
H A D | peeling_pass.cpp | 35 const std::string& op2) { in AssembleAndRunPeelingTest() 61 res_id + " = " + opcode_str + " %bool " + op1 + " " + op2 + "\n"; in AssembleAndRunPeelingTest() 73 const std::string& res_id, const std::string& op1, const std::string& op2, in RunPeelingTest() 76 text_head, text_tail, opcode, res_id, op1, op2); in RunPeelingTest() 91 const std::string& op2, in BuildAndCheckTrace() 94 auto stats = RunPeelingTest(text_head, text_tail, opcode, res_id, op1, op2, in BuildAndCheckTrace() 208 const std::string& op2) { in TEST_F() 210 RunPeelingTest(text_head, text_tail, opcode, "%22", op1, op2, 2); in TEST_F() 677 const std::string& op2, in TEST_F() 679 BuildAndCheckTrace(text_head, text_tail, opcode, "%22", op1, op2, in TEST_F() 32 AssembleAndRunPeelingTest( const std::string& text_head, const std::string& text_tail, SpvOp opcode, const std::string& res_id, const std::string& op1, const std::string& op2) AssembleAndRunPeelingTest() argument 71 RunPeelingTest( const std::string& text_head, const std::string& text_tail, SpvOp opcode, const std::string& res_id, const std::string& op1, const std::string& op2, size_t nb_of_loops) RunPeelingTest() argument 88 BuildAndCheckTrace(const std::string& text_head, const std::string& text_tail, SpvOp opcode, const std::string& res_id, const std::string& op1, const std::string& op2, const PeelTraceType& expected_peel_trace, size_t expected_nb_of_loops) BuildAndCheckTrace() argument [all...] |
/third_party/spirv-tools/test/opt/loop_optimizations/ |
H A D | peeling_pass.cpp | 34 const std::string& op2) { in AssembleAndRunPeelingTest() 60 res_id + " = " + opcode_str + " %bool " + op1 + " " + op2 + "\n"; in AssembleAndRunPeelingTest() 73 const std::string& op2, size_t nb_of_loops) { in RunPeelingTest() 75 text_head, text_tail, opcode, res_id, op1, op2); in RunPeelingTest() 90 const std::string& op2, in BuildAndCheckTrace() 93 auto stats = RunPeelingTest(text_head, text_tail, opcode, res_id, op1, op2, in BuildAndCheckTrace() 207 const std::string& op2) { in TEST_F() 209 RunPeelingTest(text_head, text_tail, opcode, "%22", op1, op2, 2); in TEST_F() 676 const std::string& op2, in TEST_F() 678 BuildAndCheckTrace(text_head, text_tail, opcode, "%22", op1, op2, in TEST_F() 31 AssembleAndRunPeelingTest( const std::string& text_head, const std::string& text_tail, spv::Op opcode, const std::string& res_id, const std::string& op1, const std::string& op2) AssembleAndRunPeelingTest() argument 70 RunPeelingTest( const std::string& text_head, const std::string& text_tail, spv::Op opcode, const std::string& res_id, const std::string& op1, const std::string& op2, size_t nb_of_loops) RunPeelingTest() argument 87 BuildAndCheckTrace(const std::string& text_head, const std::string& text_tail, spv::Op opcode, const std::string& res_id, const std::string& op1, const std::string& op2, const PeelTraceType& expected_peel_trace, size_t expected_nb_of_loops) BuildAndCheckTrace() argument [all...] |
/third_party/vixl/src/aarch64/ |
H A D | logic-aarch64.cc | 900 uint64_t op2, in PolynomialMult() 904 VIXL_ASSERT(IsUintN(lane_size_in_bits, op2)); in PolynomialMult() 908 result = result ^ (op2 << i); in PolynomialMult() 4475 T Simulator::FPAdd(T op1, T op2) { 4476 T result = FPProcessNaNs(op1, op2); 4481 if (IsInf(op1) && IsInf(op2) && (op1 != op2)) { 4487 return op1 + op2; 4493 T Simulator::FPSub(T op1, T op2) { 4495 VIXL_ASSERT(!IsNaN(op1) && !IsNaN(op2)); 899 PolynomialMult(uint64_t op1, uint64_t op2, int lane_size_in_bits) const PolynomialMult() argument [all...] |
/third_party/skia/third_party/externals/spirv-tools/source/opt/ |
H A D | ir_builder.h | 291 // |op1| and |op2| types. 293 // The id |op2| is the right hand side of the operation. 294 Instruction* AddIAdd(uint32_t type, uint32_t op1, uint32_t op2) { in AddIAdd() argument 298 {{SPV_OPERAND_TYPE_ID, {op1}}, {SPV_OPERAND_TYPE_ID, {op2}}})); in AddIAdd() 304 // The id |op2| is the right hand side of the operation. 305 // It is assumed that |op1| and |op2| have the same underlying type. 306 Instruction* AddULessThan(uint32_t op1, uint32_t op2) { in AddULessThan() argument 312 {{SPV_OPERAND_TYPE_ID, {op1}}, {SPV_OPERAND_TYPE_ID, {op2}}})); in AddULessThan() 318 // The id |op2| is the right hand side of the operation. 319 // It is assumed that |op1| and |op2| hav 320 AddSLessThan(uint32_t op1, uint32_t op2) AddSLessThan() argument 334 AddLessThan(uint32_t op1, uint32_t op2) AddLessThan() argument [all...] |
H A D | folding_rules.cpp | 875 uint32_t op2 = non_const_id; 876 if (first_is_variable && other_first_is_variable) std::swap(op1, op2); 879 {{SPV_OPERAND_TYPE_ID, {op1}}, {SPV_OPERAND_TYPE_ID, {op2}}}); 950 uint32_t op2 = non_const_id; 951 if (first_is_variable) std::swap(op1, op2); 956 {{SPV_OPERAND_TYPE_ID, {op1}}, {SPV_OPERAND_TYPE_ID, {op2}}}); 1059 uint32_t op2 = 0; 1063 op2 = inst->GetSingleWordInOperand(0u); 1067 op2 = other_inst->GetSingleWordInOperand(0u); 1072 {{SPV_OPERAND_TYPE_ID, {op1}}, {SPV_OPERAND_TYPE_ID, {op2}}}); [all...] |
/third_party/skia/third_party/externals/swiftshader/third_party/SPIRV-Tools/source/opt/ |
H A D | ir_builder.h | 291 // |op1| and |op2| types. 293 // The id |op2| is the right hand side of the operation. 294 Instruction* AddIAdd(uint32_t type, uint32_t op1, uint32_t op2) { in AddIAdd() argument 298 {{SPV_OPERAND_TYPE_ID, {op1}}, {SPV_OPERAND_TYPE_ID, {op2}}})); in AddIAdd() 304 // The id |op2| is the right hand side of the operation. 305 // It is assumed that |op1| and |op2| have the same underlying type. 306 Instruction* AddULessThan(uint32_t op1, uint32_t op2) { in AddULessThan() argument 312 {{SPV_OPERAND_TYPE_ID, {op1}}, {SPV_OPERAND_TYPE_ID, {op2}}})); in AddULessThan() 318 // The id |op2| is the right hand side of the operation. 319 // It is assumed that |op1| and |op2| hav 320 AddSLessThan(uint32_t op1, uint32_t op2) AddSLessThan() argument 334 AddLessThan(uint32_t op1, uint32_t op2) AddLessThan() argument [all...] |
H A D | folding_rules.cpp | 875 uint32_t op2 = non_const_id; 876 if (first_is_variable && other_first_is_variable) std::swap(op1, op2); 879 {{SPV_OPERAND_TYPE_ID, {op1}}, {SPV_OPERAND_TYPE_ID, {op2}}}); 950 uint32_t op2 = non_const_id; 951 if (first_is_variable) std::swap(op1, op2); 956 {{SPV_OPERAND_TYPE_ID, {op1}}, {SPV_OPERAND_TYPE_ID, {op2}}}); 1059 uint32_t op2 = 0; 1063 op2 = inst->GetSingleWordInOperand(0u); 1067 op2 = other_inst->GetSingleWordInOperand(0u); 1072 {{SPV_OPERAND_TYPE_ID, {op1}}, {SPV_OPERAND_TYPE_ID, {op2}}}); [all...] |
/third_party/json/tests/src/ |
H A D | unit-alt-string.cpp | 20 bool operator<(const char* op1, const alt_string& op2) noexcept; 164 friend bool operator<(const char* /*op1*/, const alt_string& /*op2*/) noexcept; 184 bool operator<(const char* op1, const alt_string& op2) noexcept 186 return op1 < op2.str_impl;
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/third_party/node/deps/v8/src/execution/arm64/ |
H A D | simulator-logic-arm64.cc | 913 uint16_t Simulator::PolynomialMult(uint8_t op1, uint8_t op2) { in PolynomialMult() argument 915 uint16_t extended_op2 = op2; in PolynomialMult() 2921 T Simulator::FPAdd(T op1, T op2) { in FPAdd() argument 2922 T result = FPProcessNaNs(op1, op2); in FPAdd() 2925 if (std::isinf(op1) && std::isinf(op2) && (op1 != op2)) { in FPAdd() 2931 return op1 + op2; in FPAdd() 2936 T Simulator::FPSub(T op1, T op2) { in FPSub() argument 2938 DCHECK(!std::isnan(op1) && !std::isnan(op2)); in FPSub() 2940 if (std::isinf(op1) && std::isinf(op2) in FPSub() 2951 FPMul(T op1, T op2) FPMul() argument 2966 FPMulx(T op1, T op2) FPMulx() argument 2976 FPMulAdd(T a, T op1, T op2) FPMulAdd() argument 3022 FPDiv(T op1, T op2) FPDiv() argument 3110 FPRecipStepFused(T op1, T op2) FPRecipStepFused() argument 3125 FPRSqrtStepFused(T op1, T op2) FPRSqrtStepFused() argument 3292 T op2 = src2.Float<T>(i); frecps() local 3318 T op2 = src2.Float<T>(i); frsqrts() local 3404 T op2 = src2.Float<T>(i); fcmp() local 3484 T op2 = src2.Float<T>(i); fmla() local 3511 T op2 = src2.Float<T>(i); fmls() local [all...] |
/third_party/spirv-tools/source/opt/ |
H A D | ir_builder.h | 295 // |op1| and |op2| types. 297 // The id |op2| is the right hand side of the operation. 298 Instruction* AddIAdd(uint32_t type, uint32_t op1, uint32_t op2) { in AddIAdd() argument 302 {{SPV_OPERAND_TYPE_ID, {op1}}, {SPV_OPERAND_TYPE_ID, {op2}}})); in AddIAdd() 308 // The id |op2| is the right hand side of the operation. 309 // It is assumed that |op1| and |op2| have the same underlying type. 310 Instruction* AddULessThan(uint32_t op1, uint32_t op2) { in AddULessThan() argument 316 {{SPV_OPERAND_TYPE_ID, {op1}}, {SPV_OPERAND_TYPE_ID, {op2}}})); in AddULessThan() 322 // The id |op2| is the right hand side of the operation. 323 // It is assumed that |op1| and |op2| hav 324 AddSLessThan(uint32_t op1, uint32_t op2) AddSLessThan() argument 338 AddLessThan(uint32_t op1, uint32_t op2) AddLessThan() argument [all...] |
/third_party/python/Include/cpython/ |
H A D | object.h | 312 /* Safely decref `op` and set `op` to `op2`. 317 * op = op2; 321 * Py_SETREF(op, op2); 323 * That arranges to set `op` to `op2` _before_ decref'ing, so that any code 331 #define Py_SETREF(op, op2) \ 334 (op) = (op2); \ 338 #define Py_XSETREF(op, op2) \ 341 (op) = (op2); \
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/third_party/python/Lib/ |
H A D | _pydecimal.py | 1217 op2 = _WorkRep(other) 1218 op1, op2 = _normalize(op1, op2, context.prec) 1221 if op1.sign != op2.sign: 1223 if op1.int == op2.int: 1227 if op1.int < op2.int: 1228 op1, op2 = op2, op1 1229 # OK, now abs(op1) > abs(op2) 1232 op1.sign, op2 [all...] |
/third_party/skia/third_party/externals/freetype/src/psaux/ |
H A D | psintrp.c | 1064 FT_Byte op2 = (FT_Byte)cf2_buf_readByte( charstring ); in cf2_interpT2CharString() local 1069 switch ( op2 ) in cf2_interpT2CharString() 1174 FT_TRACE4(( " unknown op (12, %d)\n", op2 )); in cf2_interpT2CharString() 1179 if ( font->isCFF2 || op2 >= cf2_escRESERVED_38 ) in cf2_interpT2CharString() 1180 FT_TRACE4(( " unknown op (12, %d)\n", op2 )); in cf2_interpT2CharString() 1181 else if ( font->isT1 && result_cnt > 0 && op2 != cf2_escPOP ) in cf2_interpT2CharString() 1190 switch ( op2 ) in cf2_interpT2CharString() 1210 FT_TRACE4(( " unknown op (12, %d)\n", op2 )); in cf2_interpT2CharString() 1215 FT_Bool isV = FT_BOOL( op2 == cf2_escVSTEM3 ); in cf2_interpT2CharString() 1296 FT_TRACE4(( " unknown op (12, %d)\n", op2 )); in cf2_interpT2CharString() [all...] |