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Searched refs:movt (Results 1 - 25 of 33) sorted by relevance

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/third_party/musl/src/setjmp/sh/
H A Dlongjmp.S24 movt r0
/third_party/ffmpeg/libavcodec/arm/
H A Dvc1dsp_neon.S91 movt r12, #22
138 movt r12, #6
148 movt r12, #9
255 movt r12, #9
279 movt r12, #4
H A Dfft_neon.S56 movt r2, #0x3f35
H A Dh264qpel_neon.S28 movt \r, #20
H A Dvp8dsp_neon.S83 movt r3, #35468/2
/third_party/vixl/benchmarks/aarch32/
H A Dasm-disasm-speed-test.cc318 __ movt(sl, 0U); in Generate_1()
453 __ movt(r7, 0U); in Generate_2()
521 __ movt(r3, 0U); in Generate_3()
653 __ movt(r3, 0U); in Generate_4()
774 __ movt(r3, 0U); in Generate_5()
923 __ movt(r3, 0U); in Generate_6()
1041 __ movt(r3, 0U); in Generate_7()
1232 __ movt(r3, 49148U); in Generate_9()
1265 __ movt(r3, 0U); in Generate_9()
1358 __ movt(r in Generate_10()
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/third_party/ffmpeg/libavutil/arm/
H A Dasm.S150 movt \rd, #(\val) >> 16
198 movt \rd, #:upper16:\val
/third_party/skia/third_party/externals/swiftshader/third_party/subzero/src/DartARM32/
H A Dassembler_arm.cc331 // Moved to ARM32::AssemblerARM32::movt()
332 void Assembler::movt(Register rd, uint16_t imm16, Condition cond) {
2001 static int32_t DecodeARMv7LoadImmediate(int32_t movt, int32_t movw) {
2003 offset |= (movt & 0xf0000) << 12;
2004 offset |= (movt & 0xfff) << 16;
2073 const int32_t movt = region.Load<int32_t>(position + Instr::kInstrSize);
2076 if (((movt & 0xfff0f000) == 0xe340c000) && // movt IP, high
2078 const int32_t offset = DecodeARMv7LoadImmediate(movt, movw);
2095 ASSERT((movt
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H A Dassembler_arm.h1143 // Moved to ARM::AssemblerARM32::movt
1144 void movt(Register rd, uint16_t imm16, Condition cond = AL);
/third_party/skia/third_party/externals/swiftshader/third_party/subzero/src/
H A DIceAssemblerMIPS32.h225 void movt(const Operand *OpRd, const Operand *OpRs, const Operand *OpCc);
H A DIceAssemblerARM32.h41 /// Handles encoding of bottom/top 16 bits of an address using movw/movt.
240 void movt(const Operand *OpRd, const Operand *OpSrc, CondARM32::Cond Cond);
879 // Implements movw/movt, generating pattern ccccxxxxxxxsiiiiddddiiiiiiiiiiii
H A DIceInstMIPS32.cpp898 Asm->movt(getDest(), getSrc(0), getSrc(1)); in emitIAS()
H A DIceAssemblerMIPS32.cpp872 void AssemblerMIPS32::movt(const Operand *OpRd, const Operand *OpRs, in movt() function in Ice::MIPS32::AssemblerMIPS32
875 const IValueT Rd = encodeGPRegister(OpRd, "Rd", "movt"); in movt()
876 const IValueT Rs = encodeGPRegister(OpRs, "Rs", "movt"); in movt()
H A DIceInstARM32.cpp2475 Asm->movt(getDest(), getSrc(1), getPredicate()); in emitIAS()
H A DIceAssemblerARM32.cpp676 // iiiiiiiiiiiiiiii = Imm16, and T=1 for movt.
1808 void AssemblerARM32::movt(const Operand *OpRd, const Operand *OpSrc,
1811 // movt<c> <Rd>, #<imm16>
1815 constexpr const char *MovtName = "movt";
/third_party/node/deps/v8/src/diagnostics/mips64/
H A Ddisasm-mips64.cc1071 Format(instr, "movt.'t 'fd, 'fs, 'Cc"); in DecodeTypeRegisterRsType()
1646 Format(instr, "movt 'rd, 'rs, 'bc"); in DecodeTypeRegisterSPECIAL()
/third_party/node/deps/v8/src/diagnostics/mips/
H A Ddisasm-mips.cc1011 Format(instr, "movt.'t 'fd, 'fs, 'Cc"); in DecodeTypeRegisterRsType()
1414 Format(instr, "movt 'rd, 'rs, 'bc"); in DecodeTypeRegisterSPECIAL()
/third_party/vixl/test/aarch32/
H A Dtest-assembler-cond-rd-operand-imm16-t32.cc53 M(movt) \
491 #include "aarch32/traces/assembler-cond-rd-operand-imm16-movt-t32.h"
/third_party/node/deps/v8/src/codegen/arm/
H A Dassembler-arm.cc337 // specially coded on ARM means that it is a movw/movt instruction. We don't in IsCodedSpecially()
839 // movt dst, #target16_1 in target_at_put()
857 // Patch with movw/movt. in target_at_put()
868 patcher.movt(dst, target16_1); in target_at_put()
1147 // Otherwise, use immediate load if movw / movt is available. in UseMovImmediateLoad()
1171 // A movw / movt immediate load. in InstructionsRequired()
1204 movt(target, imm32 >> 16, cond); in Move32BitImmediate()
1659 // sequence of movw/movt or mov/orr/orr instructions. They will load the in mov_label_offset()
1690 void Assembler::movt(Register reg, uint32_t immediate, Condition cond) { in movt() function in v8::internal::Assembler
2866 movt(scratc in vmov()
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H A Dassembler-arm.h481 // The constant for movw and movt should be in the range 0-0xffff.
483 void movt(Register reg, uint32_t immediate, Condition cond = al);
/third_party/vixl/src/aarch32/
H A Dmacro-assembler-aarch32.cc246 movt(cond, tmp, imm >> 16); in HandleOutOfBoundsImmediate()
1799 // movt ip, imm32 >> 16 in Delegate()
2025 // movt ip, imm32 >> 16 in Delegate()
2170 // movt ip, imm32 >> 16 in Delegate()
2243 // movt ip, imm32 >> 16 in Delegate()
H A Dassembler-aarch32.h2667 void movt(Condition cond, Register rd, const Operand& operand);
2668 void movt(Register rd, const Operand& operand) { movt(al, rd, operand); } in movt() function in vixl::aarch32::Assembler
/third_party/node/deps/v8/src/codegen/mips64/
H A Dassembler-mips64.h643 void movt(Register rd, Register rs, uint16_t cc = 0);
/third_party/node/deps/v8/src/codegen/mips/
H A Dassembler-mips.h599 void movt(Register rd, Register rs, uint16_t cc = 0);
H A Dassembler-mips.cc2321 void Assembler::movt(Register rd, Register rs, uint16_t cc) { in movt() function in v8::internal::Assembler

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