Home
last modified time | relevance | path

Searched refs:Is64Bits (Results 1 - 25 of 26) sorted by relevance

12

/third_party/vixl/examples/aarch64/
H A Dcustom-disassembler.cc46 AppendToOutput(reg.Is64Bits() ? "ip0" : "wip0"); in AppendRegisterNameToOutput()
49 AppendToOutput(reg.Is64Bits() ? "ip1" : "wip1"); in AppendRegisterNameToOutput()
52 AppendToOutput(reg.Is64Bits() ? "lr" : "w30"); in AppendRegisterNameToOutput()
55 AppendToOutput(reg.Is64Bits() ? "x_stack_pointer" : "w_stack_pointer"); in AppendRegisterNameToOutput()
58 AppendToOutput(reg.Is64Bits() ? "x_zero_reg" : "w_zero_reg"); in AppendRegisterNameToOutput()
/third_party/vixl/src/aarch64/
H A Doperands-aarch64.cc159 VIXL_ASSERT(reg.Is64Bits() || (shift_amount < kWRegSize)); in Operand()
175 VIXL_ASSERT(reg.Is64Bits() || ((extend != SXTX) && (extend != UXTX))); in Operand()
221 return Operand(reg_, reg_.Is64Bits() ? UXTX : UXTW, shift_amount_); in ToExtendedRegister()
244 VIXL_ASSERT(base.Is64Bits() && !base.IsZero()); in MemOperand()
259 VIXL_ASSERT(base.Is64Bits() && !base.IsZero()); in MemOperand()
264 VIXL_ASSERT(regoffset.Is64Bits() || (extend != SXTX)); in MemOperand()
279 VIXL_ASSERT(base.Is64Bits() && !base.IsZero()); in MemOperand()
280 VIXL_ASSERT(regoffset.Is64Bits() && !regoffset.IsSP()); in MemOperand()
292 VIXL_ASSERT(base.Is64Bits() && !base.IsZero()); in MemOperand()
307 VIXL_ASSERT(regoffset_.Is64Bits() in MemOperand()
[all...]
H A Dassembler-aarch64.cc182 VIXL_ASSERT(xn.Is64Bits()); in br()
188 VIXL_ASSERT(xn.Is64Bits()); in blr()
194 VIXL_ASSERT(xn.Is64Bits()); in ret()
201 VIXL_ASSERT(xn.Is64Bits()); in braaz()
207 VIXL_ASSERT(xn.Is64Bits()); in brabz()
213 VIXL_ASSERT(xn.Is64Bits()); in blraaz()
219 VIXL_ASSERT(xn.Is64Bits()); in blrabz()
236 VIXL_ASSERT(xn.Is64Bits() && xm.Is64Bits()); in braa()
242 VIXL_ASSERT(xn.Is64Bits() in brab()
[all...]
H A Dmacro-assembler-aarch64.cc493 VIXL_ASSERT(IsUint32(imm) || IsInt32(imm) || rd.Is64Bits()); in Emit()
905 VIXL_ASSERT(rd.Is64Bits() || IsUint32(immediate)); in Emit()
925 } else if ((rd.Is64Bits() && (immediate == UINT64_C(0xffffffffffffffff))) || in Emit()
975 operand.GetRegister().Is64Bits() || in Emit()
1029 movi(vd.Is64Bits() ? vd.V8B() : vd.V16B(), byte1); in Emit()
1064 movi(vd.Is64Bits() ? vd.V1D() : vd.V2D(), ((imm << 32) | imm)); in Emit()
1111 Movi16bitHelper(vd.Is64Bits() ? vd.V4H() : vd.V8H(), imm & 0xffff); in Emit()
1144 Movi32bitHelper(vd.Is64Bits() ? vd.V2S() : vd.V4S(), imm & 0xffffffff); in Emit()
1897 if (operand.IsZero() && rd.Is(rn) && rd.Is64Bits() && rn.Is64Bits() in Emit()
[all...]
H A Dregisters-aarch64.h165 bool Is64Bits() const { return size_ == kEncodedDRegSize; }
337 bool IsX() const { return IsRegister() && Is64Bits(); }
350 bool IsD() const { return IsVRegister() && Is64Bits(); }
H A Dassembler-sve-aarch64.cc2667 const Instr sz = rn.Is64Bits() ? 0x00400000 : 0x00000000; in ctermeq()
2679 const Instr sz = rn.Is64Bits() ? 0x00400000 : 0x00000000; in ctermne()
2694 const Instr sf = rn.Is64Bits() ? 0x00001000 : 0x00000000; in whilele()
2709 const Instr sf = rn.Is64Bits() ? 0x00001000 : 0x00000000; in whilelo()
2724 const Instr sf = rn.Is64Bits() ? 0x00001000 : 0x00000000; in whilels()
2739 const Instr sf = rn.Is64Bits() ? 0x00001000 : 0x00000000; in whilelt()
9721 const Instr sf = rn.Is64Bits() ? 0x00001000 : 0x00000000; in whilege()
9736 const Instr sf = rn.Is64Bits() ? 0x00001000 : 0x00000000; in whilegt()
9751 const Instr sf = rn.Is64Bits() ? 0x00001000 : 0x00000000; in whilehi()
9766 const Instr sf = rn.Is64Bits() in whilehs()
[all...]
H A Dassembler-aarch64.h1060 VIXL_ASSERT(xd.Is64Bits() && xn.Is64Bits());
7275 return rd.Is64Bits() ? SixtyFourBits : ThirtyTwoBits;
7566 if (vd.Is64Bits()) {
7647 if (vd.Is64Bits()) {
7835 return reg.Is64Bits() ? Register(xzr) : Register(wzr);
H A Dmacro-assembler-aarch64.h51 V(Ldrsb, Register&, rt, rt.Is64Bits() ? LDRSB_x : LDRSB_w) \
54 V(Ldrsh, Register&, rt, rt.Is64Bits() ? LDRSH_x : LDRSH_w) \
2071 if (rt.Is64Bits()) { in Ldr()
2083 if (rt.Is64Bits()) { in Ldr()
6342 if (rn.Is64Bits()) { in Uqdecp()
6406 if (rn.Is64Bits()) { in Uqincp()
H A Ddisasm-aarch64.cc6121 reg_char = reg.Is64Bits() ? 'x' : 'w'; in Disassembler()
6148 AppendToOutput("%s", reg.Is64Bits() ? "sp" : "wsp"); in Disassembler()
/third_party/node/deps/v8/src/codegen/arm64/
H A Dassembler-arm64-inl.h251 DCHECK(reg.Is64Bits() || (shift_amount < kWRegSizeInBits)); in Operand()
267 DCHECK(reg.Is64Bits() || ((extend != SXTX) && (extend != UXTX))); in Operand()
306 return Operand(reg_, reg_.Is64Bits() ? UXTX : UXTW, shift_amount_); in ToExtendedRegister()
311 DCHECK(reg_.Is64Bits()); in ToW()
314 DCHECK(reg_.Is64Bits()); in ToW()
381 DCHECK(base.Is64Bits() && !base.IsZero()); in MemOperand()
393 DCHECK(base.Is64Bits() && !base.IsZero()); in MemOperand()
398 DCHECK(regoffset.Is64Bits() || (extend != SXTX)); in MemOperand()
410 DCHECK(base.Is64Bits() && !base.IsZero()); in MemOperand()
411 DCHECK(regoffset.Is64Bits() in MemOperand()
[all...]
H A Dregister-arm64.h128 bool Is64Bits() const { in Is64Bits() function in v8::internal::CPURegister
158 bool IsX() const { return IsRegister() && Is64Bits(); } in IsX()
170 bool IsD() const { return IsV() && Is64Bits(); } in IsD()
371 bool Is8B() const { return (Is64Bits() && (lane_count_ == 8)); } in Is8B()
373 bool Is4H() const { return (Is64Bits() && (lane_count_ == 4)); } in Is4H()
375 bool Is2S() const { return (Is64Bits() && (lane_count_ == 2)); } in Is2S()
377 bool Is1D() const { return (Is64Bits() && (lane_count_ == 1)); } in Is1D()
H A Dassembler-arm64.cc757 DCHECK(xn.Is64Bits()); in br()
762 DCHECK(xn.Is64Bits()); in blr()
770 DCHECK(xn.Is64Bits()); in ret()
807 DCHECK(rt.Is64Bits() || (rt.Is32Bits() && (bit_pos < kWRegSizeInBits))); in tbz()
816 DCHECK(rt.Is64Bits() || (rt.Is32Bits() && (bit_pos < kWRegSizeInBits))); in tbnz()
825 DCHECK(rd.Is64Bits()); in adr()
992 DCHECK(rd.Is64Bits() || rn.Is32Bits()); in sbfm()
1114 DCHECK(rd.Is64Bits() && ra.Is64Bits()); in smaddl()
1121 DCHECK(rd.Is64Bits() in smsubl()
[all...]
H A Dmacro-assembler-arm64-inl.h433 DCHECK(!rd.IsSP() && rd.Is64Bits()); in CzeroX()
444 DCHECK(rd.Is64Bits() && rn.Is64Bits()); in CmovX()
652 if (fd != fn || !fd.Is64Bits()) { in Fmov()
1045 DCHECK(dst.Is64Bits() && src.Is64Bits()); in SmiTag()
1053 DCHECK(dst.Is64Bits() && src.Is64Bits()); in SmiUntag()
1067 DCHECK(dst.Is64Bits()); in SmiUntag()
1095 DCHECK(smi.Is64Bits()); in SmiToInt32()
[all...]
H A Dmacro-assembler-arm64.cc183 DCHECK(rd.Is64Bits() || is_uint32(immediate)); in LogicalMacro()
201 } else if ((rd.Is64Bits() && (immediate == -1L)) || in LogicalMacro()
249 DCHECK(operand.reg().Is64Bits() || in LogicalMacro()
265 DCHECK(is_uint32(imm) || is_int32(imm) || rd.Is64Bits()); in Mov()
416 movi(vd.Is64Bits() ? vd.V8B() : vd.V16B(), byte1); in Movi16bitHelper()
450 movi(vd.Is64Bits() ? vd.V1D() : vd.V2D(), ((imm << 32) | imm)); in Movi32bitHelper()
497 Movi16bitHelper(vd.Is64Bits() ? vd.V4H() : vd.V8H(), imm & 0xFFFF); in Movi32bitHelper()
529 Movi32bitHelper(vd.Is64Bits() ? vd.V2S() : vd.V4S(), imm & 0xFFFFFFFF); in Movi64bitHelper()
705 movn(dst, dst.Is64Bits() ? ~imm : (~imm & kWRegMask)); in TryOneInstrMoveImmediate()
768 if (operand.IsZero() && rd == rn && rd.Is64Bits() in AddSubMacro()
[all...]
H A Dassembler-arm64.h2208 if (vd.Is64Bits()) {
2241 DCHECK(vd.Is32Bits() || vd.Is64Bits());
2242 return vd.Is64Bits() ? FP64 : FP32;
2247 DCHECK(vd.Is64Bits() || vd.Is128Bits());
2258 if (vd.Is64Bits()) {
H A Dmacro-assembler-arm64.h39 V(Ldrsb, Register&, rt, rt.Is64Bits() ? LDRSB_x : LDRSB_w) \
42 V(Ldrsh, Register&, rt, rt.Is64Bits() ? LDRSH_x : LDRSH_w) \
/third_party/vixl/test/aarch64/
H A Dtest-utils-aarch64.cc197 VIXL_ASSERT(reg.Is64Bits()); in Equal64()
206 VIXL_ASSERT(reg.Is64Bits()); in NotEqual64()
265 VIXL_ASSERT(fpreg.Is64Bits()); in EqualFP64()
274 VIXL_ASSERT(reg0.Is64Bits() && reg1.Is64Bits()); in Equal64()
284 VIXL_ASSERT(reg0.Is64Bits() && reg1.Is64Bits()); in NotEqual64()
294 VIXL_ASSERT(vreg.Is64Bits()); in Equal64()
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/include/llvm/Object/
H A DELFTypes.h54 static const bool Is64Bits = Is64; member
349 using intX_t = typename std::conditional<ELFT::Is64Bits,
351 using uintX_t = typename std::conditional<ELFT::Is64Bits,
H A DMachO.h272 create(MemoryBufferRef Object, bool IsLittleEndian, bool Is64Bits,
651 MachOObjectFile(MemoryBufferRef Object, bool IsLittleEndian, bool Is64Bits,
H A DELFObjectFile.h436 ELFT::Is64Bits); in classof()
992 getELFType(ELFT::TargetEndianness == support::little, ELFT::Is64Bits), in ELFObjectFile()
1052 return ELFT::Is64Bits ? 8 : 4; in getBytesInAddress()
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/X86/
H A DX86MCInstLower.cpp932 bool Is64Bits = MI.getOpcode() == X86::TLS_addr64 || in LowerTlsAddr() local
963 if (Is64Bits) { in LowerTlsAddr()
1288 bool Is64Bits = Subtarget->is64Bit(); in LowerFENTRY_CALL() local
1295 MCInstBuilder(Is64Bits ? X86::CALL64pcrel32 : X86::CALLpcrel32) in LowerFENTRY_CALL()
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/ObjectYAML/
H A DELFEmitter.cpp281 Header.e_ident[EI_CLASS] = ELFT::Is64Bits ? ELFCLASS64 : ELFCLASS32; in writeELFHeader()
850 if (!ELFT::Is64Bits && E > UINT32_MAX) in writeSectionContent()
/third_party/node/deps/v8/src/diagnostics/arm64/
H A Ddisasm-arm64.cc3591 reg_char = reg.Is64Bits() ? 'x' : 'w'; in AppendRegisterNameToOutput()
3627 AppendToOutput("%s", reg.Is64Bits() ? "sp" : "wsp"); in AppendRegisterNameToOutput()
/third_party/vixl/src/aarch32/
H A Dinstructions-aarch32.h128 bool Is64Bits() const { return GetSizeInBits() == 64; }
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Object/
H A DMachOObjectFile.cpp1246 bool Is64Bits, uint32_t UniversalCputype, in create()
1251 Is64Bits, Err, UniversalCputype, in create()
1245 create(MemoryBufferRef Object, bool IsLittleEndian, bool Is64Bits, uint32_t UniversalCputype, uint32_t UniversalIndex) create() argument

Completed in 103 milliseconds

12