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Searched refs:DCCISW (Results 1 - 7 of 7) sorted by relevance

/third_party/cmsis/CMSIS/Core/Include/m-profile/
H A Darmv7m_cachel1.h229 SCB->DCCISW = (((locals.sets << SCB_DCCISW_SET_Pos) & SCB_DCCISW_SET_Msk) | in SCB_DisableDCache()
334 SCB->DCCISW = (((sets << SCB_DCCISW_SET_Pos) & SCB_DCCISW_SET_Msk) | in SCB_CleanInvalidateDCache()
/third_party/cmsis/CMSIS/Core/Include/
H A Dcore_starmc1.h579 __OM uint32_t DCCISW; /*!< Offset: 0x274 ( /W) D-Cache Clean and Invalidate by Set-way */ member
968 #define SCB_DCCISW_LEVEL_Pos 1U /*!< SCB DCCISW: Level Position */
969 #define SCB_DCCISW_LEVEL_Msk (7UL << SCB_DCCISW_LEVEL_Pos) /*!< SCB DCCISW: Level Mask */
971 #define SCB_DCCISW_WAY_Pos 30U /*!< SCB DCCISW: Way Position */
972 #define SCB_DCCISW_WAY_Msk (3UL << SCB_DCCISW_WAY_Pos) /*!< SCB DCCISW: Way Mask */
974 #define SCB_DCCISW_SET_Pos 5U /*!< SCB DCCISW: Set Position */
975 #define SCB_DCCISW_SET_Msk (0xFFUL << SCB_DCCISW_SET_Pos) /*!< SCB DCCISW: Set Mask */
3237 SCB->DCCISW = (((sets << SCB_DCCISW_SET_Pos) & SCB_DCCISW_SET_Msk) | in SCB_DisableDCache()
3342 SCB->DCCISW = (((sets << SCB_DCCISW_SET_Pos) & SCB_DCCISW_SET_Msk) | in SCB_CleanInvalidateDCache()
H A Dcore_cm35p.h567 __OM uint32_t DCCISW; /*!< Offset: 0x274 ( /W) D-Cache Clean and Invalidate by Set-way */ member
938 #define SCB_DCCISW_WAY_Pos 30U /*!< SCB DCCISW: Way Position */
939 #define SCB_DCCISW_WAY_Msk (3UL << SCB_DCCISW_WAY_Pos) /*!< SCB DCCISW: Way Mask */
941 #define SCB_DCCISW_SET_Pos 5U /*!< SCB DCCISW: Set Position */
942 #define SCB_DCCISW_SET_Msk (0x1FFUL << SCB_DCCISW_SET_Pos) /*!< SCB DCCISW: Set Mask */
H A Dcore_cm33.h567 __OM uint32_t DCCISW; /*!< Offset: 0x274 ( /W) D-Cache Clean and Invalidate by Set-way */ member
938 #define SCB_DCCISW_WAY_Pos 30U /*!< SCB DCCISW: Way Position */
939 #define SCB_DCCISW_WAY_Msk (3UL << SCB_DCCISW_WAY_Pos) /*!< SCB DCCISW: Way Mask */
941 #define SCB_DCCISW_SET_Pos 5U /*!< SCB DCCISW: Set Position */
942 #define SCB_DCCISW_SET_Msk (0x1FFUL << SCB_DCCISW_SET_Pos) /*!< SCB DCCISW: Set Mask */
H A Dcore_cm7.h511 __OM uint32_t DCCISW; /*!< Offset: 0x274 ( /W) D-Cache Clean and Invalidate by Set-way */ member
844 #define SCB_DCCISW_WAY_Pos 30U /*!< SCB DCCISW: Way Position */
845 #define SCB_DCCISW_WAY_Msk (3UL << SCB_DCCISW_WAY_Pos) /*!< SCB DCCISW: Way Mask */
847 #define SCB_DCCISW_SET_Pos 5U /*!< SCB DCCISW: Set Position */
848 #define SCB_DCCISW_SET_Msk (0x1FFUL << SCB_DCCISW_SET_Pos) /*!< SCB DCCISW: Set Mask */
H A Dcore_cm85.h599 __OM uint32_t DCCISW; /*!< Offset: 0x274 ( /W) D-Cache Clean and Invalidate by Set-way */ member
1020 #define SCB_DCCISW_WAY_Pos 30U /*!< SCB DCCISW: Way Position */
1021 #define SCB_DCCISW_WAY_Msk (3UL << SCB_DCCISW_WAY_Pos) /*!< SCB DCCISW: Way Mask */
1023 #define SCB_DCCISW_SET_Pos 5U /*!< SCB DCCISW: Set Position */
1024 #define SCB_DCCISW_SET_Msk (0x1FFUL << SCB_DCCISW_SET_Pos) /*!< SCB DCCISW: Set Mask */
H A Dcore_cm55.h578 __OM uint32_t DCCISW; /*!< Offset: 0x274 ( /W) D-Cache Clean and Invalidate by Set-way */ member
999 #define SCB_DCCISW_WAY_Pos 30U /*!< SCB DCCISW: Way Position */
1000 #define SCB_DCCISW_WAY_Msk (3UL << SCB_DCCISW_WAY_Pos) /*!< SCB DCCISW: Way Mask */
1002 #define SCB_DCCISW_SET_Pos 5U /*!< SCB DCCISW: Set Position */
1003 #define SCB_DCCISW_SET_Msk (0x1FFUL << SCB_DCCISW_SET_Pos) /*!< SCB DCCISW: Set Mask */

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