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/kernel/linux/linux-6.6/drivers/clk/mediatek/
H A Dclk-mt7622.c217 .set_ofs = 0x120,
218 .clr_ofs = 0x120,
219 .sta_ofs = 0x120,
332 0x120, 24, 3),
334 0x120, 28, 3),
465 0x120, 6, 1),
467 0x120, 7, 1),
469 0x120, 8, 1),
471 0x120, 9, 1),
473 0x120, 1
[all...]
H A Dclk-mt6795-topckgen.c505 MUX(CLK_TOP_I2S0_M_SEL, "i2s0_m_ck_sel", i2s0_m_ck_parents, 0x120, 4, 1),
506 MUX(CLK_TOP_I2S1_M_SEL, "i2s1_m_ck_sel", i2s1_m_ck_parents, 0x120, 5, 1),
507 MUX(CLK_TOP_I2S2_M_SEL, "i2s2_m_ck_sel", i2s2_m_ck_parents, 0x120, 6, 1),
508 MUX(CLK_TOP_I2S3_M_SEL, "i2s3_m_ck_sel", i2s3_m_ck_parents, 0x120, 7, 1),
509 MUX(CLK_TOP_I2S3_B_SEL, "i2s3_b_ck_sel", i2s3_b_ck_parents, 0x120, 8, 1),
511 DIV_GATE(CLK_TOP_APLL1_DIV0, "apll1_div0", "aud_1_sel", 0x12c, 8, 0x120, 4, 24),
518 DIV_GATE(CLK_TOP_APLL2_DIV0, "apll2_div0", "aud_2_sel", 0x12c, 16, 0x120, 4, 28),
H A Dclk-mt8173-topckgen.c606 DIV_GATE(CLK_TOP_APLL1_DIV0, "apll1_div0", "aud_1_sel", 0x12c, 8, 0x120, 4, 24),
613 DIV_GATE(CLK_TOP_APLL2_DIV0, "apll2_div0", "aud_2_sel", 0x12c, 16, 0x120, 4, 28),
620 MUX(CLK_TOP_I2S0_M_SEL, "i2s0_m_ck_sel", i2s0_m_ck_parents, 0x120, 4, 1),
621 MUX(CLK_TOP_I2S1_M_SEL, "i2s1_m_ck_sel", i2s1_m_ck_parents, 0x120, 5, 1),
622 MUX(CLK_TOP_I2S2_M_SEL, "i2s2_m_ck_sel", i2s2_m_ck_parents, 0x120, 6, 1),
623 MUX(CLK_TOP_I2S3_M_SEL, "i2s3_m_ck_sel", i2s3_m_ck_parents, 0x120, 7, 1),
624 MUX(CLK_TOP_I2S3_B_SEL, "i2s3_b_ck_sel", i2s3_b_ck_parents, 0x120, 8, 1),
/kernel/linux/linux-5.10/drivers/clk/mediatek/
H A Dclk-mt7622.c307 .set_ofs = 0x120,
308 .clr_ofs = 0x120,
309 .sta_ofs = 0x120,
456 0x120, 24, 3),
458 0x120, 28, 3),
594 0x120, 6, 1),
596 0x120, 7, 1),
598 0x120, 8, 1),
600 0x120, 9, 1),
602 0x120, 1
[all...]
H A Dclk-mt8173.c595 DIV_GATE(CLK_TOP_APLL1_DIV0, "apll1_div0", "aud_1_sel", 0x12c, 8, 0x120, 4, 24),
602 DIV_GATE(CLK_TOP_APLL2_DIV0, "apll2_div0", "aud_2_sel", 0x12c, 16, 0x120, 4, 28),
609 MUX(CLK_TOP_I2S0_M_SEL, "i2s0_m_ck_sel", i2s0_m_ck_parents, 0x120, 4, 1),
610 MUX(CLK_TOP_I2S1_M_SEL, "i2s1_m_ck_sel", i2s1_m_ck_parents, 0x120, 5, 1),
611 MUX(CLK_TOP_I2S2_M_SEL, "i2s2_m_ck_sel", i2s2_m_ck_parents, 0x120, 6, 1),
612 MUX(CLK_TOP_I2S3_M_SEL, "i2s3_m_ck_sel", i2s3_m_ck_parents, 0x120, 7, 1),
613 MUX(CLK_TOP_I2S3_B_SEL, "i2s3_b_ck_sel", i2s3_b_ck_parents, 0x120, 8, 1),
/kernel/linux/linux-5.10/include/linux/mfd/syscon/
H A Datmel-matrix.h28 #define AT91SAM9263_MATRIX_EBI0CSA 0x120
36 #define AT91SAM9RL_MATRIX_EBICSA 0x120
56 #define AT91SAM9X5_MATRIX_EBICSA 0x120
/kernel/linux/linux-6.6/include/linux/mfd/syscon/
H A Datmel-matrix.h28 #define AT91SAM9263_MATRIX_EBI0CSA 0x120
36 #define AT91SAM9RL_MATRIX_EBICSA 0x120
56 #define AT91SAM9X5_MATRIX_EBICSA 0x120
/kernel/linux/linux-5.10/arch/arm/mach-mmp/
H A Dmmp2.c149 MMP2_DEVICE(sdh0, "sdhci-pxav3", 0, MMC, 0xd4280000, 0x120);
150 MMP2_DEVICE(sdh1, "sdhci-pxav3", 1, MMC2, 0xd4280800, 0x120);
151 MMP2_DEVICE(sdh2, "sdhci-pxav3", 2, MMC3, 0xd4281000, 0x120);
152 MMP2_DEVICE(sdh3, "sdhci-pxav3", 3, MMC4, 0xd4281800, 0x120);
/kernel/linux/linux-5.10/drivers/pinctrl/samsung/
H A Dpinctrl-exynos-arm.c102 EXYNOS_PIN_BANK_EINTG(8, 0x120, "gpf0", 0x24),
165 EXYNOS_PIN_BANK_EINTN(8, 0x120, "gpe0"),
249 EXYNOS_PIN_BANK_EINTG(6, 0x120, "gpe2", 0x24),
270 EXYNOS_PIN_BANK_EINTN(6, 0x120, "gpy0"),
387 EXYNOS_PIN_BANK_EINTN(6, 0x120, "gpy0"),
473 EXYNOS_PIN_BANK_EINTG(7, 0x120, "gpc2", 0x24),
578 EXYNOS_PIN_BANK_EINTG(8, 0x120, "gpd0", 0x24),
656 EXYNOS_PIN_BANK_EINTG(7, 0x120, "gpc1", 0x24),
778 EXYNOS_PIN_BANK_EINTN(8, 0x120, "gpy3"),
H A Dpinctrl-exynos-arm64.c120 EXYNOS5433_PIN_BANK_EINTG(8, 0x120, "gpd2", 0x24),
299 EXYNOS_PIN_BANK_EINTG(4, 0x120, "gpd5", 0x24),
357 EXYNOS_PIN_BANK_EINTG(6, 0x120, "gph1", 0x20),
/kernel/linux/linux-6.6/drivers/pinctrl/samsung/
H A Dpinctrl-exynos-arm.c102 EXYNOS_PIN_BANK_EINTG(8, 0x120, "gpf0", 0x24),
165 EXYNOS_PIN_BANK_EINTN(8, 0x120, "gpe0"),
249 EXYNOS_PIN_BANK_EINTG(6, 0x120, "gpe2", 0x24),
270 EXYNOS_PIN_BANK_EINTN(6, 0x120, "gpy0"),
387 EXYNOS_PIN_BANK_EINTN(6, 0x120, "gpy0"),
473 EXYNOS_PIN_BANK_EINTG(7, 0x120, "gpc2", 0x24),
578 EXYNOS_PIN_BANK_EINTG(8, 0x120, "gpd0", 0x24),
656 EXYNOS_PIN_BANK_EINTG(7, 0x120, "gpc1", 0x24),
778 EXYNOS_PIN_BANK_EINTN(8, 0x120, "gpy3"),
/kernel/linux/linux-6.6/drivers/phy/qualcomm/
H A Dphy-qcom-qmp-pcie-qhp.h36 #define PCIE_GEN3_QHP_COM_DIV_FRAC_START2_MODE0 0x120
78 #define PCIE_GEN3_QHP_L0_DFE_ENABLE_TIME 0x120
/kernel/linux/linux-5.10/arch/arm/mach-s3c/
H A Dregs-clock-s3c64xx.h22 #define S3C_MEM_SYS_CFG S3C_CLKREG(0x120)
/kernel/linux/linux-6.6/arch/arm/mach-s3c/
H A Dregs-clock-s3c64xx.h22 #define S3C_MEM_SYS_CFG S3C_CLKREG(0x120)
/kernel/linux/linux-5.10/include/linux/
H A Datmel_pdc.h24 #define ATMEL_PDC_PTCR 0x120 /* Transfer Control Register */
/kernel/linux/linux-6.6/include/linux/
H A Datmel_pdc.h24 #define ATMEL_PDC_PTCR 0x120 /* Transfer Control Register */
/kernel/linux/linux-6.6/include/dt-bindings/clock/
H A Dam4.h12 #define AM4_L3S_TSC_CLKCTRL_OFFSET 0x120
14 #define AM4_L3S_TSC_ADC_TSC_CLKCTRL AM4_L3S_TSC_CLKCTRL_INDEX(0x120)
H A Dam3.h70 #define AM3_L4HS_CLKCTRL_OFFSET 0x120
72 #define AM3_L4HS_L4_HS_CLKCTRL AM3_L4HS_CLKCTRL_INDEX(0x120)
/kernel/linux/linux-6.6/scripts/dtc/include-prefixes/dt-bindings/clock/
H A Dam4.h12 #define AM4_L3S_TSC_CLKCTRL_OFFSET 0x120
14 #define AM4_L3S_TSC_ADC_TSC_CLKCTRL AM4_L3S_TSC_CLKCTRL_INDEX(0x120)
H A Dam3.h70 #define AM3_L4HS_CLKCTRL_OFFSET 0x120
72 #define AM3_L4HS_L4_HS_CLKCTRL AM3_L4HS_CLKCTRL_INDEX(0x120)
/kernel/linux/linux-5.10/arch/arm/mach-tango/
H A Dsmc.h7 #define tango_suspend(val) tango_smc(val, 0x120)
/kernel/linux/linux-5.10/drivers/clk/hisilicon/
H A Dclk-hix5hd2.c67 CLK_SET_RATE_PARENT, 0x120, 8, 2, 0, fephy_mux_table, },
94 CLK_SET_RATE_PARENT, 0x120, 0, 0, },
158 0xcc, 0xa, 0x500, 0x120, 0, 0x10, TYPE_ETHER},
/kernel/linux/linux-5.10/scripts/dtc/include-prefixes/dt-bindings/clock/
H A Dam4.h14 #define AM4_ADC_TSC_CLKCTRL AM4_CLKCTRL_INDEX(0x120)
110 #define AM4_L3S_TSC_CLKCTRL_OFFSET 0x120
112 #define AM4_L3S_TSC_ADC_TSC_CLKCTRL AM4_L3S_TSC_CLKCTRL_INDEX(0x120)
H A Dam3.h64 #define AM3_L4_HS_CLKCTRL AM3_L4_PER_CLKCTRL_INDEX(0x120)
163 #define AM3_L4HS_CLKCTRL_OFFSET 0x120
165 #define AM3_L4HS_L4_HS_CLKCTRL AM3_L4HS_CLKCTRL_INDEX(0x120)
/kernel/linux/linux-5.10/include/dt-bindings/clock/
H A Dam3.h64 #define AM3_L4_HS_CLKCTRL AM3_L4_PER_CLKCTRL_INDEX(0x120)
163 #define AM3_L4HS_CLKCTRL_OFFSET 0x120
165 #define AM3_L4HS_L4_HS_CLKCTRL AM3_L4HS_CLKCTRL_INDEX(0x120)

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