162306a36Sopenharmony_ci/* SPDX-License-Identifier: GPL-2.0 */ 262306a36Sopenharmony_ci/* 362306a36Sopenharmony_ci * Copyright 2008 Openmoko, Inc. 462306a36Sopenharmony_ci * Copyright 2008 Simtec Electronics 562306a36Sopenharmony_ci * Ben Dooks <ben@simtec.co.uk> 662306a36Sopenharmony_ci * http://armlinux.simtec.co.uk/ 762306a36Sopenharmony_ci * 862306a36Sopenharmony_ci * S3C64XX clock register definitions 962306a36Sopenharmony_ci */ 1062306a36Sopenharmony_ci 1162306a36Sopenharmony_ci#ifndef __PLAT_REGS_CLOCK_H 1262306a36Sopenharmony_ci#define __PLAT_REGS_CLOCK_H __FILE__ 1362306a36Sopenharmony_ci 1462306a36Sopenharmony_ci/* 1562306a36Sopenharmony_ci * FIXME: Remove remaining definitions 1662306a36Sopenharmony_ci */ 1762306a36Sopenharmony_ci 1862306a36Sopenharmony_ci#define S3C_CLKREG(x) (S3C_VA_SYS + (x)) 1962306a36Sopenharmony_ci 2062306a36Sopenharmony_ci#define S3C_PCLK_GATE S3C_CLKREG(0x34) 2162306a36Sopenharmony_ci#define S3C6410_CLK_SRC2 S3C_CLKREG(0x10C) 2262306a36Sopenharmony_ci#define S3C_MEM_SYS_CFG S3C_CLKREG(0x120) 2362306a36Sopenharmony_ci 2462306a36Sopenharmony_ci/* PCLK GATE Registers */ 2562306a36Sopenharmony_ci#define S3C_CLKCON_PCLK_UART3 (1<<4) 2662306a36Sopenharmony_ci#define S3C_CLKCON_PCLK_UART2 (1<<3) 2762306a36Sopenharmony_ci#define S3C_CLKCON_PCLK_UART1 (1<<2) 2862306a36Sopenharmony_ci#define S3C_CLKCON_PCLK_UART0 (1<<1) 2962306a36Sopenharmony_ci 3062306a36Sopenharmony_ci/* MEM_SYS_CFG */ 3162306a36Sopenharmony_ci#define MEM_SYS_CFG_INDEP_CF 0x4000 3262306a36Sopenharmony_ci#define MEM_SYS_CFG_EBI_FIX_PRI_CFCON 0x30 3362306a36Sopenharmony_ci 3462306a36Sopenharmony_ci#endif /* _PLAT_REGS_CLOCK_H */ 35