pll4_bypass_sels (reference) in projects: kernel - OpenGrok search results

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Searched refs:pll4_bypass_sels (Results 1 - 12 of 12) sorted by relevance

/kernel/linux/linux-5.10/drivers/clk/imx/
H A D	clk-imx6sll.c	`26 static const char *pll4_bypass_sels[] = { "pll4", "pll4_bypass_src", }; variable 134 hws[IMX6SLL_PLL4_BYPASS] = imx_clk_hw_mux_flags("pll4_bypass", base + 0x70, 16, 1, pll4_bypass_sels, ARRAY_SIZE(pll4_bypass_sels), CLK_SET_RATE_PARENT); in imx6sll_clocks_init()`
H A D	clk-imx6sl.c	`66 static const char *pll4_bypass_sels[] = { "pll4", "pll4_bypass_src", }; variable 227 hws[IMX6SL_PLL4_BYPASS] = imx_clk_hw_mux_flags("pll4_bypass", base + 0x70, 16, 1, pll4_bypass_sels, ARRAY_SIZE(pll4_bypass_sels), CLK_SET_RATE_PARENT); in imx6sl_clocks_init()`
H A D	clk-vf610.c	`80 static const char *pll4_bypass_sels[] = { "pll4", "pll4_bypass_src", }; variable 230 clk[VF610_PLL4_BYPASS] = imx_clk_mux_flags("pll4_bypass", PLL4_CTRL, 16, 1, pll4_bypass_sels, ARRAY_SIZE(pll4_bypass_sels), CLK_SET_RATE_PARENT); in vf610_clocks_init()`
H A D	clk-imx6ul.c	`24 static const char *pll4_bypass_sels[] = { "pll4", "pll4_bypass_src", }; variable 160 hws[IMX6UL_PLL4_BYPASS] = imx_clk_hw_mux_flags("pll4_bypass", base + 0x70, 16, 1, pll4_bypass_sels, ARRAY_SIZE(pll4_bypass_sels), CLK_SET_RATE_PARENT); in imx6ul_clocks_init()`
H A D	clk-imx6sx.c	`80 static const char *pll4_bypass_sels[] = { "pll4", "pll4_bypass_src", }; variable 171 hws[IMX6SX_PLL4_BYPASS] = imx_clk_hw_mux_flags("pll4_bypass", base + 0x70, 16, 1, pll4_bypass_sels, ARRAY_SIZE(pll4_bypass_sels), CLK_SET_RATE_PARENT); in imx6sx_clocks_init()`
H A D	clk-imx6q.c	`87 static const char *pll4_bypass_sels[] = { "pll4", "pll4_bypass_src", }; variable 488 hws[IMX6QDL_PLL4_BYPASS] = imx_clk_hw_mux_flags("pll4_bypass", base + 0x70, 16, 1, pll4_bypass_sels, ARRAY_SIZE(pll4_bypass_sels), CLK_SET_RATE_PARENT); in imx6q_clocks_init()`
/kernel/linux/linux-6.6/drivers/clk/imx/
H A D	clk-imx6sll.c	`26 static const char *pll4_bypass_sels[] = { "pll4", "pll4_bypass_src", }; variable 134 hws[IMX6SLL_PLL4_BYPASS] = imx_clk_hw_mux_flags("pll4_bypass", base + 0x70, 16, 1, pll4_bypass_sels, ARRAY_SIZE(pll4_bypass_sels), CLK_SET_RATE_PARENT); in imx6sll_clocks_init()`
H A D	clk-vf610.c	`80 static const char *pll4_bypass_sels[] = { "pll4", "pll4_bypass_src", }; variable 230 clk[VF610_PLL4_BYPASS] = imx_clk_mux_flags("pll4_bypass", PLL4_CTRL, 16, 1, pll4_bypass_sels, ARRAY_SIZE(pll4_bypass_sels), CLK_SET_RATE_PARENT); in vf610_clocks_init()`
H A D	clk-imx6sl.c	`67 static const char *pll4_bypass_sels[] = { "pll4", "pll4_bypass_src", }; variable 228 hws[IMX6SL_PLL4_BYPASS] = imx_clk_hw_mux_flags("pll4_bypass", base + 0x70, 16, 1, pll4_bypass_sels, ARRAY_SIZE(pll4_bypass_sels), CLK_SET_RATE_PARENT); in imx6sl_clocks_init()`
H A D	clk-imx6sx.c	`80 static const char *pll4_bypass_sels[] = { "pll4", "pll4_bypass_src", }; variable 171 hws[IMX6SX_PLL4_BYPASS] = imx_clk_hw_mux_flags("pll4_bypass", base + 0x70, 16, 1, pll4_bypass_sels, ARRAY_SIZE(pll4_bypass_sels), CLK_SET_RATE_PARENT); in imx6sx_clocks_init()`
H A D	clk-imx6ul.c	`25 static const char *pll4_bypass_sels[] = { "pll4", "pll4_bypass_src", }; variable 174 hws[IMX6UL_PLL4_BYPASS] = imx_clk_hw_mux_flags("pll4_bypass", base + 0x70, 16, 1, pll4_bypass_sels, ARRAY_SIZE(pll4_bypass_sels), CLK_SET_RATE_PARENT); in imx6ul_clocks_init()`
H A D	clk-imx6q.c	`88 static const char *pll4_bypass_sels[] = { "pll4", "pll4_bypass_src", }; variable 493 hws[IMX6QDL_PLL4_BYPASS] = imx_clk_hw_mux_flags("pll4_bypass", base + 0x70, 16, 1, pll4_bypass_sels, ARRAY_SIZE(pll4_bypass_sels), CLK_SET_RATE_PARENT); in imx6q_clocks_init()`

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