| /kernel/linux/linux-6.6/drivers/clk/imx/ |
| H A D | clk-imxrt1050.c | 18 static const char * const pll1_bypass_sels[] = {"pll1_arm", "pll1_arm_ref_sel", }; variable
86 pll1_bypass_sels, ARRAY_SIZE(pll1_bypass_sels), CLK_SET_RATE_PARENT); in imxrt1050_clocks_probe()
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| H A D | clk-imx6sll.c | 23 static const char *pll1_bypass_sels[] = { "pll1", "pll1_bypass_src", }; variable
131 hws[IMX6SLL_PLL1_BYPASS] = imx_clk_hw_mux_flags("pll1_bypass", base + 0x00, 16, 1, pll1_bypass_sels, ARRAY_SIZE(pll1_bypass_sels), CLK_SET_RATE_PARENT); in imx6sll_clocks_init()
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| H A D | clk-vf610.c | 77 static const char *pll1_bypass_sels[] = { "pll1", "pll1_bypass_src", }; variable
227 clk[VF610_PLL1_BYPASS] = imx_clk_mux_flags("pll1_bypass", PLL1_CTRL, 16, 1, pll1_bypass_sels, ARRAY_SIZE(pll1_bypass_sels), CLK_SET_RATE_PARENT); in vf610_clocks_init()
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| H A D | clk-imx6sl.c | 64 static const char *pll1_bypass_sels[] = { "pll1", "pll1_bypass_src", }; variable
225 hws[IMX6SL_PLL1_BYPASS] = imx_clk_hw_mux_flags("pll1_bypass", base + 0x00, 16, 1, pll1_bypass_sels, ARRAY_SIZE(pll1_bypass_sels), CLK_SET_RATE_PARENT); in imx6sl_clocks_init()
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| H A D | clk-imx6sx.c | 77 static const char *pll1_bypass_sels[] = { "pll1", "pll1_bypass_src", }; variable
168 hws[IMX6SX_PLL1_BYPASS] = imx_clk_hw_mux_flags("pll1_bypass", base + 0x00, 16, 1, pll1_bypass_sels, ARRAY_SIZE(pll1_bypass_sels), CLK_SET_RATE_PARENT); in imx6sx_clocks_init()
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| H A D | clk-imx6ul.c | 22 static const char *pll1_bypass_sels[] = { "pll1", "pll1_bypass_src", }; variable
171 hws[IMX6UL_PLL1_BYPASS] = imx_clk_hw_mux_flags("pll1_bypass", base + 0x00, 16, 1, pll1_bypass_sels, ARRAY_SIZE(pll1_bypass_sels), CLK_SET_RATE_PARENT); in imx6ul_clocks_init()
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| H A D | clk-imx6q.c | 85 static const char *pll1_bypass_sels[] = { "pll1", "pll1_bypass_src", }; variable
490 hws[IMX6QDL_PLL1_BYPASS] = imx_clk_hw_mux_flags("pll1_bypass", base + 0x00, 16, 1, pll1_bypass_sels, ARRAY_SIZE(pll1_bypass_sels), CLK_SET_RATE_PARENT); in imx6q_clocks_init()
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| /kernel/linux/linux-5.10/drivers/clk/imx/ |
| H A D | clk-imx6sll.c | 23 static const char *pll1_bypass_sels[] = { "pll1", "pll1_bypass_src", }; variable
131 hws[IMX6SLL_PLL1_BYPASS] = imx_clk_hw_mux_flags("pll1_bypass", base + 0x00, 16, 1, pll1_bypass_sels, ARRAY_SIZE(pll1_bypass_sels), CLK_SET_RATE_PARENT); in imx6sll_clocks_init()
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| H A D | clk-imx6sl.c | 63 static const char *pll1_bypass_sels[] = { "pll1", "pll1_bypass_src", }; variable
224 hws[IMX6SL_PLL1_BYPASS] = imx_clk_hw_mux_flags("pll1_bypass", base + 0x00, 16, 1, pll1_bypass_sels, ARRAY_SIZE(pll1_bypass_sels), CLK_SET_RATE_PARENT); in imx6sl_clocks_init()
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| H A D | clk-vf610.c | 77 static const char *pll1_bypass_sels[] = { "pll1", "pll1_bypass_src", }; variable
227 clk[VF610_PLL1_BYPASS] = imx_clk_mux_flags("pll1_bypass", PLL1_CTRL, 16, 1, pll1_bypass_sels, ARRAY_SIZE(pll1_bypass_sels), CLK_SET_RATE_PARENT); in vf610_clocks_init()
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| H A D | clk-imx6ul.c | 21 static const char *pll1_bypass_sels[] = { "pll1", "pll1_bypass_src", }; variable
157 hws[IMX6UL_PLL1_BYPASS] = imx_clk_hw_mux_flags("pll1_bypass", base + 0x00, 16, 1, pll1_bypass_sels, ARRAY_SIZE(pll1_bypass_sels), CLK_SET_RATE_PARENT); in imx6ul_clocks_init()
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| H A D | clk-imx6sx.c | 77 static const char *pll1_bypass_sels[] = { "pll1", "pll1_bypass_src", }; variable
168 hws[IMX6SX_PLL1_BYPASS] = imx_clk_hw_mux_flags("pll1_bypass", base + 0x00, 16, 1, pll1_bypass_sels, ARRAY_SIZE(pll1_bypass_sels), CLK_SET_RATE_PARENT); in imx6sx_clocks_init()
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| H A D | clk-imx6q.c | 84 static const char *pll1_bypass_sels[] = { "pll1", "pll1_bypass_src", }; variable
485 hws[IMX6QDL_PLL1_BYPASS] = imx_clk_hw_mux_flags("pll1_bypass", base + 0x00, 16, 1, pll1_bypass_sels, ARRAY_SIZE(pll1_bypass_sels), CLK_SET_RATE_PARENT); in imx6q_clocks_init()
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