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Searched refs:nv04_crtc_reg (Results 1 - 16 of 16) sorted by relevance

/kernel/linux/linux-5.10/drivers/gpu/drm/nouveau/dispnv04/
H A Dcursor.c31 crtc_wr_cio_state(struct drm_crtc *crtc, struct nv04_crtc_reg *crtcstate, int index) in crtc_wr_cio_state()
42 struct nv04_crtc_reg *regp = &nv04_display(dev)->mode_reg.crtc_reg[nv_crtc->index]; in nv04_cursor_set_offset()
H A Ddisp.h21 struct nv04_crtc_reg { struct
76 struct nv04_crtc_reg crtc_reg[2];
H A Dtvnv04.c107 struct nv04_crtc_reg *state = &nv04_display(dev)->mode_reg.crtc_reg[head]; in nv04_tv_bind()
146 struct nv04_crtc_reg *regp = &nv04_display(dev)->mode_reg.crtc_reg[nv_crtc->index]; in nv04_tv_mode_set()
H A Dhw.c379 struct nv04_crtc_reg *crtcstate, int index) in rd_cio_state()
386 struct nv04_crtc_reg *crtcstate, int index) in wr_cio_state()
396 struct nv04_crtc_reg *regp = &state->crtc_reg[head]; in nv_save_state_ramdac()
472 struct nv04_crtc_reg *regp = &state->crtc_reg[head]; in nv_load_state_ramdac()
542 struct nv04_crtc_reg *regp = &state->crtc_reg[head]; in nv_save_state_vga()
566 struct nv04_crtc_reg *regp = &state->crtc_reg[head]; in nv_load_state_vga()
593 struct nv04_crtc_reg *regp = &state->crtc_reg[head]; in nv_save_state_ext()
669 struct nv04_crtc_reg *regp = &state->crtc_reg[head]; in nv_load_state_ext()
H A Dcrtc.c57 crtc_wr_cio_state(struct drm_crtc *crtc, struct nv04_crtc_reg *crtcstate, int index) in crtc_wr_cio_state()
67 struct nv04_crtc_reg *regp = &nv04_display(dev)->mode_reg.crtc_reg[nv_crtc->index]; in nv_crtc_set_digital_vibrance()
82 struct nv04_crtc_reg *regp = &nv04_display(dev)->mode_reg.crtc_reg[nv_crtc->index]; in nv_crtc_set_image_sharpening()
125 struct nv04_crtc_reg *regp = &state->crtc_reg[nv_crtc->index]; in nv_crtc_calc_state_ext()
241 struct nv04_crtc_reg *regp = &nv04_display(dev)->mode_reg.crtc_reg[nv_crtc->index]; in nv_crtc_mode_set_vga()
466 struct nv04_crtc_reg *regp = &nv04_display(dev)->mode_reg.crtc_reg[nv_crtc->index]; in nv_crtc_mode_set_regs()
467 struct nv04_crtc_reg *savep = &nv04_display(dev)->saved_reg.crtc_reg[nv_crtc->index]; in nv_crtc_mode_set_regs()
670 struct nv04_crtc_reg *crtc_state = &state->crtc_reg[nv_crtc->index]; in nv_crtc_save()
672 struct nv04_crtc_reg *crtc_saved = &saved->crtc_reg[nv_crtc->index]; in nv_crtc_save()
831 struct nv04_crtc_reg *reg in nv04_crtc_do_mode_set_base()
[all...]
H A Ddfp.c95 struct nv04_crtc_reg *crtcstate = nv04_display(dev)->mode_reg.crtc_reg; in nv04_dfp_disable()
251 struct nv04_crtc_reg *crtcstate = nv04_display(dev)->mode_reg.crtc_reg; in nv04_dfp_prepare()
288 struct nv04_crtc_reg *regp = &nv04_display(dev)->mode_reg.crtc_reg[nv_crtc->index]; in nv04_dfp_mode_set()
289 struct nv04_crtc_reg *savep = &nv04_display(dev)->saved_reg.crtc_reg[nv_crtc->index]; in nv04_dfp_mode_set()
H A Dtvnv17.c464 struct nv04_crtc_reg *regs = &nv04_display(dev)->mode_reg.crtc_reg[head]; in nv17_tv_mode_set()
H A Dtvmodesnv17.c547 struct nv04_crtc_reg *regs = &nv04_display(dev)->mode_reg.crtc_reg[head]; in nv17_ctv_update_rescaler()
/kernel/linux/linux-6.6/drivers/gpu/drm/nouveau/dispnv04/
H A Dcursor.c31 crtc_wr_cio_state(struct drm_crtc *crtc, struct nv04_crtc_reg *crtcstate, int index) in crtc_wr_cio_state()
42 struct nv04_crtc_reg *regp = &nv04_display(dev)->mode_reg.crtc_reg[nv_crtc->index]; in nv04_cursor_set_offset()
H A Ddisp.h23 struct nv04_crtc_reg { struct
78 struct nv04_crtc_reg crtc_reg[2];
H A Dtvnv04.c107 struct nv04_crtc_reg *state = &nv04_display(dev)->mode_reg.crtc_reg[head]; in nv04_tv_bind()
146 struct nv04_crtc_reg *regp = &nv04_display(dev)->mode_reg.crtc_reg[nv_crtc->index]; in nv04_tv_mode_set()
H A Dhw.c381 struct nv04_crtc_reg *crtcstate, int index) in rd_cio_state()
388 struct nv04_crtc_reg *crtcstate, int index) in wr_cio_state()
398 struct nv04_crtc_reg *regp = &state->crtc_reg[head]; in nv_save_state_ramdac()
474 struct nv04_crtc_reg *regp = &state->crtc_reg[head]; in nv_load_state_ramdac()
544 struct nv04_crtc_reg *regp = &state->crtc_reg[head]; in nv_save_state_vga()
568 struct nv04_crtc_reg *regp = &state->crtc_reg[head]; in nv_load_state_vga()
595 struct nv04_crtc_reg *regp = &state->crtc_reg[head]; in nv_save_state_ext()
671 struct nv04_crtc_reg *regp = &state->crtc_reg[head]; in nv_load_state_ext()
H A Dcrtc.c57 crtc_wr_cio_state(struct drm_crtc *crtc, struct nv04_crtc_reg *crtcstate, int index) in crtc_wr_cio_state()
67 struct nv04_crtc_reg *regp = &nv04_display(dev)->mode_reg.crtc_reg[nv_crtc->index]; in nv_crtc_set_digital_vibrance()
82 struct nv04_crtc_reg *regp = &nv04_display(dev)->mode_reg.crtc_reg[nv_crtc->index]; in nv_crtc_set_image_sharpening()
125 struct nv04_crtc_reg *regp = &state->crtc_reg[nv_crtc->index]; in nv_crtc_calc_state_ext()
241 struct nv04_crtc_reg *regp = &nv04_display(dev)->mode_reg.crtc_reg[nv_crtc->index]; in nv_crtc_mode_set_vga()
466 struct nv04_crtc_reg *regp = &nv04_display(dev)->mode_reg.crtc_reg[nv_crtc->index]; in nv_crtc_mode_set_regs()
467 struct nv04_crtc_reg *savep = &nv04_display(dev)->saved_reg.crtc_reg[nv_crtc->index]; in nv_crtc_mode_set_regs()
670 struct nv04_crtc_reg *crtc_state = &state->crtc_reg[nv_crtc->index]; in nv_crtc_save()
672 struct nv04_crtc_reg *crtc_saved = &saved->crtc_reg[nv_crtc->index]; in nv_crtc_save()
832 struct nv04_crtc_reg *reg in nv04_crtc_do_mode_set_base()
[all...]
H A Ddfp.c95 struct nv04_crtc_reg *crtcstate = nv04_display(dev)->mode_reg.crtc_reg; in nv04_dfp_disable()
251 struct nv04_crtc_reg *crtcstate = nv04_display(dev)->mode_reg.crtc_reg; in nv04_dfp_prepare()
288 struct nv04_crtc_reg *regp = &nv04_display(dev)->mode_reg.crtc_reg[nv_crtc->index]; in nv04_dfp_mode_set()
289 struct nv04_crtc_reg *savep = &nv04_display(dev)->saved_reg.crtc_reg[nv_crtc->index]; in nv04_dfp_mode_set()
H A Dtvnv17.c465 struct nv04_crtc_reg *regs = &nv04_display(dev)->mode_reg.crtc_reg[head]; in nv17_tv_mode_set()
H A Dtvmodesnv17.c546 struct nv04_crtc_reg *regs = &nv04_display(dev)->mode_reg.crtc_reg[head]; in nv17_ctv_update_rescaler()

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