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Searched refs:mux_i2s1_p (Results 1 - 9 of 9) sorted by relevance

/kernel/linux/linux-5.10/drivers/clk/rockchip/
H A Dclk-rk3328.c171 PNAME(mux_i2s1_p) = { "clk_i2s1_div", variable
240 MUX(0, "i2s1_pre", mux_i2s1_p, CLK_SET_RATE_PARENT,
H A Dclk-rv1108.c137 PNAME(mux_i2s1_p) = { "i2s1_src", "i2s1_frac", "dummy", "xin12m" }; variable
183 MUX(0, "i2s1_pre", mux_i2s1_p, CLK_SET_RATE_PARENT,
H A Dclk-px30.c153 PNAME(mux_i2s1_p) = { "clk_i2s1_src", "clk_i2s1_frac", "i2s1_clkin", "xin12m"}; variable
220 MUX(0, "clk_i2s1_mux", mux_i2s1_p, CLK_SET_RATE_PARENT,
H A Dclk-rk3399.c196 PNAME(mux_i2s1_p) = { "clk_i2s1_div", "clk_i2s1_frac", variable
254 MUX(0, "clk_i2s1_mux", mux_i2s1_p, CLK_SET_RATE_PARENT,
/kernel/linux/linux-6.6/drivers/clk/rockchip/
H A Dclk-rv1108.c138 PNAME(mux_i2s1_p) = { "i2s1_src", "i2s1_frac", "dummy", "xin12m" }; variable
184 MUX(0, "i2s1_pre", mux_i2s1_p, CLK_SET_RATE_PARENT,
H A Dclk-rk3328.c172 PNAME(mux_i2s1_p) = { "clk_i2s1_div", variable
241 MUX(0, "i2s1_pre", mux_i2s1_p, CLK_SET_RATE_PARENT,
H A Dclk-rv1126.c172 PNAME(mux_i2s1_p) = { "mclk_i2s1_div", "mclk_i2s1_fracdiv", "i2s1_mclkin", "xin12m" }; variable
252 MUX(MCLK_I2S1_MUX, "mclk_i2s1_mux", mux_i2s1_p, CLK_SET_RATE_PARENT,
H A Dclk-px30.c154 PNAME(mux_i2s1_p) = { "clk_i2s1_src", "clk_i2s1_frac", "i2s1_clkin", "xin12m"}; variable
221 MUX(0, "clk_i2s1_mux", mux_i2s1_p, CLK_SET_RATE_PARENT,
H A Dclk-rk3399.c196 PNAME(mux_i2s1_p) = { "clk_i2s1_div", "clk_i2s1_frac", variable
254 MUX(0, "clk_i2s1_mux", mux_i2s1_p, CLK_SET_RATE_PARENT,

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