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Searched refs:imm12 (Results 1 - 10 of 10) sorted by relevance

/kernel/linux/linux-5.10/arch/arm64/net/
H A Dbpf_jit.h97 #define A64_ADDSUB_IMM(sf, Rd, Rn, imm12, type) \
98 aarch64_insn_gen_add_sub_imm(Rd, Rn, imm12, \
100 /* Rd = Rn OP imm12 */
101 #define A64_ADD_I(sf, Rd, Rn, imm12) A64_ADDSUB_IMM(sf, Rd, Rn, imm12, ADD)
102 #define A64_SUB_I(sf, Rd, Rn, imm12) A64_ADDSUB_IMM(sf, Rd, Rn, imm12, SUB)
103 #define A64_ADDS_I(sf, Rd, Rn, imm12) \
104 A64_ADDSUB_IMM(sf, Rd, Rn, imm12, ADD_SETFLAGS)
105 #define A64_SUBS_I(sf, Rd, Rn, imm12) \
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/kernel/linux/linux-6.6/arch/arm64/net/
H A Dbpf_jit.h155 #define A64_ADDSUB_IMM(sf, Rd, Rn, imm12, type) \
156 aarch64_insn_gen_add_sub_imm(Rd, Rn, imm12, \
158 /* Rd = Rn OP imm12 */
159 #define A64_ADD_I(sf, Rd, Rn, imm12) A64_ADDSUB_IMM(sf, Rd, Rn, imm12, ADD)
160 #define A64_SUB_I(sf, Rd, Rn, imm12) A64_ADDSUB_IMM(sf, Rd, Rn, imm12, SUB)
161 #define A64_ADDS_I(sf, Rd, Rn, imm12) \
162 A64_ADDSUB_IMM(sf, Rd, Rn, imm12, ADD_SETFLAGS)
163 #define A64_SUBS_I(sf, Rd, Rn, imm12) \
[all...]
/kernel/linux/linux-5.10/arch/arm/kernel/
H A Dphys2virt.S158 @ rotation value. (The effective value of the immediate is imm12<7:0>
159 @ rotated right by [2 * imm12<11:8>] bits)
163 @ ADD | cond | 0 0 1 0 1 0 0 0 | Rn | Rd | imm12 |
164 @ SUB | cond | 0 0 1 0 0 1 0 0 | Rn | Rd | imm12 |
165 @ MOV | cond | 0 0 1 1 1 0 1 0 | Rn | Rd | imm12 |
166 @ MVN | cond | 0 0 1 1 1 1 1 0 | Rn | Rd | imm12 |
179 @ MOVW | cond | 0 0 1 1 0 0 0 0 | imm4 | Rd | imm12 |
194 bfc ip, #0, #12 @ clear imm12 field of MOV[W] instruction
/kernel/linux/linux-6.6/arch/arm/kernel/
H A Dphys2virt.S158 @ rotation value. (The effective value of the immediate is imm12<7:0>
159 @ rotated right by [2 * imm12<11:8>] bits)
163 @ ADD | cond | 0 0 1 0 1 0 0 0 | Rn | Rd | imm12 |
164 @ SUB | cond | 0 0 1 0 0 1 0 0 | Rn | Rd | imm12 |
165 @ MOV | cond | 0 0 1 1 1 0 1 0 | Rn | Rd | imm12 |
166 @ MVN | cond | 0 0 1 1 1 1 1 0 | Rn | Rd | imm12 |
179 @ MOVW | cond | 0 0 1 1 0 0 0 0 | imm4 | Rd | imm12 |
194 bfc ip, #0, #12 @ clear imm12 field of MOV[W] instruction
/kernel/linux/linux-5.10/arch/arm/net/
H A Dbpf_jit_32.c297 * Checks if immediate value can be converted to imm12(12 bits) value.
311 static u32 arm_bpf_ldst_imm12(u32 op, u8 rt, u8 rn, s16 imm12) in arm_bpf_ldst_imm12() argument
314 if (imm12 >= 0) in arm_bpf_ldst_imm12()
317 imm12 = -imm12; in arm_bpf_ldst_imm12()
318 return op | (imm12 & ARM_INST_LDST__IMM12); in arm_bpf_ldst_imm12()
439 int imm12 = imm8m(val); in emit_mov_i() local
441 if (imm12 >= 0) in emit_mov_i()
442 emit(ARM_MOV_I(rd, imm12), ctx); in emit_mov_i()
/kernel/linux/linux-6.6/arch/arm/net/
H A Dbpf_jit_32.c297 * Checks if immediate value can be converted to imm12(12 bits) value.
311 static u32 arm_bpf_ldst_imm12(u32 op, u8 rt, u8 rn, s16 imm12) in arm_bpf_ldst_imm12() argument
314 if (imm12 >= 0) in arm_bpf_ldst_imm12()
317 imm12 = -imm12; in arm_bpf_ldst_imm12()
318 return op | (imm12 & ARM_INST_LDST__IMM12); in arm_bpf_ldst_imm12()
439 int imm12 = imm8m(val); in emit_mov_i() local
441 if (imm12 >= 0) in emit_mov_i()
442 emit(ARM_MOV_I(rd, imm12), ctx); in emit_mov_i()
/kernel/linux/linux-5.10/arch/riscv/kernel/
H A Dmodule.c50 u32 imm12 = (offset & 0x1000) << (31 - 12); in apply_r_riscv_branch_rela() local
55 *location = (*location & 0x1fff07f) | imm12 | imm11 | imm10_5 | imm4_1; in apply_r_riscv_branch_rela()
/kernel/linux/linux-6.6/arch/riscv/kernel/
H A Dmodule.c51 u32 imm12 = (offset & 0x1000) << (31 - 12); in apply_r_riscv_branch_rela() local
56 *location = (*location & 0x1fff07f) | imm12 | imm11 | imm10_5 | imm4_1; in apply_r_riscv_branch_rela()
/kernel/linux/linux-5.10/arch/riscv/net/
H A Dbpf_jit.h248 u8 imm12 = ((imm12_1 & 0x800) >> 5) | ((imm12_1 & 0x3f0) >> 4); in rv_b_insn() local
251 return (imm12 << 25) | (rs2 << 20) | (rs1 << 15) | (funct3 << 12) | in rv_b_insn()
/kernel/linux/linux-6.6/arch/riscv/net/
H A Dbpf_jit.h252 u8 imm12 = ((imm12_1 & 0x800) >> 5) | ((imm12_1 & 0x3f0) >> 4); in rv_b_insn() local
255 return (imm12 << 25) | (rs2 << 20) | (rs1 << 15) | (funct3 << 12) | in rv_b_insn()

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