Lines Matching refs:imm12
97 #define A64_ADDSUB_IMM(sf, Rd, Rn, imm12, type) \
98 aarch64_insn_gen_add_sub_imm(Rd, Rn, imm12, \
100 /* Rd = Rn OP imm12 */
101 #define A64_ADD_I(sf, Rd, Rn, imm12) A64_ADDSUB_IMM(sf, Rd, Rn, imm12, ADD)
102 #define A64_SUB_I(sf, Rd, Rn, imm12) A64_ADDSUB_IMM(sf, Rd, Rn, imm12, SUB)
103 #define A64_ADDS_I(sf, Rd, Rn, imm12) \
104 A64_ADDSUB_IMM(sf, Rd, Rn, imm12, ADD_SETFLAGS)
105 #define A64_SUBS_I(sf, Rd, Rn, imm12) \
106 A64_ADDSUB_IMM(sf, Rd, Rn, imm12, SUB_SETFLAGS)
107 /* Rn + imm12; set condition flags */
108 #define A64_CMN_I(sf, Rn, imm12) A64_ADDS_I(sf, A64_ZR, Rn, imm12)
109 /* Rn - imm12; set condition flags */
110 #define A64_CMP_I(sf, Rn, imm12) A64_SUBS_I(sf, A64_ZR, Rn, imm12)