Lines Matching refs:imm12
155 #define A64_ADDSUB_IMM(sf, Rd, Rn, imm12, type) \
156 aarch64_insn_gen_add_sub_imm(Rd, Rn, imm12, \
158 /* Rd = Rn OP imm12 */
159 #define A64_ADD_I(sf, Rd, Rn, imm12) A64_ADDSUB_IMM(sf, Rd, Rn, imm12, ADD)
160 #define A64_SUB_I(sf, Rd, Rn, imm12) A64_ADDSUB_IMM(sf, Rd, Rn, imm12, SUB)
161 #define A64_ADDS_I(sf, Rd, Rn, imm12) \
162 A64_ADDSUB_IMM(sf, Rd, Rn, imm12, ADD_SETFLAGS)
163 #define A64_SUBS_I(sf, Rd, Rn, imm12) \
164 A64_ADDSUB_IMM(sf, Rd, Rn, imm12, SUB_SETFLAGS)
165 /* Rn + imm12; set condition flags */
166 #define A64_CMN_I(sf, Rn, imm12) A64_ADDS_I(sf, A64_ZR, Rn, imm12)
167 /* Rn - imm12; set condition flags */
168 #define A64_CMP_I(sf, Rn, imm12) A64_SUBS_I(sf, A64_ZR, Rn, imm12)