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Searched refs:ih2 (Results 1 - 21 of 21) sorted by relevance

/kernel/linux/linux-5.10/drivers/net/ethernet/cavium/liquidio/
H A Docteon_nic.h123 struct octeon_instr_ih2 *ih2; in octnet_prepare_pci_cmd_o2() local
130 ih2 = (struct octeon_instr_ih2 *)&cmd->cmd2.ih2; in octnet_prepare_pci_cmd_o2()
135 ih2->fsz = LIO_PCICMD_O2; in octnet_prepare_pci_cmd_o2()
137 ih2->tagtype = ORDERED_TAG; in octnet_prepare_pci_cmd_o2()
138 ih2->grp = DEFAULT_POW_GRP; in octnet_prepare_pci_cmd_o2()
143 ih2->tag = tag; in octnet_prepare_pci_cmd_o2()
145 ih2->tag = LIO_DATA(port); in octnet_prepare_pci_cmd_o2()
147 ih2->raw = 1; in octnet_prepare_pci_cmd_o2()
148 ih2 in octnet_prepare_pci_cmd_o2()
[all...]
H A Drequest_manager.c589 struct octeon_instr_ih2 *ih2; in octeon_prepare_soft_command() local
650 ih2 = (struct octeon_instr_ih2 *)&sc->cmd.cmd2.ih2; in octeon_prepare_soft_command()
651 ih2->tagtype = ATOMIC_TAG; in octeon_prepare_soft_command()
652 ih2->tag = LIO_CONTROL; in octeon_prepare_soft_command()
653 ih2->raw = 1; in octeon_prepare_soft_command()
654 ih2->grp = CFG_GET_CTRL_Q_GRP(oct_cfg); in octeon_prepare_soft_command()
657 ih2->dlengsz = sc->datasize; in octeon_prepare_soft_command()
658 ih2->rs = 1; in octeon_prepare_soft_command()
677 ih2 in octeon_prepare_soft_command()
690 struct octeon_instr_ih2 *ih2; octeon_send_soft_command() local
[all...]
H A Docteon_nic.c36 struct octeon_instr_ih2 *ih2; in octeon_alloc_soft_command_resp() local
59 ih2 = (struct octeon_instr_ih2 *)&sc->cmd.cmd2.ih2; in octeon_alloc_soft_command_resp()
63 ih2->fsz = LIO_SOFTCMDRESP_IH2; in octeon_alloc_soft_command_resp()
H A Docteon_iq.h212 u64 ih2; member
H A Dlio_main.c2286 (&sc->cmd.cmd2.ih2))->dlengsz; in send_nic_timestamp_pkt()
/kernel/linux/linux-6.6/drivers/net/ethernet/cavium/liquidio/
H A Docteon_nic.h123 struct octeon_instr_ih2 *ih2; in octnet_prepare_pci_cmd_o2() local
130 ih2 = (struct octeon_instr_ih2 *)&cmd->cmd2.ih2; in octnet_prepare_pci_cmd_o2()
135 ih2->fsz = LIO_PCICMD_O2; in octnet_prepare_pci_cmd_o2()
137 ih2->tagtype = ORDERED_TAG; in octnet_prepare_pci_cmd_o2()
138 ih2->grp = DEFAULT_POW_GRP; in octnet_prepare_pci_cmd_o2()
143 ih2->tag = tag; in octnet_prepare_pci_cmd_o2()
145 ih2->tag = LIO_DATA(port); in octnet_prepare_pci_cmd_o2()
147 ih2->raw = 1; in octnet_prepare_pci_cmd_o2()
148 ih2 in octnet_prepare_pci_cmd_o2()
[all...]
H A Drequest_manager.c586 struct octeon_instr_ih2 *ih2; in octeon_prepare_soft_command() local
647 ih2 = (struct octeon_instr_ih2 *)&sc->cmd.cmd2.ih2; in octeon_prepare_soft_command()
648 ih2->tagtype = ATOMIC_TAG; in octeon_prepare_soft_command()
649 ih2->tag = LIO_CONTROL; in octeon_prepare_soft_command()
650 ih2->raw = 1; in octeon_prepare_soft_command()
651 ih2->grp = CFG_GET_CTRL_Q_GRP(oct_cfg); in octeon_prepare_soft_command()
654 ih2->dlengsz = sc->datasize; in octeon_prepare_soft_command()
655 ih2->rs = 1; in octeon_prepare_soft_command()
674 ih2 in octeon_prepare_soft_command()
688 struct octeon_instr_ih2 *ih2; octeon_send_soft_command() local
[all...]
H A Docteon_nic.c36 struct octeon_instr_ih2 *ih2; in octeon_alloc_soft_command_resp() local
59 ih2 = (struct octeon_instr_ih2 *)&sc->cmd.cmd2.ih2; in octeon_alloc_soft_command_resp()
63 ih2->fsz = LIO_SOFTCMDRESP_IH2; in octeon_alloc_soft_command_resp()
H A Docteon_iq.h212 u64 ih2; member
H A Dlio_main.c2276 (&sc->cmd.cmd2.ih2))->dlengsz; in send_nic_timestamp_pkt()
/kernel/linux/linux-5.10/drivers/gpu/drm/amd/amdgpu/
H A Dvega10_ih.c79 if (adev->irq.ih2.ring_size) { in vega10_ih_enable_interrupts()
92 adev->irq.ih2.enabled = true; in vega10_ih_enable_interrupts()
144 if (adev->irq.ih2.ring_size) { in vega10_ih_disable_interrupts()
161 adev->irq.ih2.enabled = false; in vega10_ih_disable_interrupts()
162 adev->irq.ih2.rptr = 0; in vega10_ih_disable_interrupts()
306 ih = &adev->irq.ih2; in vega10_ih_irq_init()
391 else if (ih == &adev->irq.ih2) in vega10_ih_get_wptr()
416 else if (ih == &adev->irq.ih2) in vega10_ih_get_wptr()
489 else if (ih == &adev->irq.ih2) in vega10_ih_irq_rearm()
525 } else if (ih == &adev->irq.ih2) { in vega10_ih_set_rptr()
[all...]
H A Dnavi10_ih.c124 if (adev->irq.ih2.ring_size) { in navi10_ih_enable_interrupts()
137 adev->irq.ih2.enabled = true; in navi10_ih_enable_interrupts()
189 if (adev->irq.ih2.ring_size) { in navi10_ih_disable_interrupts()
205 adev->irq.ih2.enabled = false; in navi10_ih_disable_interrupts()
206 adev->irq.ih2.rptr = 0; in navi10_ih_disable_interrupts()
377 ih = &adev->irq.ih2; in navi10_ih_irq_init()
463 else if (ih == &adev->irq.ih2) in navi10_ih_get_wptr()
487 else if (ih == &adev->irq.ih2) in navi10_ih_get_wptr()
559 else if (ih == &adev->irq.ih2) in navi10_ih_irq_rearm()
595 } else if (ih == &adev->irq.ih2) { in navi10_ih_set_rptr()
[all...]
H A Damdgpu_irq.h91 struct amdgpu_ih_ring ih, ih1, ih2; member
H A Damdgpu_irq.c206 amdgpu_ih_process(adev, &adev->irq.ih2); in amdgpu_irq_handle_ih2()
/kernel/linux/linux-6.6/drivers/gpu/drm/amd/amdgpu/
H A Dvega10_ih.c75 if (adev->irq.ih2.ring_size) { in vega10_ih_init_register_offset()
76 ih_regs = &adev->irq.ih2.ih_regs; in vega10_ih_init_register_offset()
143 struct amdgpu_ih_ring *ih[] = {&adev->irq.ih, &adev->irq.ih1, &adev->irq.ih2}; in vega10_ih_toggle_interrupts()
263 struct amdgpu_ih_ring *ih[] = {&adev->irq.ih, &adev->irq.ih1, &adev->irq.ih2}; in vega10_ih_irq_init()
509 r = amdgpu_ih_ring_init(adev, &adev->irq.ih2, PAGE_SIZE, true); in vega10_ih_sw_init()
513 adev->irq.ih2.use_doorbell = true; in vega10_ih_sw_init()
514 adev->irq.ih2.doorbell_index = (adev->doorbell_index.ih + 2) << 1; in vega10_ih_sw_init()
H A Dvega20_ih.c83 if (adev->irq.ih2.ring_size) { in vega20_ih_init_register_offset()
84 ih_regs = &adev->irq.ih2.ih_regs; in vega20_ih_init_register_offset()
152 struct amdgpu_ih_ring *ih[] = {&adev->irq.ih, &adev->irq.ih1, &adev->irq.ih2}; in vega20_ih_toggle_interrupts()
282 struct amdgpu_ih_ring *ih[] = {&adev->irq.ih, &adev->irq.ih1, &adev->irq.ih2}; in vega20_ih_irq_init()
564 r = amdgpu_ih_ring_init(adev, &adev->irq.ih2, PAGE_SIZE, true); in vega20_ih_sw_init()
568 adev->irq.ih2.use_doorbell = true; in vega20_ih_sw_init()
569 adev->irq.ih2.doorbell_index = (adev->doorbell_index.ih + 2) << 1; in vega20_ih_sw_init()
H A Dnavi10_ih.c77 if (adev->irq.ih2.ring_size) { in navi10_ih_init_register_offset()
78 ih_regs = &adev->irq.ih2.ih_regs; in navi10_ih_init_register_offset()
198 struct amdgpu_ih_ring *ih[] = {&adev->irq.ih, &adev->irq.ih1, &adev->irq.ih2}; in navi10_ih_toggle_interrupts()
319 struct amdgpu_ih_ring *ih[] = {&adev->irq.ih, &adev->irq.ih1, &adev->irq.ih2}; in navi10_ih_irq_init()
582 adev->irq.ih2.ring_size = 0; in navi10_ih_sw_init()
H A Damdgpu_irq.h92 struct amdgpu_ih_ring ih, ih1, ih2, ih_soft; member
H A Damdgpu_irq.c206 amdgpu_ih_process(adev, &adev->irq.ih2); in amdgpu_irq_handle_ih2()
334 amdgpu_ih_ring_fini(adev, &adev->irq.ih2); in amdgpu_irq_fini_hw()
H A Dih_v6_0.c553 adev->irq.ih2.ring_size = 0; in ih_v6_0_sw_init()
H A Dih_v6_1.c554 adev->irq.ih2.ring_size = 0; in ih_v6_1_sw_init()

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