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Searched refs:ih1 (Results 1 - 13 of 13) sorted by relevance

/kernel/linux/linux-5.10/drivers/gpu/drm/amd/amdgpu/
H A Dvega10_ih.c63 if (adev->irq.ih1.ring_size) { in vega10_ih_enable_interrupts()
76 adev->irq.ih1.enabled = true; in vega10_ih_enable_interrupts()
124 if (adev->irq.ih1.ring_size) { in vega10_ih_disable_interrupts()
140 adev->irq.ih1.enabled = false; in vega10_ih_disable_interrupts()
141 adev->irq.ih1.rptr = 0; in vega10_ih_disable_interrupts()
276 ih = &adev->irq.ih1; in vega10_ih_irq_init()
389 else if (ih == &adev->irq.ih1) in vega10_ih_get_wptr()
414 else if (ih == &adev->irq.ih1) in vega10_ih_get_wptr()
487 else if (ih == &adev->irq.ih1) in vega10_ih_irq_rearm()
523 } else if (ih == &adev->irq.ih1) { in vega10_ih_set_rptr()
[all...]
H A Dnavi10_ih.c108 if (adev->irq.ih1.ring_size) { in navi10_ih_enable_interrupts()
121 adev->irq.ih1.enabled = true; in navi10_ih_enable_interrupts()
169 if (adev->irq.ih1.ring_size) { in navi10_ih_disable_interrupts()
185 adev->irq.ih1.enabled = false; in navi10_ih_disable_interrupts()
186 adev->irq.ih1.rptr = 0; in navi10_ih_disable_interrupts()
309 if (adev->irq.ih1.ring_size) in navi10_ih_irq_init()
348 ih = &adev->irq.ih1; in navi10_ih_irq_init()
461 else if (ih == &adev->irq.ih1) in navi10_ih_get_wptr()
485 else if (ih == &adev->irq.ih1) in navi10_ih_get_wptr()
557 else if (ih == &adev->irq.ih1) in navi10_ih_irq_rearm()
[all...]
H A Damdgpu_irq.h91 struct amdgpu_ih_ring ih, ih1, ih2; member
H A Damdgpu_irq.c191 amdgpu_ih_process(adev, &adev->irq.ih1); in amdgpu_irq_handle_ih1()
/kernel/linux/linux-6.6/drivers/gpu/drm/amd/amdgpu/
H A Dvega10_ih.c64 if (adev->irq.ih1.ring_size) { in vega10_ih_init_register_offset()
65 ih_regs = &adev->irq.ih1.ih_regs; in vega10_ih_init_register_offset()
143 struct amdgpu_ih_ring *ih[] = {&adev->irq.ih, &adev->irq.ih1, &adev->irq.ih2}; in vega10_ih_toggle_interrupts()
224 if (ih == &adev->irq.ih1) in vega10_ih_enable_ring()
263 struct amdgpu_ih_ring *ih[] = {&adev->irq.ih, &adev->irq.ih1, &adev->irq.ih2}; in vega10_ih_irq_init()
502 r = amdgpu_ih_ring_init(adev, &adev->irq.ih1, PAGE_SIZE, true); in vega10_ih_sw_init()
506 adev->irq.ih1.use_doorbell = true; in vega10_ih_sw_init()
507 adev->irq.ih1.doorbell_index = (adev->doorbell_index.ih + 1) << 1; in vega10_ih_sw_init()
H A Dvega20_ih.c72 if (adev->irq.ih1.ring_size) { in vega20_ih_init_register_offset()
73 ih_regs = &adev->irq.ih1.ih_regs; in vega20_ih_init_register_offset()
152 struct amdgpu_ih_ring *ih[] = {&adev->irq.ih, &adev->irq.ih1, &adev->irq.ih2}; in vega20_ih_toggle_interrupts()
233 if (ih == &adev->irq.ih1) in vega20_ih_enable_ring()
282 struct amdgpu_ih_ring *ih[] = {&adev->irq.ih, &adev->irq.ih1, &adev->irq.ih2}; in vega20_ih_irq_init()
556 r = amdgpu_ih_ring_init(adev, &adev->irq.ih1, PAGE_SIZE, use_bus_addr); in vega20_ih_sw_init()
560 adev->irq.ih1.use_doorbell = true; in vega20_ih_sw_init()
561 adev->irq.ih1.doorbell_index = (adev->doorbell_index.ih + 1) << 1; in vega20_ih_sw_init()
H A Dih_v6_0.c65 if (adev->irq.ih1.ring_size) { in ih_v6_0_init_register_offset()
66 ih_regs = &adev->irq.ih1.ih_regs; in ih_v6_0_init_register_offset()
172 struct amdgpu_ih_ring *ih[] = {&adev->irq.ih, &adev->irq.ih1}; in ih_v6_0_toggle_interrupts()
253 if (ih == &adev->irq.ih1) { in ih_v6_0_enable_ring()
295 struct amdgpu_ih_ring *ih[] = {&adev->irq.ih, &adev->irq.ih1}; in ih_v6_0_irq_init()
500 *adev->irq.ih1.wptr_cpu = wptr; in ih_v6_0_self_irq()
552 adev->irq.ih1.ring_size = 0; in ih_v6_0_sw_init()
H A Dih_v6_1.c65 if (adev->irq.ih1.ring_size) { in ih_v6_1_init_register_offset()
66 ih_regs = &adev->irq.ih1.ih_regs; in ih_v6_1_init_register_offset()
172 struct amdgpu_ih_ring *ih[] = {&adev->irq.ih, &adev->irq.ih1}; in ih_v6_1_toggle_interrupts()
253 if (ih == &adev->irq.ih1) { in ih_v6_1_enable_ring()
295 struct amdgpu_ih_ring *ih[] = {&adev->irq.ih, &adev->irq.ih1}; in ih_v6_1_irq_init()
501 *adev->irq.ih1.wptr_cpu = wptr; in ih_v6_1_self_irq()
553 adev->irq.ih1.ring_size = 0; in ih_v6_1_sw_init()
H A Dnavi10_ih.c66 if (adev->irq.ih1.ring_size) { in navi10_ih_init_register_offset()
67 ih_regs = &adev->irq.ih1.ih_regs; in navi10_ih_init_register_offset()
198 struct amdgpu_ih_ring *ih[] = {&adev->irq.ih, &adev->irq.ih1, &adev->irq.ih2}; in navi10_ih_toggle_interrupts()
279 if (ih == &adev->irq.ih1) in navi10_ih_enable_ring()
319 struct amdgpu_ih_ring *ih[] = {&adev->irq.ih, &adev->irq.ih1, &adev->irq.ih2}; in navi10_ih_irq_init()
581 adev->irq.ih1.ring_size = 0; in navi10_ih_sw_init()
H A Damdgpu_irq.h92 struct amdgpu_ih_ring ih, ih1, ih2, ih_soft; member
H A Damdgpu_irq.c191 amdgpu_ih_process(adev, &adev->irq.ih1); in amdgpu_irq_handle_ih1()
333 amdgpu_ih_ring_fini(adev, &adev->irq.ih1); in amdgpu_irq_fini_hw()
H A Damdgpu_gmc.c455 ih = adev->irq.retry_cam_enabled ? &adev->irq.ih_soft : &adev->irq.ih1; in amdgpu_gmc_filter_faults_remove()
/kernel/linux/linux-6.6/drivers/gpu/drm/amd/amdkfd/
H A Dkfd_svm.c2272 &pdd->dev->adev->irq.ih1); in svm_range_drain_retry_fault()

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