| /kernel/linux/linux-5.10/drivers/clocksource/ |
| H A D | timer-microchip-pit64b.c | 54 * @gclk: PIT64B's generic clock
60 struct clk *gclk; member
165 clk_disable_unprepare(timer->gclk); in mchp_pit64b_clkevt_suspend()
175 clk_prepare_enable(timer->gclk); in mchp_pit64b_clkevt_resume()
210 * PIT64B timer may be fed by gclk or pclk. When gclk is used its rate has to
211 * be at least 3 times lower that pclk's rate. pclk rate is fixed, gclk rate
212 * could be changed via clock APIs. The chosen clock (pclk or gclk) could be
227 * | |-->gclk -->|-->| | +---------+ +-----+ |
236 * - gclk rat
[all...] |
| /kernel/linux/linux-6.6/drivers/clocksource/ |
| H A D | timer-microchip-pit64b.c | 54 * @gclk: PIT64B's generic clock
60 struct clk *gclk; member
139 clk_disable_unprepare(timer->gclk); in mchp_pit64b_suspend()
147 clk_prepare_enable(timer->gclk); in mchp_pit64b_resume()
261 * PIT64B timer may be fed by gclk or pclk. When gclk is used its rate has to
262 * be at least 3 times lower that pclk's rate. pclk rate is fixed, gclk rate
263 * could be changed via clock APIs. The chosen clock (pclk or gclk) could be
278 * | |-->gclk -->|-->| | +---------+ +-----+ |
287 * - gclk rat
[all...] |
| /kernel/linux/linux-5.10/sound/soc/atmel/ |
| H A D | atmel-i2s.c | 200 struct clk *gclk; member
298 if (!dev->gclk) { in atmel_i2s_get_gck_param()
445 clk_disable_unprepare(dev->gclk); in atmel_i2s_switch_mck_generator()
455 ret = clk_set_rate(dev->gclk, gclk_rate); in atmel_i2s_switch_mck_generator()
459 ret = clk_prepare_enable(dev->gclk); in atmel_i2s_switch_mck_generator()
578 if (!dev->gclk) in atmel_i2s_sama5d2_mck_init()
592 return clk_set_parent(muxclk, dev->gclk); in atmel_i2s_sama5d2_mck_init()
664 dev->gclk = devm_clk_get(&pdev->dev, "gclk"); in atmel_i2s_probe()
665 if (IS_ERR(dev->gclk)) { in atmel_i2s_probe()
[all...] |
| H A D | atmel-classd.c | 31 struct clk *gclk; member
130 err = clk_prepare_enable(dd->gclk); in atmel_classd_cpu_dai_startup()
365 clk_disable_unprepare(dd->gclk); in atmel_classd_cpu_dai_hw_params()
367 ret = clk_set_rate(dd->gclk, sample_rates[best].gclk_rate); in atmel_classd_cpu_dai_hw_params()
377 return clk_prepare_enable(dd->gclk); in atmel_classd_cpu_dai_hw_params()
387 clk_disable_unprepare(dd->gclk); in atmel_classd_cpu_dai_shutdown()
553 dd->gclk = devm_clk_get(dev, "gclk"); in atmel_classd_probe()
554 if (IS_ERR(dd->gclk)) { in atmel_classd_probe()
555 ret = PTR_ERR(dd->gclk); in atmel_classd_probe()
[all...] |
| H A D | atmel-pdmic.c | 31 struct clk *gclk; member
111 ret = clk_prepare_enable(dd->gclk); in atmel_pdmic_cpu_dai_startup()
117 clk_disable_unprepare(dd->gclk); in atmel_pdmic_cpu_dai_startup()
141 clk_disable_unprepare(dd->gclk); in atmel_pdmic_cpu_dai_shutdown()
406 gclk_rate = clk_get_rate(dd->gclk); in atmel_pdmic_cpu_dai_hw_params()
531 u32 clk_min_rate = (u32)(clk_get_rate(dd->gclk) >> 8); in atmel_pdmic_get_sample_rate()
606 dd->gclk = devm_clk_get(dev, "gclk"); in atmel_pdmic_probe()
607 if (IS_ERR(dd->gclk)) { in atmel_pdmic_probe()
608 ret = PTR_ERR(dd->gclk); in atmel_pdmic_probe()
[all...] |
| H A D | mchp-i2s-mcc.c | 234 struct clk *gclk; member
425 ret = mchp_i2s_mcc_clk_get_rate_diff(dev->gclk, clk_rate, in mchp_i2s_mcc_config_divs()
429 dev_err(dev->dev, "gclk error for rate %lu: %d", in mchp_i2s_mcc_config_divs()
433 dev_dbg(dev->dev, "found perfect rate on gclk: %lu\n", in mchp_i2s_mcc_config_divs()
461 best_clk == dev->pclk ? "pclk" : "gclk", in mchp_i2s_mcc_config_divs()
469 if (best_clk == dev->gclk) in mchp_i2s_mcc_config_divs()
657 ret = clk_set_rate(dev->gclk, rate); in mchp_i2s_mcc_hw_params()
665 ret = clk_prepare(dev->gclk); in mchp_i2s_mcc_hw_params()
679 clk_unprepare(dev->gclk); in mchp_i2s_mcc_hw_params()
722 clk_disable(dev->gclk); in mchp_i2s_mcc_hw_free()
[all...] |
| H A D | mchp-spdifrx.c | 237 struct clk *gclk; member
410 clk_disable_unprepare(dev->gclk); in mchp_spdifrx_hw_params()
413 ret = clk_set_min_rate(dev->gclk, params_rate(params) * in mchp_spdifrx_hw_params()
417 "unable to set gclk min rate: rate %u * ratio %u + 1\n", in mchp_spdifrx_hw_params()
421 ret = clk_prepare_enable(dev->gclk); in mchp_spdifrx_hw_params()
423 dev_err(dev->dev, "unable to enable gclk: %d\n", ret); in mchp_spdifrx_hw_params()
446 clk_disable_unprepare(dev->gclk); in mchp_spdifrx_hw_free()
650 * The RSR.ULOCK has wrong value if both pclk and gclk are enabled in mchp_spdifrx_ulock_get()
680 * The RSR.ULOCK has wrong value if both pclk and gclk are enabled in mchp_spdifrx_badf_get()
716 ret = clk_prepare_enable(dev->gclk); in mchp_spdifrx_signal_get()
[all...] |
| H A D | mchp-spdiftx.c | 197 struct clk *gclk; member
491 clk_disable_unprepare(dev->gclk); in mchp_spdiftx_hw_params()
494 ret = clk_set_rate(dev->gclk, params_rate(params) * in mchp_spdiftx_hw_params()
498 "unable to change gclk rate to: rate %u * ratio %u\n", in mchp_spdiftx_hw_params()
502 ret = clk_prepare_enable(dev->gclk); in mchp_spdiftx_hw_params()
504 dev_err(dev->dev, "unable to enable gclk: %d\n", ret); in mchp_spdiftx_hw_params()
528 clk_disable_unprepare(dev->gclk); in mchp_spdiftx_hw_free()
811 dev->gclk = devm_clk_get(&pdev->dev, "gclk"); in mchp_spdiftx_probe()
812 if (IS_ERR(dev->gclk)) { in mchp_spdiftx_probe()
[all...] |
| /kernel/linux/linux-6.6/sound/soc/atmel/ |
| H A D | atmel-i2s.c | 200 struct clk *gclk; member
298 if (!dev->gclk) { in atmel_i2s_get_gck_param()
445 clk_disable_unprepare(dev->gclk); in atmel_i2s_switch_mck_generator()
455 ret = clk_set_rate(dev->gclk, gclk_rate); in atmel_i2s_switch_mck_generator()
459 ret = clk_prepare_enable(dev->gclk); in atmel_i2s_switch_mck_generator()
580 if (!dev->gclk) in atmel_i2s_sama5d2_mck_init()
594 return clk_set_parent(muxclk, dev->gclk); in atmel_i2s_sama5d2_mck_init()
665 dev->gclk = devm_clk_get(&pdev->dev, "gclk"); in atmel_i2s_probe()
666 if (IS_ERR(dev->gclk)) { in atmel_i2s_probe()
[all...] |
| H A D | atmel-pdmic.c | 31 struct clk *gclk; member
111 ret = clk_prepare_enable(dd->gclk); in atmel_pdmic_cpu_dai_startup()
117 clk_disable_unprepare(dd->gclk); in atmel_pdmic_cpu_dai_startup()
141 clk_disable_unprepare(dd->gclk); in atmel_pdmic_cpu_dai_shutdown()
406 gclk_rate = clk_get_rate(dd->gclk); in atmel_pdmic_cpu_dai_hw_params()
527 u32 clk_min_rate = (u32)(clk_get_rate(dd->gclk) >> 8); in atmel_pdmic_get_sample_rate()
602 dd->gclk = devm_clk_get(dev, "gclk"); in atmel_pdmic_probe()
603 if (IS_ERR(dd->gclk)) { in atmel_pdmic_probe()
604 ret = PTR_ERR(dd->gclk); in atmel_pdmic_probe()
[all...] |
| H A D | atmel-classd.c | 31 struct clk *gclk; member
130 err = clk_prepare_enable(dd->gclk); in atmel_classd_cpu_dai_startup()
365 clk_disable_unprepare(dd->gclk); in atmel_classd_cpu_dai_hw_params()
367 ret = clk_set_rate(dd->gclk, sample_rates[best].gclk_rate); in atmel_classd_cpu_dai_hw_params()
377 return clk_prepare_enable(dd->gclk); in atmel_classd_cpu_dai_hw_params()
387 clk_disable_unprepare(dd->gclk); in atmel_classd_cpu_dai_shutdown()
549 dd->gclk = devm_clk_get(dev, "gclk"); in atmel_classd_probe()
550 if (IS_ERR(dd->gclk)) { in atmel_classd_probe()
551 ret = PTR_ERR(dd->gclk); in atmel_classd_probe()
[all...] |
| H A D | mchp-spdiftx.c | 196 struct clk *gclk; member
486 clk_disable_unprepare(dev->gclk); in mchp_spdiftx_hw_params()
488 ret = clk_set_rate(dev->gclk, params_rate(params) * in mchp_spdiftx_hw_params()
492 "unable to change gclk rate to: rate %u * ratio %u\n", in mchp_spdiftx_hw_params()
496 ret = clk_prepare_enable(dev->gclk); in mchp_spdiftx_hw_params()
498 dev_err(dev->dev, "unable to enable gclk: %d\n", ret); in mchp_spdiftx_hw_params()
738 clk_disable_unprepare(spdiftx->gclk); in mchp_spdiftx_runtime_suspend()
755 ret = clk_prepare_enable(spdiftx->gclk); in mchp_spdiftx_runtime_resume()
767 clk_disable_unprepare(spdiftx->gclk); in mchp_spdiftx_runtime_resume()
826 dev->gclk in mchp_spdiftx_probe()
[all...] |
| H A D | mchp-i2s-mcc.c | 242 struct clk *gclk; member
447 ret = mchp_i2s_mcc_clk_get_rate_diff(dev->gclk, clk_rate, in mchp_i2s_mcc_config_divs()
451 dev_err(dev->dev, "gclk error for rate %lu: %d", in mchp_i2s_mcc_config_divs()
455 dev_dbg(dev->dev, "found perfect rate on gclk: %lu\n", in mchp_i2s_mcc_config_divs()
483 best_clk == dev->pclk ? "pclk" : "gclk", in mchp_i2s_mcc_config_divs()
491 if (best_clk == dev->gclk) in mchp_i2s_mcc_config_divs()
702 ret = clk_set_rate(dev->gclk, rate); in mchp_i2s_mcc_hw_params()
710 ret = clk_prepare(dev->gclk); in mchp_i2s_mcc_hw_params()
724 clk_unprepare(dev->gclk); in mchp_i2s_mcc_hw_params()
776 clk_disable(dev->gclk); in mchp_i2s_mcc_hw_free()
[all...] |
| H A D | mchp-spdifrx.c | 296 * @gclk: generic clock
306 struct clk *gclk; member
477 clk_disable_unprepare(dev->gclk); in mchp_spdifrx_hw_params()
479 ret = clk_set_min_rate(dev->gclk, params_rate(params) * in mchp_spdifrx_hw_params()
483 "unable to set gclk min rate: rate %u * ratio %u + 1\n", in mchp_spdifrx_hw_params()
486 clk_prepare_enable(dev->gclk); in mchp_spdifrx_hw_params()
489 ret = clk_prepare_enable(dev->gclk); in mchp_spdifrx_hw_params()
491 dev_err(dev->dev, "unable to enable gclk: %d\n", ret); in mchp_spdifrx_hw_params()
716 * The RSR.ULOCK has wrong value if both pclk and gclk are enabled in mchp_spdifrx_ulock_get()
754 * The RSR.ULOCK has wrong value if both pclk and gclk ar in mchp_spdifrx_badf_get()
[all...] |
| H A D | mchp-pdmc.c | 111 struct clk *gclk; member
579 round_rate = clk_round_rate(dd->gclk, in mchp_pdmc_hw_params()
596 clk_disable_unprepare(dd->gclk); in mchp_pdmc_hw_params()
599 ret = clk_set_rate(dd->gclk, gclk_rate); in mchp_pdmc_hw_params()
600 clk_prepare_enable(dd->gclk); in mchp_pdmc_hw_params()
982 clk_disable_unprepare(dd->gclk); in mchp_pdmc_runtime_suspend()
999 ret = clk_prepare_enable(dd->gclk); in mchp_pdmc_runtime_resume()
1011 clk_disable_unprepare(dd->gclk); in mchp_pdmc_runtime_resume()
1049 dd->gclk = devm_clk_get(dev, "gclk"); in mchp_pdmc_probe()
[all...] |
| /kernel/linux/linux-6.6/drivers/pwm/ |
| H A D | pwm-atmel-tcb.c | 56 struct clk *gclk; member
281 * If there is a gclk, the first divisor is actually the gclk selector in atmel_tcb_pwm_config()
283 if (tcbpwmc->gclk) in atmel_tcb_pwm_config()
433 tcbpwm->gclk = of_clk_get_by_name(np->parent, "gclk"); in atmel_tcb_pwm_probe()
434 if (IS_ERR(tcbpwm->gclk)) { in atmel_tcb_pwm_probe()
435 err = PTR_ERR(tcbpwm->gclk); in atmel_tcb_pwm_probe()
464 clk_put(tcbpwm->gclk); in atmel_tcb_pwm_probe()
482 clk_put(tcbpwm->gclk); in atmel_tcb_pwm_remove()
[all...] |
| /kernel/linux/linux-5.10/drivers/gpu/drm/nouveau/nvkm/subdev/clk/ |
| H A D | nv40.c | 149 int gclk = cstate->domain[nv_clk_src_core]; in nv40_clk_calc() local
155 ret = nv40_clk_calc_pll(clk, 0x004000, gclk, in nv40_clk_calc()
169 if (sclk && sclk != gclk) { in nv40_clk_calc()
|
| /kernel/linux/linux-6.6/drivers/gpu/drm/nouveau/nvkm/subdev/clk/ |
| H A D | nv40.c | 149 int gclk = cstate->domain[nv_clk_src_core]; in nv40_clk_calc() local
155 ret = nv40_clk_calc_pll(clk, 0x004000, gclk, in nv40_clk_calc()
169 if (sclk && sclk != gclk) { in nv40_clk_calc()
|
| /kernel/linux/linux-6.6/drivers/tty/serial/ |
| H A D | atmel_serial.c | 113 struct clk *gclk; /* uart generic clock */ member
2110 if (__clk_is_enabled(atmel_port->gclk)) in atmel_serial_pm()
2111 clk_disable_unprepare(atmel_port->gclk); in atmel_serial_pm()
2309 if (__clk_is_enabled(atmel_port->gclk)) in atmel_set_termios()
2310 clk_disable_unprepare(atmel_port->gclk); in atmel_set_termios()
2311 gclk_rate = clk_round_rate(atmel_port->gclk, 16 * baud); in atmel_set_termios()
2315 clk_set_rate(atmel_port->gclk, 16 * baud); in atmel_set_termios()
2316 ret = clk_prepare_enable(atmel_port->gclk); in atmel_set_termios()
2930 atmel_port->gclk = devm_clk_get_optional(&pdev->dev, "gclk"); in atmel_serial_probe()
[all...] |
| /kernel/linux/linux-5.10/drivers/w1/masters/ |
| H A D | ds1wm.c | 297 static int ds1wm_find_divisor(int gclk) in ds1wm_find_divisor() argument
302 if (gclk >= freq[i].freq) in ds1wm_find_divisor()
|