Lines Matching refs:gclk
54 * @gclk: PIT64B's generic clock
60 struct clk *gclk;
165 clk_disable_unprepare(timer->gclk);
175 clk_prepare_enable(timer->gclk);
210 * PIT64B timer may be fed by gclk or pclk. When gclk is used its rate has to
211 * be at least 3 times lower that pclk's rate. pclk rate is fixed, gclk rate
212 * could be changed via clock APIs. The chosen clock (pclk or gclk) could be
227 * | |-->gclk -->|-->| | +---------+ +-----+ |
236 * - gclk rate <= pclk rate/3
237 * - gclk rate could be requested from PMC
254 gclk_round = clk_round_rate(timer->gclk, max_rate);
267 clk_set_rate(timer->gclk, gclk_round);
282 clk_set_rate(timer->gclk, gclk_round);
289 timer->mode & MCHP_PIT64B_MR_SGCLK ? "gclk" : "pclk", best_pres,
336 ce->timer.gclk = timer->gclk;
376 timer.gclk = of_clk_get_by_name(node, "gclk");
377 if (IS_ERR(timer.gclk))
378 return PTR_ERR(timer.gclk);
402 ret = clk_prepare_enable(timer.gclk);
406 clk_rate = clk_get_rate(timer.gclk);
424 clk_disable_unprepare(timer.gclk);