Searched refs:eth_parents (Results 1 - 10 of 10) sorted by relevance
| /kernel/linux/linux-5.10/drivers/clk/ |
| H A D | clk-oxnas.c | 85 static const char *const eth_parents[] = { variable
107 static OXNAS_GATE(ox810se_etha, 7, eth_parents);
130 static OXNAS_GATE(ox820_etha, 7, eth_parents);
133 static OXNAS_GATE(ox820_ethb, 10, eth_parents);
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| /kernel/linux/linux-6.6/drivers/clk/mediatek/ |
| H A D | clk-mt7622.c | 57 static const char * const eth_parents[] = { variable
392 MUX_GATE(CLK_TOP_ETH_SEL, "eth_sel", eth_parents,
438 MUX_GATE(CLK_TOP_HIF_SEL, "hif_sel", eth_parents,
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| H A D | clk-mt7629.c | 86 static const char * const eth_parents[] = { variable
468 MUX_GATE(CLK_TOP_ETH_SEL, "eth_sel", eth_parents,
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| H A D | clk-mt8516.c | 266 static const char * const eth_parents[] __initconst = {
393 MUX(CLK_TOP_ETH_SEL, "eth_sel", eth_parents,
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| H A D | clk-mt8167.c | 387 static const char * const eth_parents[] = { variable
572 MUX(CLK_TOP_ETH_SEL, "eth_sel", eth_parents,
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| H A D | clk-mt8365.c | 347 static const char * const eth_parents[] = { variable
514 MUX_GATE_CLR_SET_UPD(CLK_TOP_ETH_SEL, "eth_sel", eth_parents, 0x0d0,
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| /kernel/linux/linux-5.10/drivers/clk/mediatek/ |
| H A D | clk-mt7622.c | 135 static const char * const eth_parents[] = { variable
521 MUX_GATE(CLK_TOP_ETH_SEL, "eth_sel", eth_parents,
567 MUX_GATE(CLK_TOP_HIF_SEL, "hif_sel", eth_parents,
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| H A D | clk-mt8516.c | 264 static const char * const eth_parents[] __initconst = {
391 MUX(CLK_TOP_ETH_SEL, "eth_sel", eth_parents,
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| H A D | clk-mt7629.c | 111 static const char * const eth_parents[] = { variable
493 MUX_GATE(CLK_TOP_ETH_SEL, "eth_sel", eth_parents,
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| H A D | clk-mt8167.c | 386 static const char * const eth_parents[] __initconst = {
571 MUX(CLK_TOP_ETH_SEL, "eth_sel", eth_parents,
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Completed in 9 milliseconds