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Searched refs:component_reg_phys (Results 1 - 10 of 10) sorted by relevance

/kernel/linux/linux-6.6/drivers/cxl/core/
H A Dport.c631 resource_size_t component_reg_phys, in cxl_port_alloc()
682 port->component_reg_phys = component_reg_phys; in cxl_port_alloc()
704 resource_size_t component_reg_phys) in cxl_setup_comp_regs()
706 if (component_reg_phys == CXL_RESOURCE_NONE) in cxl_setup_comp_regs()
712 .resource = component_reg_phys, in cxl_setup_comp_regs()
720 resource_size_t component_reg_phys) in cxl_port_setup_regs()
725 component_reg_phys); in cxl_port_setup_regs()
729 resource_size_t component_reg_phys) in cxl_dport_setup_regs()
742 component_reg_phys); in cxl_dport_setup_regs()
630 cxl_port_alloc(struct device *uport_dev, resource_size_t component_reg_phys, struct cxl_dport *parent_dport) cxl_port_alloc() argument
703 cxl_setup_comp_regs(struct device *host, struct cxl_register_map *map, resource_size_t component_reg_phys) cxl_setup_comp_regs() argument
719 cxl_port_setup_regs(struct cxl_port *port, resource_size_t component_reg_phys) cxl_port_setup_regs() argument
728 cxl_dport_setup_regs(struct device *host, struct cxl_dport *dport, resource_size_t component_reg_phys) cxl_dport_setup_regs() argument
747 __devm_cxl_add_port(struct device *host, struct device *uport_dev, resource_size_t component_reg_phys, struct cxl_dport *parent_dport) __devm_cxl_add_port() argument
804 devm_cxl_add_port(struct device *host, struct device *uport_dev, resource_size_t component_reg_phys, struct cxl_dport *parent_dport) devm_cxl_add_port() argument
977 __devm_cxl_add_dport(struct cxl_port *port, struct device *dport_dev, int port_id, resource_size_t component_reg_phys, resource_size_t rcrb) __devm_cxl_add_dport() argument
1071 devm_cxl_add_dport(struct cxl_port *port, struct device *dport_dev, int port_id, resource_size_t component_reg_phys) devm_cxl_add_dport() argument
1413 resource_size_t component_reg_phys; add_port_attach_ep() local
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H A Dregs.c476 resource_size_t component_reg_phys; in __rcrb_to_component() local
523 component_reg_phys = bar0 & PCI_BASE_ADDRESS_MEM_MASK; in __rcrb_to_component()
525 component_reg_phys |= ((u64)bar1) << 32; in __rcrb_to_component()
527 if (!component_reg_phys) in __rcrb_to_component()
531 if (!IS_ALIGNED(component_reg_phys, CXL_COMPONENT_REG_BLOCK_SIZE)) in __rcrb_to_component()
534 return component_reg_phys; in __rcrb_to_component()
H A Dhdm.c89 .resource = port->component_reg_phys, in map_hdm_decoder_regs()
167 crb = ioremap(port->component_reg_phys, CXL_COMPONENT_REG_BLOCK_SIZE); in devm_cxl_setup_hdm()
/kernel/linux/linux-6.6/tools/testing/cxl/test/
H A Dmock.c275 resource_size_t component_reg_phys; in __wrap_cxl_rcd_component_reg_phys() local
279 component_reg_phys = CXL_RESOURCE_NONE; in __wrap_cxl_rcd_component_reg_phys()
281 component_reg_phys = cxl_rcd_component_reg_phys(dev, dport); in __wrap_cxl_rcd_component_reg_phys()
284 return component_reg_phys; in __wrap_cxl_rcd_component_reg_phys()
H A Dmem.c1426 cxlds->component_reg_phys = CXL_RESOURCE_NONE; in cxl_mock_mem_probe()
/kernel/linux/linux-6.6/drivers/cxl/
H A Dacpi.c467 resource_size_t component_reg_phys; in add_host_bridge_uport() local
496 component_reg_phys = ctx.base; in add_host_bridge_uport()
497 if (component_reg_phys != CXL_RESOURCE_NONE) in add_host_bridge_uport()
499 ctx.uid, &component_reg_phys); in add_host_bridge_uport()
505 port = devm_cxl_add_port(host, bridge, component_reg_phys, dport); in add_host_bridge_uport()
H A Dpci.c474 resource_size_t component_reg_phys; in cxl_rcrb_get_comp_regs() local
485 component_reg_phys = cxl_rcd_component_reg_phys(&pdev->dev, dport); in cxl_rcrb_get_comp_regs()
489 if (component_reg_phys == CXL_RESOURCE_NONE) in cxl_rcrb_get_comp_regs()
492 map->resource = component_reg_phys; in cxl_rcrb_get_comp_regs()
827 cxlds->component_reg_phys = CXL_RESOURCE_NONE; in cxl_pci_probe()
834 cxlds->component_reg_phys = map.resource; in cxl_pci_probe()
H A Dcxl.h577 * @component_reg_phys: component register capability base address (optional)
597 resource_size_t component_reg_phys; member
689 resource_size_t component_reg_phys,
703 resource_size_t component_reg_phys);
H A Dmem.c69 cxlds->component_reg_phys, in devm_cxl_add_endpoint()
H A Dcxlmem.h410 * @component_reg_phys: register base of component registers
424 resource_size_t component_reg_phys; member

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