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Searched refs:cfg (Results 1 - 25 of 3147) sorted by relevance

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/kernel/linux/linux-6.6/drivers/phy/
H A Dphy-core-mipi-dphy.c24 struct phy_configure_opts_mipi_dphy *cfg) in phy_mipi_dphy_calc_config()
28 if (!cfg) in phy_mipi_dphy_calc_config()
39 cfg->clk_miss = 0; in phy_mipi_dphy_calc_config()
40 cfg->clk_post = 60000 + 52 * ui; in phy_mipi_dphy_calc_config()
41 cfg->clk_pre = 8; in phy_mipi_dphy_calc_config()
42 cfg->clk_prepare = 38000; in phy_mipi_dphy_calc_config()
43 cfg->clk_settle = 95000; in phy_mipi_dphy_calc_config()
44 cfg->clk_term_en = 0; in phy_mipi_dphy_calc_config()
45 cfg->clk_trail = 60000; in phy_mipi_dphy_calc_config()
46 cfg in phy_mipi_dphy_calc_config()
20 phy_mipi_dphy_calc_config(unsigned long pixel_clock, unsigned int bpp, unsigned int lanes, unsigned long long hs_clk_rate, struct phy_configure_opts_mipi_dphy *cfg) phy_mipi_dphy_calc_config() argument
81 phy_mipi_dphy_get_default_config(unsigned long pixel_clock, unsigned int bpp, unsigned int lanes, struct phy_configure_opts_mipi_dphy *cfg) phy_mipi_dphy_get_default_config() argument
91 phy_mipi_dphy_get_default_config_for_hsclk(unsigned long long hs_clk_rate, unsigned int lanes, struct phy_configure_opts_mipi_dphy *cfg) phy_mipi_dphy_get_default_config_for_hsclk() argument
107 phy_mipi_dphy_config_validate(struct phy_configure_opts_mipi_dphy *cfg) phy_mipi_dphy_config_validate() argument
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/kernel/linux/linux-5.10/drivers/phy/
H A Dphy-core-mipi-dphy.c25 struct phy_configure_opts_mipi_dphy *cfg) in phy_mipi_dphy_get_default_config()
30 if (!cfg) in phy_mipi_dphy_get_default_config()
39 cfg->clk_miss = 0; in phy_mipi_dphy_get_default_config()
40 cfg->clk_post = 60000 + 52 * ui; in phy_mipi_dphy_get_default_config()
41 cfg->clk_pre = 8000; in phy_mipi_dphy_get_default_config()
42 cfg->clk_prepare = 38000; in phy_mipi_dphy_get_default_config()
43 cfg->clk_settle = 95000; in phy_mipi_dphy_get_default_config()
44 cfg->clk_term_en = 0; in phy_mipi_dphy_get_default_config()
45 cfg->clk_trail = 60000; in phy_mipi_dphy_get_default_config()
46 cfg in phy_mipi_dphy_get_default_config()
22 phy_mipi_dphy_get_default_config(unsigned long pixel_clock, unsigned int bpp, unsigned int lanes, struct phy_configure_opts_mipi_dphy *cfg) phy_mipi_dphy_get_default_config() argument
86 phy_mipi_dphy_config_validate(struct phy_configure_opts_mipi_dphy *cfg) phy_mipi_dphy_config_validate() argument
[all...]
/kernel/linux/linux-5.10/drivers/media/platform/exynos-gsc/
H A Dgsc-regs.c22 u32 cfg; in gsc_wait_reset() local
25 cfg = readl(dev->regs + GSC_SW_RESET); in gsc_wait_reset()
26 if (!cfg) in gsc_wait_reset()
36 u32 cfg; in gsc_hw_set_frm_done_irq_mask() local
38 cfg = readl(dev->regs + GSC_IRQ); in gsc_hw_set_frm_done_irq_mask()
40 cfg |= GSC_IRQ_FRMDONE_MASK; in gsc_hw_set_frm_done_irq_mask()
42 cfg &= ~GSC_IRQ_FRMDONE_MASK; in gsc_hw_set_frm_done_irq_mask()
43 writel(cfg, dev->regs + GSC_IRQ); in gsc_hw_set_frm_done_irq_mask()
48 u32 cfg; in gsc_hw_set_gsc_irq_enable() local
50 cfg in gsc_hw_set_gsc_irq_enable()
61 u32 cfg = readl(dev->regs + GSC_IN_BASE_ADDR_Y_MASK); gsc_hw_set_input_buf_masking() local
75 u32 cfg = readl(dev->regs + GSC_OUT_BASE_ADDR_Y_MASK); gsc_hw_set_output_buf_masking() local
111 u32 cfg = readl(dev->regs + GSC_IN_CON); gsc_hw_set_input_path() local
124 u32 cfg; gsc_hw_set_in_size() local
146 u32 cfg; gsc_hw_set_in_image_rgb() local
167 u32 cfg; gsc_hw_set_in_image_format() local
222 u32 cfg = readl(dev->regs + GSC_OUT_CON); gsc_hw_set_output_path() local
237 u32 cfg; gsc_hw_set_out_size() local
266 u32 cfg; gsc_hw_set_out_image_rgb() local
287 u32 cfg; gsc_hw_set_out_image_format() local
346 u32 cfg; gsc_hw_set_prescaler() local
358 u32 cfg; gsc_hw_set_mainscaler() local
370 u32 cfg; gsc_hw_set_rotation() local
404 u32 cfg; gsc_hw_set_global_alpha() local
421 u32 cfg; gsc_hw_set_sfr_update() local
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/kernel/linux/linux-6.6/drivers/media/platform/samsung/exynos-gsc/
H A Dgsc-regs.c22 u32 cfg; in gsc_wait_reset() local
25 cfg = readl(dev->regs + GSC_SW_RESET); in gsc_wait_reset()
26 if (!cfg) in gsc_wait_reset()
36 u32 cfg; in gsc_hw_set_frm_done_irq_mask() local
38 cfg = readl(dev->regs + GSC_IRQ); in gsc_hw_set_frm_done_irq_mask()
40 cfg |= GSC_IRQ_FRMDONE_MASK; in gsc_hw_set_frm_done_irq_mask()
42 cfg &= ~GSC_IRQ_FRMDONE_MASK; in gsc_hw_set_frm_done_irq_mask()
43 writel(cfg, dev->regs + GSC_IRQ); in gsc_hw_set_frm_done_irq_mask()
48 u32 cfg; in gsc_hw_set_gsc_irq_enable() local
50 cfg in gsc_hw_set_gsc_irq_enable()
61 u32 cfg = readl(dev->regs + GSC_IN_BASE_ADDR_Y_MASK); gsc_hw_set_input_buf_masking() local
75 u32 cfg = readl(dev->regs + GSC_OUT_BASE_ADDR_Y_MASK); gsc_hw_set_output_buf_masking() local
111 u32 cfg = readl(dev->regs + GSC_IN_CON); gsc_hw_set_input_path() local
124 u32 cfg; gsc_hw_set_in_size() local
146 u32 cfg; gsc_hw_set_in_image_rgb() local
167 u32 cfg; gsc_hw_set_in_image_format() local
222 u32 cfg = readl(dev->regs + GSC_OUT_CON); gsc_hw_set_output_path() local
237 u32 cfg; gsc_hw_set_out_size() local
266 u32 cfg; gsc_hw_set_out_image_rgb() local
287 u32 cfg; gsc_hw_set_out_image_format() local
346 u32 cfg; gsc_hw_set_prescaler() local
358 u32 cfg; gsc_hw_set_mainscaler() local
370 u32 cfg; gsc_hw_set_rotation() local
404 u32 cfg; gsc_hw_set_global_alpha() local
421 u32 cfg; gsc_hw_set_sfr_update() local
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/kernel/linux/linux-6.6/drivers/net/ethernet/marvell/octeon_ep/
H A Doctep_config.h53 #define CFG_GET_IQ_CFG(cfg) ((cfg)->iq)
54 #define CFG_GET_IQ_NUM_DESC(cfg) ((cfg)->iq.num_descs)
55 #define CFG_GET_IQ_INSTR_TYPE(cfg) ((cfg)->iq.instr_type)
56 #define CFG_GET_IQ_PKIND(cfg) ((cfg)->iq.pkind)
57 #define CFG_GET_IQ_INSTR_SIZE(cfg) (64)
58 #define CFG_GET_IQ_DB_MIN(cfg) ((cf
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/kernel/linux/linux-5.10/drivers/net/ethernet/cavium/liquidio/
H A Docteon_config.h121 #define CFG_GET_IQ_CFG(cfg) ((cfg)->iq)
122 #define CFG_GET_IQ_MAX_Q(cfg) ((cfg)->iq.max_iqs)
123 #define CFG_GET_IQ_PENDING_LIST_SIZE(cfg) ((cfg)->iq.pending_list_size)
124 #define CFG_GET_IQ_INSTR_TYPE(cfg) ((cfg)->iq.instr_type)
125 #define CFG_GET_IQ_DB_MIN(cfg) ((cfg)
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/kernel/linux/linux-6.6/drivers/net/ethernet/cavium/liquidio/
H A Docteon_config.h121 #define CFG_GET_IQ_CFG(cfg) ((cfg)->iq)
122 #define CFG_GET_IQ_MAX_Q(cfg) ((cfg)->iq.max_iqs)
123 #define CFG_GET_IQ_PENDING_LIST_SIZE(cfg) ((cfg)->iq.pending_list_size)
124 #define CFG_GET_IQ_INSTR_TYPE(cfg) ((cfg)->iq.instr_type)
125 #define CFG_GET_IQ_DB_MIN(cfg) ((cfg)
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/kernel/linux/linux-5.10/drivers/media/platform/exynos4-is/
H A Dfimc-lite-reg.c23 u32 cfg; in flite_hw_reset() local
25 cfg = readl(dev->regs + FLITE_REG_CIGCTRL); in flite_hw_reset()
26 cfg |= FLITE_REG_CIGCTRL_SWRST_REQ; in flite_hw_reset()
27 writel(cfg, dev->regs + FLITE_REG_CIGCTRL); in flite_hw_reset()
30 cfg = readl(dev->regs + FLITE_REG_CIGCTRL); in flite_hw_reset()
31 if (cfg & FLITE_REG_CIGCTRL_SWRST_RDY) in flite_hw_reset()
36 cfg |= FLITE_REG_CIGCTRL_SWRST; in flite_hw_reset()
37 writel(cfg, dev->regs + FLITE_REG_CIGCTRL); in flite_hw_reset()
42 u32 cfg = readl(dev->regs + FLITE_REG_CISTATUS); in flite_hw_clear_pending_irq() local
43 cfg in flite_hw_clear_pending_irq()
56 u32 cfg = readl(dev->regs + FLITE_REG_CISTATUS2); flite_hw_clear_last_capture_end() local
63 u32 cfg, intsrc; flite_hw_set_interrupt_mask() local
85 u32 cfg = readl(dev->regs + FLITE_REG_CIIMGCPT); flite_hw_capture_start() local
92 u32 cfg = readl(dev->regs + FLITE_REG_CIIMGCPT); flite_hw_capture_stop() local
103 u32 cfg = readl(dev->regs + FLITE_REG_CIGCTRL); flite_hw_set_test_pattern() local
131 u32 cfg; flite_hw_set_source_format() local
161 u32 cfg; flite_hw_set_window_offset() local
179 u32 cfg = readl(dev->regs + FLITE_REG_CIGENERAL); flite_hw_set_camera_port() local
191 u32 cfg = readl(dev->regs + FLITE_REG_CIGCTRL); flite_hw_set_camera_bus() local
219 u32 cfg = readl(dev->regs + FLITE_REG_CIODMAFMT); flite_hw_set_pack12() local
237 u32 cfg = readl(dev->regs + FLITE_REG_CIODMAFMT); flite_hw_set_out_order() local
249 u32 cfg; flite_hw_set_dma_window() local
267 u32 cfg; flite_hw_set_dma_buffer() local
286 u32 cfg; flite_hw_mask_dma_buffer() local
300 u32 cfg = readl(dev->regs + FLITE_REG_CIGCTRL); flite_hw_set_output_dma() local
342 u32 cfg = readl(dev->regs + registers[i].offset); flite_hw_dump_regs() local
[all...]
H A Dfimc-reg.c21 u32 cfg; in fimc_hw_reset() local
23 cfg = readl(dev->regs + FIMC_REG_CISRCFMT); in fimc_hw_reset()
24 cfg |= FIMC_REG_CISRCFMT_ITU601_8BIT; in fimc_hw_reset()
25 writel(cfg, dev->regs + FIMC_REG_CISRCFMT); in fimc_hw_reset()
28 cfg = readl(dev->regs + FIMC_REG_CIGCTRL); in fimc_hw_reset()
29 cfg |= (FIMC_REG_CIGCTRL_SWRST | FIMC_REG_CIGCTRL_IRQ_LEVEL); in fimc_hw_reset()
30 writel(cfg, dev->regs + FIMC_REG_CIGCTRL); in fimc_hw_reset()
33 cfg = readl(dev->regs + FIMC_REG_CIGCTRL); in fimc_hw_reset()
34 cfg &= ~FIMC_REG_CIGCTRL_SWRST; in fimc_hw_reset()
35 writel(cfg, de in fimc_hw_reset()
73 u32 cfg, flip; fimc_hw_set_rotation() local
106 u32 cfg; fimc_hw_set_target_format() local
151 u32 cfg; fimc_hw_set_out_dma_size() local
172 u32 cfg; fimc_hw_set_out_dma() local
213 u32 cfg = readl(dev->regs + FIMC_REG_ORGISIZE); fimc_hw_en_autoload() local
223 u32 cfg = readl(dev->regs + FIMC_REG_CIOCTRL); fimc_hw_en_lastirq() local
235 u32 cfg, shfactor; fimc_hw_set_prescaler() local
254 u32 cfg = readl(dev->regs + FIMC_REG_CISCCTRL); fimc_hw_set_scaler() local
316 u32 cfg; fimc_hw_set_mainscaler() local
349 u32 cfg; fimc_hw_enable_capture() local
365 u32 cfg = readl(dev->regs + FIMC_REG_CIIMGCPT); fimc_hw_disable_capture() local
375 u32 cfg = 0; fimc_hw_set_effect() local
392 u32 cfg; fimc_hw_set_rgb_alpha() local
425 u32 cfg; fimc_hw_set_in_dma() local
507 u32 cfg = readl(dev->regs + FIMC_REG_MSCTRL); fimc_hw_set_input_path() local
522 u32 cfg = readl(dev->regs + FIMC_REG_CISCCTRL); fimc_hw_set_output_path() local
531 u32 cfg = readl(dev->regs + FIMC_REG_CIREAL_ISIZE); fimc_hw_set_input_addr() local
559 u32 cfg = readl(fimc->regs + FIMC_REG_CIGCTRL); fimc_hw_set_camera_polarity() local
603 u32 bus_width, cfg = 0; fimc_hw_set_camera_source() local
655 u32 cfg = readl(fimc->regs + FIMC_REG_CIWDOFST); fimc_hw_set_camera_offset() local
675 u32 cfg, tmp; fimc_hw_set_camera_type() local
740 u32 cfg = readl(dev->regs + FIMC_REG_CIGCTRL); fimc_hw_clear_irq() local
747 u32 cfg = readl(dev->regs + FIMC_REG_CISCCTRL); fimc_hw_enable_scaler() local
757 u32 cfg = readl(dev->regs + FIMC_REG_MSCTRL); fimc_hw_activate_input_dma() local
[all...]
/kernel/linux/linux-6.6/drivers/media/platform/samsung/exynos4-is/
H A Dfimc-lite-reg.c23 u32 cfg; in flite_hw_reset() local
25 cfg = readl(dev->regs + FLITE_REG_CIGCTRL); in flite_hw_reset()
26 cfg |= FLITE_REG_CIGCTRL_SWRST_REQ; in flite_hw_reset()
27 writel(cfg, dev->regs + FLITE_REG_CIGCTRL); in flite_hw_reset()
30 cfg = readl(dev->regs + FLITE_REG_CIGCTRL); in flite_hw_reset()
31 if (cfg & FLITE_REG_CIGCTRL_SWRST_RDY) in flite_hw_reset()
36 cfg |= FLITE_REG_CIGCTRL_SWRST; in flite_hw_reset()
37 writel(cfg, dev->regs + FLITE_REG_CIGCTRL); in flite_hw_reset()
42 u32 cfg = readl(dev->regs + FLITE_REG_CISTATUS); in flite_hw_clear_pending_irq() local
43 cfg in flite_hw_clear_pending_irq()
56 u32 cfg = readl(dev->regs + FLITE_REG_CISTATUS2); flite_hw_clear_last_capture_end() local
63 u32 cfg, intsrc; flite_hw_set_interrupt_mask() local
85 u32 cfg = readl(dev->regs + FLITE_REG_CIIMGCPT); flite_hw_capture_start() local
92 u32 cfg = readl(dev->regs + FLITE_REG_CIIMGCPT); flite_hw_capture_stop() local
103 u32 cfg = readl(dev->regs + FLITE_REG_CIGCTRL); flite_hw_set_test_pattern() local
131 u32 cfg; flite_hw_set_source_format() local
161 u32 cfg; flite_hw_set_window_offset() local
179 u32 cfg = readl(dev->regs + FLITE_REG_CIGENERAL); flite_hw_set_camera_port() local
191 u32 cfg = readl(dev->regs + FLITE_REG_CIGCTRL); flite_hw_set_camera_bus() local
219 u32 cfg = readl(dev->regs + FLITE_REG_CIODMAFMT); flite_hw_set_pack12() local
237 u32 cfg = readl(dev->regs + FLITE_REG_CIODMAFMT); flite_hw_set_out_order() local
249 u32 cfg; flite_hw_set_dma_window() local
267 u32 cfg; flite_hw_set_dma_buffer() local
286 u32 cfg; flite_hw_mask_dma_buffer() local
300 u32 cfg = readl(dev->regs + FLITE_REG_CIGCTRL); flite_hw_set_output_dma() local
342 u32 cfg = readl(dev->regs + registers[i].offset); flite_hw_dump_regs() local
[all...]
H A Dfimc-reg.c21 u32 cfg; in fimc_hw_reset() local
23 cfg = readl(dev->regs + FIMC_REG_CISRCFMT); in fimc_hw_reset()
24 cfg |= FIMC_REG_CISRCFMT_ITU601_8BIT; in fimc_hw_reset()
25 writel(cfg, dev->regs + FIMC_REG_CISRCFMT); in fimc_hw_reset()
28 cfg = readl(dev->regs + FIMC_REG_CIGCTRL); in fimc_hw_reset()
29 cfg |= (FIMC_REG_CIGCTRL_SWRST | FIMC_REG_CIGCTRL_IRQ_LEVEL); in fimc_hw_reset()
30 writel(cfg, dev->regs + FIMC_REG_CIGCTRL); in fimc_hw_reset()
33 cfg = readl(dev->regs + FIMC_REG_CIGCTRL); in fimc_hw_reset()
34 cfg &= ~FIMC_REG_CIGCTRL_SWRST; in fimc_hw_reset()
35 writel(cfg, de in fimc_hw_reset()
73 u32 cfg, flip; fimc_hw_set_rotation() local
106 u32 cfg; fimc_hw_set_target_format() local
151 u32 cfg; fimc_hw_set_out_dma_size() local
172 u32 cfg; fimc_hw_set_out_dma() local
213 u32 cfg = readl(dev->regs + FIMC_REG_ORGISIZE); fimc_hw_en_autoload() local
223 u32 cfg = readl(dev->regs + FIMC_REG_CIOCTRL); fimc_hw_en_lastirq() local
235 u32 cfg, shfactor; fimc_hw_set_prescaler() local
254 u32 cfg = readl(dev->regs + FIMC_REG_CISCCTRL); fimc_hw_set_scaler() local
316 u32 cfg; fimc_hw_set_mainscaler() local
349 u32 cfg; fimc_hw_enable_capture() local
365 u32 cfg = readl(dev->regs + FIMC_REG_CIIMGCPT); fimc_hw_disable_capture() local
375 u32 cfg = 0; fimc_hw_set_effect() local
392 u32 cfg; fimc_hw_set_rgb_alpha() local
425 u32 cfg; fimc_hw_set_in_dma() local
507 u32 cfg = readl(dev->regs + FIMC_REG_MSCTRL); fimc_hw_set_input_path() local
522 u32 cfg = readl(dev->regs + FIMC_REG_CISCCTRL); fimc_hw_set_output_path() local
531 u32 cfg = readl(dev->regs + FIMC_REG_CIREAL_ISIZE); fimc_hw_set_input_addr() local
559 u32 cfg = readl(fimc->regs + FIMC_REG_CIGCTRL); fimc_hw_set_camera_polarity() local
603 u32 bus_width, cfg = 0; fimc_hw_set_camera_source() local
655 u32 cfg = readl(fimc->regs + FIMC_REG_CIWDOFST); fimc_hw_set_camera_offset() local
675 u32 cfg, tmp; fimc_hw_set_camera_type() local
740 u32 cfg = readl(dev->regs + FIMC_REG_CIGCTRL); fimc_hw_clear_irq() local
747 u32 cfg = readl(dev->regs + FIMC_REG_CISCCTRL); fimc_hw_enable_scaler() local
757 u32 cfg = readl(dev->regs + FIMC_REG_MSCTRL); fimc_hw_activate_input_dma() local
[all...]
/kernel/linux/linux-5.10/drivers/media/platform/s3c-camif/
H A Dcamif-regs.c18 u32 cfg; in camif_hw_reset() local
20 cfg = camif_read(camif, S3C_CAMIF_REG_CISRCFMT); in camif_hw_reset()
21 cfg |= CISRCFMT_ITU601_8BIT; in camif_hw_reset()
22 camif_write(camif, S3C_CAMIF_REG_CISRCFMT, cfg); in camif_hw_reset()
25 cfg = camif_read(camif, S3C_CAMIF_REG_CIGCTRL); in camif_hw_reset()
26 cfg |= CIGCTRL_SWRST; in camif_hw_reset()
28 cfg |= CIGCTRL_IRQ_LEVEL; in camif_hw_reset()
29 camif_write(camif, S3C_CAMIF_REG_CIGCTRL, cfg); in camif_hw_reset()
32 cfg = camif_read(camif, S3C_CAMIF_REG_CIGCTRL); in camif_hw_reset()
33 cfg in camif_hw_reset()
40 u32 cfg = camif_read(vp->camif, S3C_CAMIF_REG_CIGCTRL); camif_hw_clear_pending_irq() local
51 u32 cfg = camif_read(camif, S3C_CAMIF_REG_CIGCTRL); camif_hw_set_test_pattern() local
70 unsigned int i, cfg; camif_hw_set_effect() local
107 u32 cfg; camif_hw_set_source_format() local
133 u32 cfg; camif_hw_set_camera_crop() local
154 u32 cfg; camif_hw_clear_fifo_overflow() local
171 u32 cfg = camif_read(camif, S3C_CAMIF_REG_CIGCTRL); camif_hw_set_camera_bus() local
221 u32 cfg; camif_hw_set_out_dma_size() local
261 u32 cfg; camif_hw_set_output_dma() local
291 u32 cfg = camif_read(vp->camif, S3C_CAMIF_REG_MSCTRL(vp->id)); camif_hw_set_input_path() local
300 u32 cfg; camif_hw_set_target_format() local
348 u32 cfg = camif_read(vp->camif, camif_hw_set_flip() local
365 u32 cfg, shfactor, addr; camif_hw_set_prescaler() local
384 u32 cfg; camif_s3c244x_hw_set_scaler() local
431 u32 cfg; camif_s3c64xx_hw_set_scaler() local
488 u32 cfg; camif_hw_enable_scaler() local
501 u32 cfg; camif_hw_set_lastirq() local
514 u32 cfg; camif_hw_enable_capture() local
537 u32 cfg; camif_hw_disable_capture() local
600 u32 cfg = readl(camif->io_base + registers[i].offset); camif_hw_dump_regs() local
[all...]
/kernel/linux/linux-6.6/drivers/media/platform/samsung/s3c-camif/
H A Dcamif-regs.c18 u32 cfg; in camif_hw_reset() local
20 cfg = camif_read(camif, S3C_CAMIF_REG_CISRCFMT); in camif_hw_reset()
21 cfg |= CISRCFMT_ITU601_8BIT; in camif_hw_reset()
22 camif_write(camif, S3C_CAMIF_REG_CISRCFMT, cfg); in camif_hw_reset()
25 cfg = camif_read(camif, S3C_CAMIF_REG_CIGCTRL); in camif_hw_reset()
26 cfg |= CIGCTRL_SWRST; in camif_hw_reset()
28 cfg |= CIGCTRL_IRQ_LEVEL; in camif_hw_reset()
29 camif_write(camif, S3C_CAMIF_REG_CIGCTRL, cfg); in camif_hw_reset()
32 cfg = camif_read(camif, S3C_CAMIF_REG_CIGCTRL); in camif_hw_reset()
33 cfg in camif_hw_reset()
40 u32 cfg = camif_read(vp->camif, S3C_CAMIF_REG_CIGCTRL); camif_hw_clear_pending_irq() local
51 u32 cfg = camif_read(camif, S3C_CAMIF_REG_CIGCTRL); camif_hw_set_test_pattern() local
70 unsigned int i, cfg; camif_hw_set_effect() local
107 u32 cfg; camif_hw_set_source_format() local
133 u32 cfg; camif_hw_set_camera_crop() local
154 u32 cfg; camif_hw_clear_fifo_overflow() local
171 u32 cfg = camif_read(camif, S3C_CAMIF_REG_CIGCTRL); camif_hw_set_camera_bus() local
221 u32 cfg; camif_hw_set_out_dma_size() local
261 u32 cfg; camif_hw_set_output_dma() local
291 u32 cfg = camif_read(vp->camif, S3C_CAMIF_REG_MSCTRL(vp->id)); camif_hw_set_input_path() local
300 u32 cfg; camif_hw_set_target_format() local
348 u32 cfg = camif_read(vp->camif, camif_hw_set_flip() local
365 u32 cfg, shfactor, addr; camif_hw_set_prescaler() local
384 u32 cfg; camif_s3c244x_hw_set_scaler() local
431 u32 cfg; camif_s3c64xx_hw_set_scaler() local
488 u32 cfg; camif_hw_enable_scaler() local
501 u32 cfg; camif_hw_set_lastirq() local
514 u32 cfg; camif_hw_enable_capture() local
537 u32 cfg; camif_hw_disable_capture() local
600 u32 cfg = readl(camif->io_base + registers[i].offset); camif_hw_dump_regs() local
[all...]
/kernel/linux/linux-6.6/drivers/pci/
H A Decam.c32 struct pci_config_window *cfg; in pci_ecam_create() local
40 cfg = kzalloc(sizeof(*cfg), GFP_KERNEL); in pci_ecam_create()
41 if (!cfg) in pci_ecam_create()
48 cfg->parent = dev; in pci_ecam_create()
49 cfg->ops = ops; in pci_ecam_create()
50 cfg->busr.start = busr->start; in pci_ecam_create()
51 cfg->busr.end = busr->end; in pci_ecam_create()
52 cfg->busr.flags = IORESOURCE_BUS; in pci_ecam_create()
53 cfg in pci_ecam_create()
105 pci_ecam_free(struct pci_config_window *cfg) pci_ecam_free() argument
128 struct pci_config_window *cfg = bus->sysdata; pci_ecam_add_bus() local
151 struct pci_config_window *cfg = bus->sysdata; pci_ecam_remove_bus() local
170 struct pci_config_window *cfg = bus->sysdata; pci_ecam_map_bus() local
[all...]
/kernel/linux/linux-5.10/sound/pci/hda/
H A Dhda_auto_parser.c55 /* add the found input-pin to the cfg->inputs[] table */
56 static void add_auto_cfg_input_pin(struct hda_codec *codec, struct auto_pin_cfg *cfg, in add_auto_cfg_input_pin() argument
59 if (cfg->num_inputs < AUTO_CFG_MAX_INS) { in add_auto_cfg_input_pin()
60 cfg->inputs[cfg->num_inputs].pin = nid; in add_auto_cfg_input_pin()
61 cfg->inputs[cfg->num_inputs].type = type; in add_auto_cfg_input_pin()
62 cfg->inputs[cfg->num_inputs].has_boost_on_pin = in add_auto_cfg_input_pin()
64 cfg in add_auto_cfg_input_pin()
172 snd_hda_parse_pin_defcfg(struct hda_codec *codec, struct auto_pin_cfg *cfg, const hda_nid_t *ignore_nids, unsigned int cond_flags) snd_hda_parse_pin_defcfg() argument
536 check_mic_location_need(struct hda_codec *codec, const struct auto_pin_cfg *cfg, int input) check_mic_location_need() argument
573 hda_get_autocfg_input_label(struct hda_codec *codec, const struct auto_pin_cfg *cfg, int input) hda_get_autocfg_input_label() argument
656 fill_audio_out_name(struct hda_codec *codec, hda_nid_t nid, const struct auto_pin_cfg *cfg, const char *name, char *label, int maxlen, int *indexp) fill_audio_out_name() argument
712 snd_hda_get_pin_label(struct hda_codec *codec, hda_nid_t nid, const struct auto_pin_cfg *cfg, char *label, int maxlen, int *indexp) snd_hda_get_pin_label() argument
811 snd_hda_apply_pincfgs(struct hda_codec *codec, const struct hda_pintbl *cfg) snd_hda_apply_pincfgs() argument
819 set_pin_targets(struct hda_codec *codec, const struct hda_pintbl *cfg) set_pin_targets() argument
902 u32 cfg = pin->cfg; pin_config_match() local
[all...]
/kernel/linux/linux-6.6/sound/pci/hda/
H A Dhda_auto_parser.c55 /* add the found input-pin to the cfg->inputs[] table */
56 static void add_auto_cfg_input_pin(struct hda_codec *codec, struct auto_pin_cfg *cfg, in add_auto_cfg_input_pin() argument
59 if (cfg->num_inputs < AUTO_CFG_MAX_INS) { in add_auto_cfg_input_pin()
60 cfg->inputs[cfg->num_inputs].pin = nid; in add_auto_cfg_input_pin()
61 cfg->inputs[cfg->num_inputs].type = type; in add_auto_cfg_input_pin()
62 cfg->inputs[cfg->num_inputs].has_boost_on_pin = in add_auto_cfg_input_pin()
64 cfg in add_auto_cfg_input_pin()
168 snd_hda_parse_pin_defcfg(struct hda_codec *codec, struct auto_pin_cfg *cfg, const hda_nid_t *ignore_nids, unsigned int cond_flags) snd_hda_parse_pin_defcfg() argument
532 check_mic_location_need(struct hda_codec *codec, const struct auto_pin_cfg *cfg, int input) check_mic_location_need() argument
569 hda_get_autocfg_input_label(struct hda_codec *codec, const struct auto_pin_cfg *cfg, int input) hda_get_autocfg_input_label() argument
652 fill_audio_out_name(struct hda_codec *codec, hda_nid_t nid, const struct auto_pin_cfg *cfg, const char *name, char *label, int maxlen, int *indexp) fill_audio_out_name() argument
708 snd_hda_get_pin_label(struct hda_codec *codec, hda_nid_t nid, const struct auto_pin_cfg *cfg, char *label, int maxlen, int *indexp) snd_hda_get_pin_label() argument
807 snd_hda_apply_pincfgs(struct hda_codec *codec, const struct hda_pintbl *cfg) snd_hda_apply_pincfgs() argument
815 set_pin_targets(struct hda_codec *codec, const struct hda_pintbl *cfg) set_pin_targets() argument
898 u32 cfg = pin->cfg; pin_config_match() local
[all...]
/kernel/linux/linux-5.10/drivers/pci/
H A Decam.c31 struct pci_config_window *cfg; in pci_ecam_create() local
39 cfg = kzalloc(sizeof(*cfg), GFP_KERNEL); in pci_ecam_create()
40 if (!cfg) in pci_ecam_create()
43 cfg->parent = dev; in pci_ecam_create()
44 cfg->ops = ops; in pci_ecam_create()
45 cfg->busr.start = busr->start; in pci_ecam_create()
46 cfg->busr.end = busr->end; in pci_ecam_create()
47 cfg->busr.flags = IORESOURCE_BUS; in pci_ecam_create()
48 bus_range = resource_size(&cfg in pci_ecam_create()
106 pci_ecam_free(struct pci_config_window *cfg) pci_ecam_free() argument
133 struct pci_config_window *cfg = bus->sysdata; pci_ecam_map_bus() local
[all...]
/kernel/linux/linux-6.6/arch/x86/pci/
H A Dmmconfig-shared.c37 static void __init pci_mmconfig_remove(struct pci_mmcfg_region *cfg) in pci_mmconfig_remove() argument
39 if (cfg->res.parent) in pci_mmconfig_remove()
40 release_resource(&cfg->res); in pci_mmconfig_remove()
41 list_del(&cfg->list); in pci_mmconfig_remove()
42 kfree(cfg); in pci_mmconfig_remove()
47 struct pci_mmcfg_region *cfg, *tmp; in free_all_mmcfg() local
50 list_for_each_entry_safe(cfg, tmp, &pci_mmcfg_list, list) in free_all_mmcfg()
51 pci_mmconfig_remove(cfg); in free_all_mmcfg()
56 struct pci_mmcfg_region *cfg; in list_add_sorted() local
59 list_for_each_entry_rcu(cfg, in list_add_sorted()
121 struct pci_mmcfg_region *cfg; pci_mmconfig_lookup() local
327 struct pci_mmcfg_region *cfg, *cfgx; pci_mmcfg_check_end_bus_number() local
474 is_mmconf_reserved(check_reserved_t is_reserved, struct pci_mmcfg_region *cfg, struct device *dev, const char *method) is_mmconf_reserved() argument
526 pci_mmcfg_check_reserved(struct device *dev, struct pci_mmcfg_region *cfg, int early) pci_mmcfg_check_reserved() argument
580 struct pci_mmcfg_region *cfg; pci_mmcfg_reject_broken() local
591 acpi_mcfg_check_entry(struct acpi_table_mcfg *mcfg, struct acpi_mcfg_allocation *cfg) acpi_mcfg_check_entry() argument
612 struct acpi_mcfg_allocation *cfg_table, *cfg; pci_parse_mcfg() local
660 struct pci_mmcfg_region *cfg; pci_mmcfg_for_each_region() local
686 const struct pci_mmcfg_region *cfg; __pci_mmcfg_init() local
736 struct pci_mmcfg_region *cfg; pci_mmcfg_late_insert_resources() local
769 struct pci_mmcfg_region *cfg; pci_mmconfig_insert() local
840 struct pci_mmcfg_region *cfg; pci_mmconfig_delete() local
[all...]
/kernel/linux/linux-6.6/drivers/net/ethernet/marvell/octeontx2/af/
H A Drpm.c127 u64 cfg, last; in rpm_lmac_tx_enable() local
132 cfg = rpm_read(rpm, lmac_id, RPMX_MTI_MAC100X_COMMAND_CONFIG); in rpm_lmac_tx_enable()
133 last = cfg; in rpm_lmac_tx_enable()
135 cfg |= RPM_TX_EN; in rpm_lmac_tx_enable()
137 cfg &= ~(RPM_TX_EN); in rpm_lmac_tx_enable()
139 if (cfg != last) in rpm_lmac_tx_enable()
140 rpm_write(rpm, lmac_id, RPMX_MTI_MAC100X_COMMAND_CONFIG, cfg); in rpm_lmac_tx_enable()
147 u64 cfg; in rpm_lmac_rx_tx_enable() local
152 cfg = rpm_read(rpm, lmac_id, RPMX_MTI_MAC100X_COMMAND_CONFIG); in rpm_lmac_rx_tx_enable()
154 cfg | in rpm_lmac_rx_tx_enable()
165 u64 cfg; rpm_lmac_enadis_rx_pause_fwding() local
193 u64 cfg; rpm_lmac_get_pause_frm_status() local
211 u64 quanta_offset = 0, quanta_thresh = 0, cfg; rpm_cfg_pfc_quanta_thresh() local
289 u64 cfg; rpm2_lmac_cfg_bp() local
309 u64 cfg; rpm_lmac_cfg_bp() local
331 u64 cfg; rpm_lmac_enadis_pause_frm() local
358 u64 cfg, pfc_class_mask_cfg; rpm_lmac_pause_frm_config() local
490 u64 cfg; rpmusx_lmac_internal_loopback() local
555 u64 cfg; rpm_lmac_internal_loopback() local
584 u64 cfg; rpm_lmac_ptp_config() local
614 u64 cfg, class_en, pfc_class_mask_cfg; rpm_lmac_pfc_config() local
659 u64 cfg; rpm_lmac_get_pfc_frm_cfg() local
677 u64 cfg; rpm_get_fec_stats() local
731 u64 rx_logl_xon, cfg; rpm_lmac_reset() local
[all...]
/kernel/linux/linux-5.10/arch/x86/pci/
H A Dmmconfig-shared.c36 static void __init pci_mmconfig_remove(struct pci_mmcfg_region *cfg) in pci_mmconfig_remove() argument
38 if (cfg->res.parent) in pci_mmconfig_remove()
39 release_resource(&cfg->res); in pci_mmconfig_remove()
40 list_del(&cfg->list); in pci_mmconfig_remove()
41 kfree(cfg); in pci_mmconfig_remove()
46 struct pci_mmcfg_region *cfg, *tmp; in free_all_mmcfg() local
49 list_for_each_entry_safe(cfg, tmp, &pci_mmcfg_list, list) in free_all_mmcfg()
50 pci_mmconfig_remove(cfg); in free_all_mmcfg()
55 struct pci_mmcfg_region *cfg; in list_add_sorted() local
58 list_for_each_entry_rcu(cfg, in list_add_sorted()
120 struct pci_mmcfg_region *cfg; pci_mmconfig_lookup() local
326 struct pci_mmcfg_region *cfg, *cfgx; pci_mmcfg_check_end_bus_number() local
447 is_mmconf_reserved(check_reserved_t is_reserved, struct pci_mmcfg_region *cfg, struct device *dev, int with_e820) is_mmconf_reserved() argument
500 pci_mmcfg_check_reserved(struct device *dev, struct pci_mmcfg_region *cfg, int early) pci_mmcfg_check_reserved() argument
537 struct pci_mmcfg_region *cfg; pci_mmcfg_reject_broken() local
548 acpi_mcfg_check_entry(struct acpi_table_mcfg *mcfg, struct acpi_mcfg_allocation *cfg) acpi_mcfg_check_entry() argument
569 struct acpi_mcfg_allocation *cfg_table, *cfg; pci_parse_mcfg() local
617 struct pci_mmcfg_region *cfg; pci_mmcfg_for_each_region() local
643 const struct pci_mmcfg_region *cfg; __pci_mmcfg_init() local
693 struct pci_mmcfg_region *cfg; pci_mmcfg_late_insert_resources() local
726 struct pci_mmcfg_region *cfg; pci_mmconfig_insert() local
797 struct pci_mmcfg_region *cfg; pci_mmconfig_delete() local
[all...]
/kernel/linux/linux-5.10/drivers/gpu/drm/msm/hdmi/
H A Dhdmi_phy_8996.c219 struct hdmi_8996_phy_pll_reg_cfg *cfg) in pll_calculate()
286 cfg->com_svs_mode_clk_sel = 1; in pll_calculate()
288 cfg->com_svs_mode_clk_sel = 2; in pll_calculate()
290 cfg->com_hsclk_sel = (0x20 | pd.hsclk_divsel); in pll_calculate()
291 cfg->com_pll_cctrl_mode0 = cctrl; in pll_calculate()
292 cfg->com_pll_rctrl_mode0 = rctrl; in pll_calculate()
293 cfg->com_cp_ctrl_mode0 = cpctrl; in pll_calculate()
294 cfg->com_dec_start_mode0 = dec_start; in pll_calculate()
295 cfg->com_div_frac_start1_mode0 = (frac_start & 0xff); in pll_calculate()
296 cfg in pll_calculate()
218 pll_calculate(unsigned long pix_clk, unsigned long ref_clk, struct hdmi_8996_phy_pll_reg_cfg *cfg) pll_calculate() argument
400 struct hdmi_8996_phy_pll_reg_cfg cfg; hdmi_8996_pll_set_clk_rate() local
[all...]
/kernel/linux/linux-6.6/drivers/gpu/drm/msm/hdmi/
H A Dhdmi_phy_8996.c219 struct hdmi_8996_phy_pll_reg_cfg *cfg) in pll_calculate()
286 cfg->com_svs_mode_clk_sel = 1; in pll_calculate()
288 cfg->com_svs_mode_clk_sel = 2; in pll_calculate()
290 cfg->com_hsclk_sel = (0x20 | pd.hsclk_divsel); in pll_calculate()
291 cfg->com_pll_cctrl_mode0 = cctrl; in pll_calculate()
292 cfg->com_pll_rctrl_mode0 = rctrl; in pll_calculate()
293 cfg->com_cp_ctrl_mode0 = cpctrl; in pll_calculate()
294 cfg->com_dec_start_mode0 = dec_start; in pll_calculate()
295 cfg->com_div_frac_start1_mode0 = (frac_start & 0xff); in pll_calculate()
296 cfg in pll_calculate()
218 pll_calculate(unsigned long pix_clk, unsigned long ref_clk, struct hdmi_8996_phy_pll_reg_cfg *cfg) pll_calculate() argument
400 struct hdmi_8996_phy_pll_reg_cfg cfg; hdmi_8996_pll_set_clk_rate() local
[all...]
/kernel/linux/linux-5.10/drivers/gpu/drm/exynos/
H A Dexynos_drm_fimc.c141 u32 cfg; in fimc_sw_reset() local
144 cfg = fimc_read(ctx, EXYNOS_CISTATUS); in fimc_sw_reset()
145 if (EXYNOS_CISTATUS_GET_ENVID_STATUS(cfg)) in fimc_sw_reset()
166 u32 cfg; in fimc_set_type_ctrl() local
168 cfg = fimc_read(ctx, EXYNOS_CIGCTRL); in fimc_set_type_ctrl()
169 cfg &= ~(EXYNOS_CIGCTRL_TESTPATTERN_MASK | in fimc_set_type_ctrl()
176 cfg |= (EXYNOS_CIGCTRL_SELCAM_ITU_A | in fimc_set_type_ctrl()
181 fimc_write(ctx, cfg, EXYNOS_CIGCTRL); in fimc_set_type_ctrl()
186 u32 cfg; in fimc_handle_jpeg() local
190 cfg in fimc_handle_jpeg()
201 u32 cfg; fimc_mask_irq() local
245 u32 cfg; fimc_check_frame_end() local
262 u32 cfg; fimc_get_buf_id() local
288 u32 cfg; fimc_handle_lastend() local
303 u32 cfg; fimc_src_set_fmt_order() local
368 u32 cfg; fimc_src_set_fmt() local
473 u32 cfg, h1, h2, v1, v2; fimc_set_window() local
508 u32 cfg; fimc_src_set_size() local
563 u32 cfg; fimc_dst_set_fmt_order() local
634 u32 cfg; fimc_dst_set_fmt() local
694 u32 cfg; fimc_dst_set_transf() local
742 u32 cfg, cfg_ext, shfactor; fimc_set_prescaler() local
809 u32 cfg, cfg_ext; fimc_set_scaler() local
850 u32 cfg, cfg_ext; fimc_dst_set_size() local
911 u32 cfg; fimc_dst_set_buf_seq() local
1059 u32 cfg; fimc_stop() local
[all...]
/kernel/linux/linux-6.6/drivers/gpu/drm/exynos/
H A Dexynos_drm_fimc.c139 u32 cfg; in fimc_sw_reset() local
142 cfg = fimc_read(ctx, EXYNOS_CISTATUS); in fimc_sw_reset()
143 if (EXYNOS_CISTATUS_GET_ENVID_STATUS(cfg)) in fimc_sw_reset()
164 u32 cfg; in fimc_set_type_ctrl() local
166 cfg = fimc_read(ctx, EXYNOS_CIGCTRL); in fimc_set_type_ctrl()
167 cfg &= ~(EXYNOS_CIGCTRL_TESTPATTERN_MASK | in fimc_set_type_ctrl()
174 cfg |= (EXYNOS_CIGCTRL_SELCAM_ITU_A | in fimc_set_type_ctrl()
179 fimc_write(ctx, cfg, EXYNOS_CIGCTRL); in fimc_set_type_ctrl()
184 u32 cfg; in fimc_handle_jpeg() local
188 cfg in fimc_handle_jpeg()
199 u32 cfg; fimc_mask_irq() local
243 u32 cfg; fimc_check_frame_end() local
260 u32 cfg; fimc_get_buf_id() local
286 u32 cfg; fimc_handle_lastend() local
301 u32 cfg; fimc_src_set_fmt_order() local
366 u32 cfg; fimc_src_set_fmt() local
471 u32 cfg, h1, h2, v1, v2; fimc_set_window() local
506 u32 cfg; fimc_src_set_size() local
561 u32 cfg; fimc_dst_set_fmt_order() local
632 u32 cfg; fimc_dst_set_fmt() local
692 u32 cfg; fimc_dst_set_transf() local
740 u32 cfg, cfg_ext, shfactor; fimc_set_prescaler() local
807 u32 cfg, cfg_ext; fimc_set_scaler() local
848 u32 cfg, cfg_ext; fimc_dst_set_size() local
909 u32 cfg; fimc_dst_set_buf_seq() local
1057 u32 cfg; fimc_stop() local
[all...]
/kernel/linux/linux-5.10/tools/testing/selftests/bpf/prog_tests/
H A Dcore_extern.c25 const char *cfg; member
32 .cfg = "CONFIG_BPF_SYSCALL=n\n"
53 { .name = "tristate (y)", .cfg = CFG"CONFIG_TRISTATE=y\n",
55 { .name = "tristate (n)", .cfg = CFG"CONFIG_TRISTATE=n\n",
57 { .name = "tristate (m)", .cfg = CFG"CONFIG_TRISTATE=m\n",
59 { .name = "tristate (int)", .fails = 1, .cfg = CFG"CONFIG_TRISTATE=1" },
60 { .name = "tristate (bad)", .fails = 1, .cfg = CFG"CONFIG_TRISTATE=M" },
62 { .name = "bool (y)", .cfg = CFG"CONFIG_BOOL=y\n",
64 { .name = "bool (n)", .cfg = CFG"CONFIG_BOOL=n\n",
66 { .name = "bool (tristate)", .fails = 1, .cfg
[all...]

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