Lines Matching refs:cfg
25 struct phy_configure_opts_mipi_dphy *cfg)
30 if (!cfg)
39 cfg->clk_miss = 0;
40 cfg->clk_post = 60000 + 52 * ui;
41 cfg->clk_pre = 8000;
42 cfg->clk_prepare = 38000;
43 cfg->clk_settle = 95000;
44 cfg->clk_term_en = 0;
45 cfg->clk_trail = 60000;
46 cfg->clk_zero = 262000;
47 cfg->d_term_en = 0;
48 cfg->eot = 0;
49 cfg->hs_exit = 100000;
50 cfg->hs_prepare = 40000 + 4 * ui;
51 cfg->hs_zero = 105000 + 6 * ui;
52 cfg->hs_settle = 85000 + 6 * ui;
53 cfg->hs_skip = 40000;
66 cfg->hs_trail = max(4 * 8 * ui, 60000 + 4 * 4 * ui);
68 cfg->init = 100;
69 cfg->lpx = 50000;
70 cfg->ta_get = 5 * cfg->lpx;
71 cfg->ta_go = 4 * cfg->lpx;
72 cfg->ta_sure = cfg->lpx;
73 cfg->wakeup = 1000;
75 cfg->hs_clk_rate = hs_clk_rate;
76 cfg->lanes = lanes;
86 int phy_mipi_dphy_config_validate(struct phy_configure_opts_mipi_dphy *cfg)
90 if (!cfg)
93 ui = ALIGN(PSEC_PER_SEC, cfg->hs_clk_rate);
94 do_div(ui, cfg->hs_clk_rate);
96 if (cfg->clk_miss > 60000)
99 if (cfg->clk_post < (60000 + 52 * ui))
102 if (cfg->clk_pre < 8000)
105 if (cfg->clk_prepare < 38000 || cfg->clk_prepare > 95000)
108 if (cfg->clk_settle < 95000 || cfg->clk_settle > 300000)
111 if (cfg->clk_term_en > 38000)
114 if (cfg->clk_trail < 60000)
117 if ((cfg->clk_prepare + cfg->clk_zero) < 300000)
120 if (cfg->d_term_en > (35000 + 4 * ui))
123 if (cfg->eot > (105000 + 12 * ui))
126 if (cfg->hs_exit < 100000)
129 if (cfg->hs_prepare < (40000 + 4 * ui) ||
130 cfg->hs_prepare > (85000 + 6 * ui))
133 if ((cfg->hs_prepare + cfg->hs_zero) < (145000 + 10 * ui))
136 if ((cfg->hs_settle < (85000 + 6 * ui)) ||
137 (cfg->hs_settle > (145000 + 10 * ui)))
140 if (cfg->hs_skip < 40000 || cfg->hs_skip > (55000 + 4 * ui))
143 if (cfg->hs_trail < max(8 * ui, 60000 + 4 * ui))
146 if (cfg->init < 100)
149 if (cfg->lpx < 50000)
152 if (cfg->ta_get != (5 * cfg->lpx))
155 if (cfg->ta_go != (4 * cfg->lpx))
158 if (cfg->ta_sure < cfg->lpx || cfg->ta_sure > (2 * cfg->lpx))
161 if (cfg->wakeup < 1000)