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Searched refs:VADDR (Results 1 - 10 of 10) sorted by relevance

/kernel/linux/linux-5.10/arch/sparc/include/asm/
H A Dtsb.h31 * | - | CONTEXT | - | VADDR bits 63:22 |
139 * termination. VADDR will not be clobbered, but REG2 will.
156 #define KERN_PGTABLE_WALK(VADDR, REG1, REG2, FAIL_LABEL) \
159 sllx VADDR, 64 - (PGDIR_SHIFT + PGDIR_BITS), REG2; \
164 sllx VADDR, 64 - (PUD_SHIFT + PUD_BITS), REG2; \
176 sllx VADDR, 64 - (PMD_SHIFT + PMD_BITS), REG2; \
188 and VADDR, REG2, REG2; \
191 698: sllx VADDR, 64 - PMD_SHIFT, REG2; \
208 #define USER_PGTABLE_CHECK_PUD_HUGE(VADDR, REG1, REG2, FAIL_LABEL, PTE_LABEL) \
224 and VADDR, REG
[all...]
H A Dpgtsrmmu.h114 #define __nocache_pa(VADDR) (((unsigned long)VADDR) - SRMMU_NOCACHE_VADDR + __pa((unsigned long)srmmu_nocache_pool))
116 #define __nocache_fix(VADDR) __va(__nocache_pa(VADDR))
/kernel/linux/linux-6.6/arch/sparc/include/asm/
H A Dtsb.h31 * | - | CONTEXT | - | VADDR bits 63:22 |
139 * termination. VADDR will not be clobbered, but REG2 will.
156 #define KERN_PGTABLE_WALK(VADDR, REG1, REG2, FAIL_LABEL) \
159 sllx VADDR, 64 - (PGDIR_SHIFT + PGDIR_BITS), REG2; \
164 sllx VADDR, 64 - (PUD_SHIFT + PUD_BITS), REG2; \
176 sllx VADDR, 64 - (PMD_SHIFT + PMD_BITS), REG2; \
188 and VADDR, REG2, REG2; \
191 698: sllx VADDR, 64 - PMD_SHIFT, REG2; \
208 #define USER_PGTABLE_CHECK_PUD_HUGE(VADDR, REG1, REG2, FAIL_LABEL, PTE_LABEL) \
224 and VADDR, REG
[all...]
H A Dpgtsrmmu.h106 #define __nocache_pa(VADDR) (((unsigned long)VADDR) - SRMMU_NOCACHE_VADDR + __pa((unsigned long)srmmu_nocache_pool))
108 #define __nocache_fix(VADDR) ((__typeof__(VADDR))__va(__nocache_pa(VADDR)))
/kernel/linux/linux-5.10/tools/testing/selftests/proc/
H A Dproc-pid-vm.c108 #define VADDR (1UL << 32) macro
128 mov_rdi(VADDR + 4096),
129 mov_rsi((1ULL << 47) - 4096 - VADDR - 4096),
173 h.e_entry = VADDR + sizeof(struct elf64_hdr) + sizeof(struct elf64_phdr); in make_exe()
188 ph.p_vaddr = VADDR; in make_exe()
306 VADDR, VADDR + PAGE_SIZE, in main()
386 VADDR, VADDR + PAGE_SIZE); in main()
/kernel/linux/linux-6.6/tools/testing/selftests/proc/
H A Dproc-pid-vm.c110 #define VADDR (1UL << 32) macro
130 mov_rdi(VADDR + 4096),
131 mov_rsi((1ULL << 47) - 4096 - VADDR - 4096),
175 h.e_entry = VADDR + sizeof(struct elf64_hdr) + sizeof(struct elf64_phdr); in make_exe()
190 ph.p_vaddr = VADDR; in make_exe()
346 VADDR, VADDR + PAGE_SIZE, in main()
426 VADDR, VADDR + PAGE_SIZE); in main()
/kernel/linux/linux-5.10/arch/sparc/kernel/
H A Dsun4v_tlb_miss.S10 /* Load ITLB fault information into VADDR and CTX, using BASE. */
11 #define LOAD_ITLB_INFO(BASE, VADDR, CTX) \
12 ldx [BASE + HV_FAULT_I_ADDR_OFFSET], VADDR; \
15 /* Load DTLB fault information into VADDR and CTX, using BASE. */
16 #define LOAD_DTLB_INFO(BASE, VADDR, CTX) \
17 ldx [BASE + HV_FAULT_D_ADDR_OFFSET], VADDR; \
20 /* DEST = (VADDR >> 22)
24 #define COMPUTE_TAG_TARGET(DEST, VADDR, CTX, ZERO_CTX_LABEL) \
25 srlx VADDR, 22, DEST; \
36 #define COMPUTE_TSB_PTR(TSB_PTR, VADDR, HASH_SHIF
[all...]
H A Dtrampoline_64.S123 * %l3: VADDR base
162 stx %g2, [%sp + 2047 + 128 + 0x28] ! VADDR
195 stx %g2, [%sp + 2047 + 128 + 0x28] ! VADDR
/kernel/linux/linux-6.6/arch/sparc/kernel/
H A Dsun4v_tlb_miss.S10 /* Load ITLB fault information into VADDR and CTX, using BASE. */
11 #define LOAD_ITLB_INFO(BASE, VADDR, CTX) \
12 ldx [BASE + HV_FAULT_I_ADDR_OFFSET], VADDR; \
15 /* Load DTLB fault information into VADDR and CTX, using BASE. */
16 #define LOAD_DTLB_INFO(BASE, VADDR, CTX) \
17 ldx [BASE + HV_FAULT_D_ADDR_OFFSET], VADDR; \
20 /* DEST = (VADDR >> 22)
24 #define COMPUTE_TAG_TARGET(DEST, VADDR, CTX, ZERO_CTX_LABEL) \
25 srlx VADDR, 22, DEST; \
36 #define COMPUTE_TSB_PTR(TSB_PTR, VADDR, HASH_SHIF
[all...]
H A Dtrampoline_64.S123 * %l3: VADDR base
162 stx %g2, [%sp + 2047 + 128 + 0x28] ! VADDR
195 stx %g2, [%sp + 2047 + 128 + 0x28] ! VADDR

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