Searched refs:PREDIV (Results 1 - 4 of 4) sorted by relevance
| /kernel/linux/linux-5.10/arch/arm/mach-davinci/ |
| H A D | clock.h | 24 #define PREDIV 0x114 macro
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| /kernel/linux/linux-6.6/arch/arm/mach-davinci/ |
| H A D | clock.h | 24 #define PREDIV 0x114 macro
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| /kernel/linux/linux-5.10/drivers/clk/davinci/ |
| H A D | pll.c | 40 #define PREDIV 0x114 macro
146 /* easy case when there is no PREDIV */ in davinci_pll_determine_rate()
159 /* see if the PREDIV clock can help us */ in davinci_pll_determine_rate()
303 * switch to bypass before any of the parent clocks (PREDIV, PLL, POSTDIV) are
357 * OSCIN > [PREDIV >] PLL > [POSTDIV >] PLLEN
360 * - PREDIV and POSTDIV are optional (depends on the PLL controller)
413 /* Some? DM355 chips don't correctly report the PREDIV value */ in davinci_pll_clk_register()
419 parent_name, base + PREDIV, fixed, flags); in davinci_pll_clk_register()
971 DEBUG_REG(PREDIV),
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| /kernel/linux/linux-6.6/drivers/clk/davinci/ |
| H A D | pll.c | 40 #define PREDIV 0x114 macro
146 /* easy case when there is no PREDIV */ in davinci_pll_determine_rate()
159 /* see if the PREDIV clock can help us */ in davinci_pll_determine_rate()
303 * switch to bypass before any of the parent clocks (PREDIV, PLL, POSTDIV) are
357 * OSCIN > [PREDIV >] PLL > [POSTDIV >] PLLEN
360 * - PREDIV and POSTDIV are optional (depends on the PLL controller)
413 /* Some? DM355 chips don't correctly report the PREDIV value */ in davinci_pll_clk_register()
419 parent_name, base + PREDIV, fixed, flags); in davinci_pll_clk_register()
955 DEBUG_REG(PREDIV),
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